Re: gEDA-user: 3 questions on a 4 layer board

2008-04-30 Thread Rick Collins
At 11:48 PM 4/30/2008, you wrote: >The difference is I think you're talking more about signal integrity >issues around high speed digital and I'm talking about sensitive analog >stuff. The key phrase in what you wrote is "any significant degree". >The particular board I had in mind had a coupling

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-30 Thread Dan McMahill
Rick Collins wrote: > At 04:33 PM 4/29/2008, you wrote: >> Dan McMahill wrote: >>> If my traces were carrying ground referenced analog signals I wouldn't >>> want the power plane being my "ground" plane. >>> >>> And yes, I've seen a real life case with some rather frustrating >>> behavior that the

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Steve Meier
Three thoughts. 1) Noise on power planes that isn't filtered from circuits that have large gain in order to make very small signals big. Common types of noise include digital clocks and switching power supplies. Noise on a power plane gets added to the small signal and the circuits output is somet

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Rick Collins
At 04:33 PM 4/29/2008, you wrote: >Dan McMahill wrote: > > If my traces were carrying ground referenced analog signals I wouldn't > > want the power plane being my "ground" plane. > > > > And yes, I've seen a real life case with some rather frustrating > > behavior that the correct stackup totally

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread epswint
Dan McMahill wrote: > If my traces were carrying ground referenced analog signals I wouldn't > want the power plane being my "ground" plane. > > And yes, I've seen a real life case with some rather frustrating > behavior that the correct stackup totally fixed. There was a moment of > clarity wh

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Dan McMahill
Rick Collins wrote: >> Question 2: In this a reasonable assignment, or am I missing something? >> That's the stackup I use. In general, you want the ground plan near >> the signal plane with the most signals. For surface mount, that's the >> top. For through-hole it might be the bottom. > > I

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Ben Jackson
On Tue, Apr 29, 2008 at 02:15:43PM -0400, Stuart Brorson wrote: > > How easy is it to fix in gsch2pcb? I haven't looked. Don't forget that you'll want a very recent PCB if you make the most commonly loaded PCB stackup much different from the PCB default. Without my recent bugfix, loaded boa

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Peter Clifton
On Tue, 2008-04-29 at 14:15 -0400, Stuart Brorson wrote: > > On Tue, 2008-04-29 at 16:16 +0100, Dylan Smith wrote: > >> On Tue, 29 Apr 2008, DJ Delorie wrote: > >> > >>> The problem is that gsch2pcb is using an ancient layer stack which > >>> needs to be taken out back and shot. > >> > >> I'm glad

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread DJ Delorie
gnet-gsch2pcb.scm.in has this: (define gsch2pcb:write-top-header (lambda (port) (display "# release: pcb 1.6.3\n" port) (display "PCB(\"\" 6000 5000)\n" port) (display "Grid(10 0 0)\n" port) (display "Cursor(0 0 3)\n" port) (display "Flags(0x00d0)\n" port) (display "

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Stuart Brorson
> On Tue, 2008-04-29 at 16:16 +0100, Dylan Smith wrote: >> On Tue, 29 Apr 2008, DJ Delorie wrote: >> >>> The problem is that gsch2pcb is using an ancient layer stack which >>> needs to be taken out back and shot. >> >> I'm glad I'm not the only one who thought that, and did as you suggest >> (paste

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Peter Clifton
On Tue, 2008-04-29 at 16:16 +0100, Dylan Smith wrote: > On Tue, 29 Apr 2008, DJ Delorie wrote: > > > The problem is that gsch2pcb is using an ancient layer stack which > > needs to be taken out back and shot. > > I'm glad I'm not the only one who thought that, and did as you suggest > (paste in t

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Rick Collins
At 11:57 AM 4/29/2008, you wrote: > > Turns out that for the purpose of impedance a power plane is exactly > > the same as a ground plane. > >That's true unless you have a split power plane. Only if the split power planes are nowhere near the ground plane. If there is significant overlap and th

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread der Mouse
> Turns out that for the purpose of impedance (which is why you want > your traces close to the plane) a power plane is exactly the same as > a ground plane. ..or, at least, if it's not, you need better power bypassing. :) /~\ The ASCII der Mouse \ / Ribbon Campaign X

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread DJ Delorie
> Turns out that for the purpose of impedance a power plane is exactly > the same as a ground plane. That's true unless you have a split power plane. The whole field of high speed PCB layout is much more complex than is warranted on this list, which is why I made a sweeping generalization. I thi

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Rick Collins
At 10:53 AM 4/29/2008, you wrote: > > Question 1: Each "Group" will be a physical layer of copper, correct? > >Yes. > > > Question 2: In this a reasonable assignment, or am I missing something? > >That's the stackup I use. In general, you want the ground plan near >the signal plane with the most

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Dylan Smith
On Tue, 29 Apr 2008, DJ Delorie wrote: > The problem is that gsch2pcb is using an ancient layer stack which > needs to be taken out back and shot. I'm glad I'm not the only one who thought that, and did as you suggest (paste in the output). ___ geda-u

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread DJ Delorie
> Umm, DJ, since you use this stackup, and it is the logical one, is > there any reason why this is not the default presented to the user > when PCB starts from scratch? The default layer grouping is: component solder gnd power signal1 signal2 signal3 signal4 This makes sense for the most c

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Stuart Brorson
> I want to make a 4-layer board with the middle two layers being ground > and power, so to my way of thinking the following is a reasonable layer > and group assignment (I'm not using any surface mount devices on this > particular board): > > Group 1: component, component side > Group 2: GND >

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread Stuart Brorson
> In PCB, looking under File->Preferences, then Layers, Groups shows four > default groups. > > Group 1 is solder, Vcc-solder, GND-solder > Group 2 is component, Vcc-comp, GND-comp > Group 3 is "solder side" > Group 4 is "component side" Actually, PCB's grouping concept is kind of confusing, I

Re: gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread DJ Delorie
> Question 1: Each "Group" will be a physical layer of copper, correct? Yes. > Question 2: In this a reasonable assignment, or am I missing something? That's the stackup I use. In general, you want the ground plan near the signal plane with the most signals. For surface mount, that's the top.

gEDA-user: 3 questions on a 4 layer board

2008-04-29 Thread James Moody
Hi, In PCB, looking under File->Preferences, then Layers, Groups shows four default groups. Group 1 is solder, Vcc-solder, GND-solder Group 2 is component, Vcc-comp, GND-comp Group 3 is "solder side" Group 4 is "component side" Question 1: Each "Group" will be a physical layer of copper