[gem5-dev] Change in gem5/gem5[develop]: python: Fix L1 data cache size in cache components

2021-10-12 Thread Austin Harris (Gerrit) via gem5-dev
Austin Harris has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51452 ) Change subject: python: Fix L1 data cache size in cache components .. python: Fix L1 data cache size in cache components

[gem5-dev] Change in gem5/gem5[develop]: tests: Fix argparse description in simple_binary_run.py

2021-10-12 Thread Bobby R. Bruce (Gerrit) via gem5-dev
Bobby R. Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51451 ) Change subject: tests: Fix argparse description in simple_binary_run.py .. tests: Fix argparse description in

[gem5-dev] Change in gem5/gem5[develop]: scons: Rearrange functions to be next to the code that uses them.

2021-10-12 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/49402 ) ( 19 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: scons: Rearrange functions to be next to the code

[gem5-dev] Change in gem5/gem5[develop]: scons: Pull the code which generates debug/flags.cc into a helper scr...

2021-10-12 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/49401 ) Change subject: scons: Pull the code which generates debug/flags.cc into a helper script. .. scons: Pull the code which

[gem5-dev] Change in gem5/gem5[develop]: misc: Using OS::size_t in syscall signature

2021-10-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51489 ) Change subject: misc: Using OS::size_t in syscall signature .. misc: Using OS::size_t in syscall

[gem5-dev] Change in gem5/gem5[develop]: misc: Using OS::off_t in syscall signature

2021-10-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51490 ) Change subject: misc: Using OS::off_t in syscall signature .. misc: Using OS::off_t in syscall signature

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Add sendto and recvfrom implementations to the Syscall Table

2021-10-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51487 ) Change subject: arch-arm: Add sendto and recvfrom implementations to the Syscall Table .. arch-arm:

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Add ftruncate implementation to the Syscall Table

2021-10-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51488 ) Change subject: arch-arm: Add ftruncate implementation to the Syscall Table .. arch-arm: Add ftruncate

[gem5-dev] Change in gem5/gem5[develop]: tests: add additional space in weekly DNNMark tests

2021-10-12 Thread Matt Sinclair (Gerrit) via gem5-dev
Matt Sinclair has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51453 ) Change subject: tests: add additional space in weekly DNNMark tests .. tests: add additional space in weekly

[gem5-dev] Change in gem5/gem5[develop]: python: Fix L1 data cache size in cache components

2021-10-12 Thread Austin Harris (Gerrit) via gem5-dev
Austin Harris has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51452 ) Change subject: python: Fix L1 data cache size in cache components .. python: Fix L1 data cache size in cache

[gem5-dev] Change in gem5/gem5[develop]: tests: Fix argparse description in simple_binary_run.py

2021-10-12 Thread Bobby R. Bruce (Gerrit) via gem5-dev
Bobby R. Bruce has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51451 ) Change subject: tests: Fix argparse description in simple_binary_run.py .. tests: Fix argparse description in

[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: HTMSequencer stats initialized twice

2021-10-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51407 ) Change subject: mem-ruby: HTMSequencer stats initialized twice .. mem-ruby: HTMSequencer stats initialized twice

[gem5-dev] Change in gem5/gem5[develop]: tests: fix square and HeteroSync nightly regression command

2021-10-12 Thread Matt Sinclair (Gerrit) via gem5-dev
Matt Sinclair has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51247 ) Change subject: tests: fix square and HeteroSync nightly regression command .. tests: fix square and HeteroSync nightly

[gem5-dev] Change in gem5/gem5[develop]: dev-hsa,gpu-compute: fix bug with gfx8 VAs for HSA Queues

2021-10-12 Thread Matt Sinclair (Gerrit) via gem5-dev
Matt Sinclair has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51371 ) Change subject: dev-hsa,gpu-compute: fix bug with gfx8 VAs for HSA Queues .. dev-hsa,gpu-compute: fix bug with gfx8 VAs

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Add fchownat implementation to the Syscall Table

2021-10-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51052 ) Change subject: arch-arm: Add fchownat implementation to the Syscall Table .. arch-arm: Add fchownat implementation

[gem5-dev] Change in gem5/gem5[develop]: sim-se: Rewrite some syscalls to use a syscallImpl function

2021-10-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51047 ) Change subject: sim-se: Rewrite some syscalls to use a syscallImpl function .. sim-se: Rewrite some syscalls to use

[gem5-dev] Change in gem5/gem5[develop]: sim-se: Implement at suffixed syscalls

2021-10-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51048 ) Change subject: sim-se: Implement at suffixed syscalls .. sim-se: Implement at suffixed syscalls All syscalls with

[gem5-dev] Change in gem5/gem5[develop]: sim-se: Implemnt fchownat syscall

2021-10-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51050 ) Change subject: sim-se: Implemnt fchownat syscall .. sim-se: Implemnt fchownat syscall JIRA:

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Add existing at impl to ArmLinux32 Syscall Table

2021-10-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51049 ) Change subject: arch-arm: Add existing at impl to ArmLinux32 Syscall Table .. arch-arm: Add existing at impl to

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Add fchown implementation to the Syscall Table

2021-10-12 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51051 ) Change subject: arch-arm: Add fchown implementation to the Syscall Table .. arch-arm: Add fchown implementation to

[gem5-dev] Change in gem5/gem5[develop]: python: Generalize ruby components in library

2021-10-12 Thread Jason Lowe-Power (Gerrit) via gem5-dev
Jason Lowe-Power has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51448 ) Change subject: python: Generalize ruby components in library .. python: Generalize ruby components in

[gem5-dev] Change in gem5/gem5[develop]: python,configs: Add Ruby support to RISC-V board

2021-10-12 Thread Jason Lowe-Power (Gerrit) via gem5-dev
Jason Lowe-Power has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51449 ) Change subject: python,configs: Add Ruby support to RISC-V board .. python,configs: Add Ruby support to

[gem5-dev] Change in gem5/gem5[develop]: tests: Add RISC-V Ruby boot tests

2021-10-12 Thread Jason Lowe-Power (Gerrit) via gem5-dev
Jason Lowe-Power has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51450 ) Change subject: tests: Add RISC-V Ruby boot tests .. tests: Add RISC-V Ruby boot tests Change-Id:

[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Add RISC-V atomic support to Ruby

2021-10-12 Thread Jason Lowe-Power (Gerrit) via gem5-dev
Jason Lowe-Power has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51447 ) Change subject: mem-ruby: Add RISC-V atomic support to Ruby .. mem-ruby: Add RISC-V atomic support to Ruby

[gem5-dev] Re: reduce the number of checkpoints in the ARM checkpoint test?

2021-10-12 Thread Giacomo Travaglini via gem5-dev
> -Original Message- > From: Gabe Black > Sent: 12 October 2021 10:28 > To: Giacomo Travaglini > Cc: gem5 Developer List > Subject: Re: [gem5-dev] reduce the number of checkpoints in the ARM > checkpoint test? > > Hi Giacomo. it's definitely minutes, probably between 5 and 10 per >

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Added trusted DRAM to vexpress Realview

2021-10-12 Thread Quentin Forcioli (Gerrit) via gem5-dev
Quentin Forcioli has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/49989 ) Change subject: dev-arm: Added trusted DRAM to vexpress Realview .. dev-arm: Added trusted DRAM to vexpress Realview

[gem5-dev] Re: reduce the number of checkpoints in the ARM checkpoint test?

2021-10-12 Thread Gabe Black via gem5-dev
Hi Giacomo. it's definitely minutes, probably between 5 and 10 per checkpoint. Another thing I noticed is that often, the test infrastructure will schedule the typically two final and longer running tests (I think both ARM boot tests) at the same time, but sometimes I'll wait and wait for the

[gem5-dev] Re: reduce the number of checkpoints in the ARM checkpoint test?

2021-10-12 Thread Giacomo Travaglini via gem5-dev
Hi Gabe, are we talking about seconds or minutes (per run)? In the latter case I agree we could reduce the max_number to 3. If it is just saving us few seconds then it is probably not worth it IMHO Kind Regards Giacomo > -Original Message- > From: Gabe Black via gem5-dev > Sent: 12

[gem5-dev] Change in gem5/gem5[develop]: cpu-o3: Don't update stats in (read|set)Arch*Reg methods.

2021-10-12 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/51428 ) Change subject: cpu-o3: Don't update stats in (read|set)Arch*Reg methods. .. cpu-o3: Don't update stats in

[gem5-dev] reduce the number of checkpoints in the ARM checkpoint test?

2021-10-12 Thread Gabe Black via gem5-dev
I notice that the long pole in running the quick regressions seems to be the tests/gem5/configs/realview64-simple-atomic-checkpoint.py test which does some sort of ARM linux boot (I assume) and checkpoints 5 times as it comes up. Would it make sense to reduce that down to 3 or even 2? I think that

[gem5-dev] Change in gem5/gem5[develop]: misc: Fix hdf5 stats + test

2021-10-12 Thread Davide Basilio Bartolini (Gerrit) via gem5-dev
Davide Basilio Bartolini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/51061 ) Change subject: misc: Fix hdf5 stats + test .. misc: Fix hdf5 stats + test HDF5 stats file creation was not