intWidth variable (or something similar)
Kind Regards
Giacomo
*From: *Arthur Perais via gem5-dev
*Date: *Tuesday, 30 November 2021 at 17:06
*To: *gem5-dev@gem5.org
*Cc: *Arthur Perais
*Subject: *[gem5-dev] Incorrect disassembly/register width in Aarch64 ?
Hi all,
I am using a fairly old gem5
Hi all,
I am using a fairly old gem5 version
(566c113de1eb08ccbfba6e4b074f96c9977a0e16 from Nov 2020), but I noticed
that the disassembly (and the register width) of some Aarch64
instructions seems to be incorrectly reported by gem5.
Notably, instruction :
ldr w1, [sp, #168] (0xb940abe1
