[gem5-users] Re: Can't explain timing result for flush and fence in classical cache hierarchy

Hi, is the new version of gem5 addressing this issue (considering flush complete when the operation reaches the L1 cache instead of when data is completely flushed from the system) for classic cache? On Wed, Jul 12, 2023 at 6:31 PM Eliot Moss wrote: > On 7/6/2023 1:47 PM, Khan Shaikhul Hadi

[gem5-users] Re: new SimObject fails to send a response packet due to crossbar issue

Hi, please check when coherent_xbar receive the request, before sending it downstream to your new object, the packet is expected to have response and not express snoop so that "bool expect_response = pkt->needsResponse() && ! pkt->cacheResponding();" this line set expect_response to zero which sh

[gem5-users] Is there a way to know if a packet contain heap memory data or not at membus?

Hi, I'm using SE simulation with O3 , classic cache with XBar configuration. Now, at membus, based on the packet address, I want to know, if it's a heap memory or not? Is there is any way to know that? If there is no direct way to know that, can anyone point me to some direction or source file wh

[gem5-users] Re: 'SConsEnvironment' object has no attribute 'M4': when building

Have you checked if you have M4 package installed in your machine ? On Thu, Jan 25, 2024 at 11:41 AM Ioannis Constantinou via gem5-users < gem5-users@gem5.org> wrote: > Hello all, > > So I’m trying to build gem5 on a new machine and I get the following error. > > > scons: Reading SConscript file

[gem5-users] How to pass the reference of a simobject as a parameter of another simobject as configuration parameter

Can you pass reference of a simobject as a parameter to another simobject in the configuration ( config.py ) file? How? For example, I have an independent simobject class like Center_Ctrl and a class Cache. ( Center_Ctrl could not be a variable of the class object Cache but Cache could have refer

[gem5-users] Re: How to solve "AttributeError: Can't resolve proxy" error when l1icache is replaced with new module

how unset the `assoc` parameter (or set it to > None) in the cache. Can you provide us the exact script you're running, the > command line that you use to run, the information about the gem5 build > (variant used), the version of gem5 you're using, and any modifications you > have made

[gem5-users] How to solve "AttributeError: Can't resolve proxy" error when l1icache is replaced with new module

I have my dedicated controller module that have L1Icache as member function (I want to interfere with all incoming and outgoing request and response from cache and may modify based on some algorithm) with similler parameter and port structure. In PrivateL1SharedL2CacheHierarchy cache hierarchy, I

[gem5-users] How to connected CpuSidePort and MemSidePort within a simobject ( not in config file)

In my code I'll have a simobject which has its own cache. As classical cache use CpuSidePort and MemSidePort to receive and respond to request, I want to create some internal CpuSidePort and MemSidePort in my simobject like below > class SimObject : public ClockedObject > { > Cache cache; > CpuSi

[gem5-users] Re: how clflush is simulated in classic cache ( not ruby ) ?

But my gdb traces showing that request->isMemAccessRequired() is returning false. That's where I'm confused. I'm running this simulation in SE mode. Shaikhul [image: ismemAccessRequired.png] On Tue, Aug 1, 2023 at 5:52 PM Eliot Moss wrote: > On 8/1/2023 5:15 PM, Khan S

[gem5-users] how clflush is simulated in classic cache ( not ruby ) ?

As far as I understand, gem5 simulates functionality of clflush instruction for classic cache. Can anyone explain how it do that ? I traced Clflushopt::initiateAcc() function call which eventually calls LSQ::pushRequest() function in lsq.cc. But after completion of translation, it checks request->

[gem5-users] Can't explain timing result for flush and fence in classical cache hierarchy

In my configuration I used CPUTypes.O3 and PrivateL1SharedL2CacheHeirarchy to check how clflush and fence impacts the timing of workload. In my workload I run 10,000 iteration to update an array value, 200 updates per thread. In workload, I have : for( ;index ARR[index]=thread_ID; > FLUSH(&ARR[ind

[gem5-users] Re: Fatal error for when clflush is included in workload for O3 system simulation

wb instructions (7401) · Gerrit > Code Review (googlesource.com) > <https://gem5-review.googlesource.com/c/public/gem5/+/7401> > > -Ayaz > > On Fri, Jun 16, 2023 at 2:49 PM Khan Shaikhul Hadi via gem5-users < > gem5-users@gem5.org> wrote: > >> Hi, >> W

[gem5-users] Persistent memory in gem5: How to test persistent memory workload properly.

Hi, I want to simulate a Persistent Memory machine in gem5. Gem5 has an NVMe module but at instruction level ,for most part, it does not simulate CLFLUSH ( specially for MESI cache coherence protocol ). I am also not sure if it simulates memory fence properly (For out of order cpu, it seems like MF

[gem5-users] Fatal error for when clflush is included in workload for O3 system simulation

Hi, When I include "clflush" instruction for out-of-order execution simulation in MESITwoLevelCacheHeirarchy, it givis following error: build/X86/mem/ruby/system/RubyPort.cc:433: fatal: Ruby functional read > failed for address 0x1f2b80 Commenting out clflush operations seems to solve the proble

[gem5-users] How clflush execution works in gem5 ?

Hi, I'm trying to figure out how "clflush" instruction works in gem5. Specially, how it issues a signal to the cache controller to evict the block from cache hierarchy throughout the system and how it receives confirmation to clean the store buffer so that the next fence let following instructions