[gem5-users] Re: XBar on dcache port impacting BW?

2020-11-13 Thread Xue, Fisher via gem5-users
yar Samani via gem5-users Sent: November 12, 2020 2:29 PM To: gem5 users mailing list Cc: Mahyar Samani Subject: [gem5-users] Re: XBar on dcache port impacting BW? Hey Fisher, I'm not sure if that is correct as every packet spends at least one cycle on the XBar (even in real hardware), however

[gem5-users] Re: XBar on dcache port impacting BW?

2020-11-12 Thread Mahyar Samani via gem5-users
59 AM > *To:* gem5 users mailing list > *Cc:* Mahyar Samani > *Subject:* [gem5-users] Re: XBar on dcache port impacting BW? > > > > Hey Fisher, > > The XBar can at maximum deliver a bandwidth equivalent to 1 packet size > (which I believe is 64 bytes) per cycl

[gem5-users] Re: XBar on dcache port impacting BW?

2020-11-12 Thread Xue, Fisher via gem5-users
yar Samani via gem5-users Sent: October 20, 2020 8:59 AM To: gem5 users mailing list Cc: Mahyar Samani Subject: [gem5-users] Re: XBar on dcache port impacting BW? Hey Fisher, The XBar can at maximum deliver a bandwidth equivalent to 1 packet size (which I believe is 64 bytes) per cycle (

[gem5-users] Re: XBar on dcache port impacting BW?

2020-10-20 Thread Mahyar Samani via gem5-users
Hey Fisher, The XBar can at maximum deliver a bandwidth equivalent to 1 packet size (which I believe is 64 bytes) per cycle (e.g. if the clk_freq is set to 1GHz, it will at max deliver 64GBps). Does this information comply with the results you are seeing? Best Regards, On Tue, Oct 13, 2020 at