On 23/11/22 01:20, Fabio Massimo Ottaviani wrote:
We also tried to add what suggested by David
If you want to pass the address of a parameter list in R1 use the following.
#pragma runopts(plist(os))
And in main
struct plist * parms = ( struct plist * ) __R1;
But we got
pragma
For a more precise time frame on the introduction of IBM implementation of
S/390 architecture
using a combination of native hardware microarchitecture plus millicode, this
reference agrees with my memory that it was generation 4 of the IBM CMOS
processors.
Thanks very much Kolusu,
That worked. I'll have to study the parameters so as to understand how to build
these.
Regards,
Eric Verwijs
Programmeur-analyste, RPC, SV et solutions de paiement - Direction générale de
l'innovation, information et technologie
Emploi et
My wife agrees with you that my "vaccine research" comment was over the top,
and I am trained to
accept her judgement on such matters of decorum, so I apologize for that.
I agreed with you that processor designs of the XA/ESA era were as you
described. The IBM 303x, 308x,and 3090
Interesting that you have to resort to a childish rant ... So totally
unprofessional ...
BTW if you read the documents you proved they actually prove my point ...
Dr. Gene Amdahl picked me to lead the design and build of his CMOS XA processor
for a reason ... My direct OS and hardware
My guess is it's more like how Compaq managed to create their PC
compatible ROM in the 80's.
On 11/22/2022 4:46 PM, Bill Johnson wrote:
Reverse engineering to get the source code is illegal.
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On Tuesday, November 22, 2022, 11:23 AM, Joe Monk wrote:
Not sure
Explains a recent MicroFocus hire who used to work at IBM & was a CICS expert
there.
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On Tue, Nov 22, 2022 at 7:46 PM, Bill Johnson
<0047540adefe-dmarc-requ...@listserv.ua.edu> wrote:
> Reverse engineering to get the source code is illegal.
>
> Sent from Yahoo
Fascinating. Do you also do your own vaccine research with similar
methodology and results?
You might consider these sources:
https://community.ibm.com/HigherLogic/System/DownloadDocumentFile.ashx?DocumentFileKey=1275a261-ab21-4f8a-b060-5c71880a71fa
Reverse engineering to get the source code is illegal.
Sent from Yahoo Mail for iPhone
On Tuesday, November 22, 2022, 11:23 AM, Joe Monk wrote:
Not sure that this is a winnable lawsuit though.
The architecture of a file (and the data therein) that is only needed to
run a product is not
Your on lp64, is the invoking program passing a 64 bit address. main() is
slightly tricky but the second word or dword in param list pointed to by R1
should point to sequence of address which point to null terminated strings.
On Tuesday, November 22, 2022, 09:21:01 AM PST, Fabio Massimo
On 11/22/2022 1:34 PM, Paul Gorlinsky wrote:
The BASIC CPU hardware for zServer is a collection of POWER PC processors with some
addition z Enhancements and the z is an EMULATOR because the last HARDWIRED CPU was
probably the S/360 & S/370 model 195.
The basic IBM Z hardware instructions
After doing more research, I will stand by my retort.
The BASIC CPU hardware for zServer is a collection of POWER PC processors with
some addition z Enhancements and the z is an EMULATOR because the last
HARDWIRED CPU was probably the S/360 & S/370 model 195.
Even Intel CPUs are Emulators
Thanks Jim! I was very confused for a second there :)
On 11/22/2022 11:25 AM, Jim Mulder wrote:
That's an impressive display of misinformation.
Present day Z machines are not emulators. They have their own CPU chips which
are different from the CPU chips used for Power and I.
The storage
The implementation is not part of the architecture. IBM is free to use a
different implementation on every model.
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of Ian
1. If you're using register notation inside PARAM than you need both pairs of
parentheses.
2. You can only use register notation on the execut form
3. Does register notation in PARAM accept symbols or only actual numbers?
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
The use of the word "KEYS" in caps to indicate a mechanism that protected
storage between the LPARs ...
As a stated, and you rightly corrected, It was more conjecture as I have no
insights into IBMs trade secrets.
I can only base my experience upon what we designed at Andor Systems, which was
That's an impressive display of misinformation.
Present day Z machines are not emulators. They have their own CPU chips which
are different from the CPU chips used for Power and I.
The storage separation of logical partitions is done via a mechanism that is
not storage keys. The LPAR
I may still have some samples, if you want let me know
Carmen
On 11/22/2022 12:24 PM, Kenneth J. Kripke wrote:
Hello;
I realize this is not the correct forum to be asking questions
regarding SAS, but, it appears that SAS-L is no longer available?
The question is as follows:
I would
All mainframe-related questions are welcome as far as I know, but you might
have better luck on: MXG Software LIST
-Original Message-
From: IBM Mainframe Discussion List On Behalf Of
Kenneth J. Kripke
Sent: Tuesday, November 22, 2022 12:25 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: SAS
Hello;
I realize this is not the correct forum to be asking questions
regarding SAS, but, it appears that SAS-L is no longer available?
The question is as follows:
I would like to produce an XCEL spreadsheet written to a member of a
pre-allocated PDSE. I have fiddled with the various
Present day z/Arch machines are the combination of several POWER PC chips
working together. With the inclusion of LPAR as the only mode to operate the
machine, logically, the storage management is more than just the old storage
keys, there are also additional KEYS to manage the LPARs themselves
Thanks to all of you for the interesting suggestions
This is the compiler we use
PGM=CCNDRVR,PARM=('/SSCOM,LIS,LO,RENT,DLL,LP64,XPLINK')
We tried to use PARAM=(R1) but it doesn't work. Nothing passed in argv in the C
program
We also tried to add what suggested by David
If you
They are held in the page tables and set in the hardware - in extra memory
that is not software accessible except through a few supervisor-level
instructions such as SSK (set storage key) - when the page is assigned to a
real storage frame.
On Tue, Nov 22, 2022 at 10:24 AM Ian Worthington <
I don't think the storage keys (and their friends) are held in the page tables
though.
Best wishes / Mejores deseos / Meilleurs vœux
Ian ...
On Tuesday, November 22, 2022 at 05:04:08 PM GMT+1, Jay Maynard
wrote:
Each page table entry has a byte associated with it that stores the
Not sure that this is a winnable lawsuit though.
The architecture of a file (and the data therein) that is only needed to
run a product is not copyright protected. So copying the WSBIND
file doesnt necessarily amount to a copyright violation.
Joe
On Tue, Nov 22, 2022 at 10:10 AM Bob T Roller <
Yes, I understand that. What I do not understand is where they /are/ held. Is
a big chunk of storage partitioned off and made unaddressable? Is the TLB
actually big enough to store the entire thing (possible, but surely this memory
could be better used for cache)? Is it separate storage
Not surprised. They lost their preferred vendor status with IBM a year or so
ago. Because of their tie up with Amazon.
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On Tue, Nov 22, 2022 at 9:25 AM, Mark Regan wrote:
> https://www.theregister.com/2022/11/22/ibm_sues_micro_focus_for
>
> Regards,
>
> Mark
More like third and fourth… TurboHercules and PSI were first… TurboHercules for
violating IBM patents that they put into the public domain. PSI … no comment,
they ended up buying them and use their tech in zPDT…
--
For IBM-MAIN
Each page table entry has a byte associated with it that stores the key, as
well as the referenced and changed bits.
And yes, 4K page tables do soak up lots of memory, which is why later OSes
use 1M or 2M pages.
On Tue, Nov 22, 2022 at 9:22 AM Ian Worthington <
"Storage keys are not part of addressable storage."
http://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf page 3-9
Joe
On Tue, Nov 22, 2022 at 9:22 AM Ian Worthington <
047bb6801512-dmarc-requ...@listserv.ua.edu> wrote:
> Does anyone know where the storage protection keys are kept? It seems
Does anyone know where the storage protection keys are kept? It seems that the
processors maintain recent keys in the TLB to be accessed by the DAT, but
where do they live when they're not in the TLB? Surely we need one byte per 4k
page per address space, which could be quite a bit of
Long, Long time ago in a valley far, far away - Sun Microsystems was using an
Amdahl processor running MVS for all virtually everything to run the business.
One of the C-level people decided that it was ridiculous to be on an Amdahl
instead of their own product. After many months of
First they sued LZlabs, now Micro Focus. WHo's next?
ITschak
*| **Itschak Mugzach | Director | SecuriTeam Software **|** IronSphere
Platform* *|* *Information Security Continuous Monitoring for Z/OS, zLinux
and IBM I **| *
*|* *Email**: i_mugz...@securiteam.co.il **|* *Mob**: +972 522 986404
interesting, my last gig was working for a large freight company that
spent many years and tons of $$$'s to replace their mainframes with MFES
no POC was done before spending all this money on a solution that could
not provide this company a stable environment.
thanks Mark
Carmen
On
https://www.theregister.com/2022/11/22/ibm_sues_micro_focus_for
Regards,
Mark Regan, K8MTR General, EN80tg
CTO1 USNR-Retired (1969-1991),
RUENAAA/CNO WASHINGTON DC//OP-009QCP
Nationwide Insurance, Retired, 1986-2017
z/OS Network Software Consultant (z NetView, z/OS Communications Server)
Does anyone even have any of that fiche that was not tossed out?
.
This electronic mail (including any attachments) may contain information
that is privileged, confidential, and/or otherwise protected from
If this is a C program running under the LE enclave, then I would expect the
normal calling conventions to be used.
Wouldn't it be best practice to use standard OS conventions at least to the
main() function?
More questions, is this a main() function you are trying to attach or another
ObFicheInABarrel I found and reported two integrity errors in OS/360 from
reading the fiche. That's in addition to relying on them for local
modifications.
My experience was that I had to read the fiche for things that should be in the
PLM and I had to read the PLM for things that should have
The OP is using standard for; the addresses in PARAM are constants; he is not
passing a parameter in R10 but rather is passing a PLIST containing only the
address 10.
Two fixes are possible:
1. Use separate execut and list forms and put parentheses around R10, i,e.,
PARM=((R10))
2. Build
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