On Wed, 22 Jun 2022 17:32:25 -0700, Vinay Belgaumkar wrote:
>
> @@ -208,12 +232,14 @@ static int slpc_force_min_freq(struct intel_guc_slpc
> *slpc, u32 freq)
>*/
>
> with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
> - ret = slpc_set_param(slpc,
> -
On Wed, 22 Jun 2022 13:30:23 -0700, Belgaumkar, Vinay wrote:
> On 6/21/2022 5:26 PM, Dixit, Ashutosh wrote:
> > On Sat, 14 May 2022 23:05:06 -0700, Vinay Belgaumkar wrote:
> > The issue I have is what happens when we de-boost (restore min freq to its
> &
On Fri, 10 Jun 2022 16:47:12 -0700, Vinay Belgaumkar wrote:
>
> This test will validate we can achieve actual frequency of RP0. Pcode
> grants frequencies based on what GuC is requesting. However, thermal
> throttling can limit what is being granted. Add a test to request for
> max, but don't fail
On Sat, 14 May 2022 23:05:06 -0700, Vinay Belgaumkar wrote:
>
> SLPC min/max frequency updates require H2G calls. We are seeing
> timeouts when GuC channel is backed up and it is unable to respond
> in a timely fashion causing warnings and affecting CI.
>
> This is seen when waitboosting happens du
On Tue, 21 Jun 2022 10:44:21 -0700, Guenter Roeck wrote:
>
> On Mon, Jun 20, 2022 at 11:41:41PM -0700, Dixit, Ashutosh wrote:
> > On Mon, 20 Jun 2022 13:58:49 -0700, Guenter Roeck wrote:
> > Hi Guenter, Thanks for taking a look.
> >
> > > > diff --git a/Document
On Mon, 20 Jun 2022 14:04:53 -0700, Guenter Roeck wrote:
>
> > @@ -141,9 +282,12 @@ i915_power1_max_default_show(struct device *dev,
> > struct device_attribute *attr,
> > static SENSOR_DEVICE_ATTR(power1_max_default, 0444,
> > i915_power1_max_default_show, NULL, 0);
> >
On Mon, 20 Jun 2022 13:58:49 -0700, Guenter Roeck wrote:
>
Hi Guenter, Thanks for taking a look.
> > diff --git a/Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon
> > b/Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon
> > index 24c4b7477d51..945f472dd4a2 100644
> > --- a/Documentat
On Fri, 17 Jun 2022 13:25:34 -0700, Vinay Belgaumkar wrote:
>
> We have seen multiple RC6 issues where it is useful to know
> which global forcewake bits are set. Add this to the 'drpc'
> debugfs output.
A couple of optional nits below to look at but otherwise this is:
Reviewed-by: Ashutosh Dixit
On Thu, 16 Jun 2022 15:01:59 -0700, Zhanjun Dong wrote:
>
> We are seeing error message of "No response for request". Some cases
> happened while waiting for response and reset/suspend action was triggered.
> In this case, no response is not an error, active requests will be
> cancelled.
>
> This p
On Thu, 16 Jun 2022 15:01:59 -0700, Zhanjun Dong wrote:
>
> We are seeing error message of "No response for request". Some cases
> happened while waiting for response and reset/suspend action was triggered.
> In this case, no response is not an error, active requests will be
> cancelled.
>
> This p
On Tue, 14 Jun 2022 09:28:14 -0700, Dixit, Ashutosh wrote:
> On Thu, 02 Jun 2022 10:21:19 -0700, Zhanjun Dong wrote:
>
> > @@ -481,12 +481,14 @@ static int wait_for_ct_request_update(struct
> > ct_request *req, u32 *status)
> > #define GUC_CTB_RESPONSE_TIMEOUT_
On Thu, 02 Jun 2022 10:21:19 -0700, Zhanjun Dong wrote:
>
Hi Zhanjun,
> We are seeing error message of "No response for request". Some cases happened
> while waiting for response and reset/suspend action was triggered. In this
> case, no response is not an error, active requests will be cancelled
On Mon, 23 May 2022 04:08:41 -0700, Badal Nilawar wrote:
>
> +static int
> +i915_in_read(struct i915_hwmon_drvdata *ddat, u32 attr, long *val)
> +{
> + struct i915_hwmon *hwmon = ddat->dd_hwmon;
> + intel_wakeref_t wakeref;
> + u32 reg_value;
> +
> + switch (attr) {
> + case hwm
On Fri, 10 Jun 2022 15:35:23 -0700, Dixit, Ashutosh wrote:
>
> On Mon, 23 May 2022 04:08:41 -0700, Badal Nilawar wrote:
> >
> > @@ -370,6 +386,41 @@ i915_power_write(struct i915_hwmon_drvdata *ddat, u32
> > attr, int chan, long val)
> > return ret;
On Mon, 23 May 2022 04:08:41 -0700, Badal Nilawar wrote:
>
> @@ -370,6 +386,41 @@ i915_power_write(struct i915_hwmon_drvdata *ddat, u32
> attr, int chan, long val)
> return ret;
> }
>
> +static umode_t
> +i915_in_is_visible(const struct i915_hwmon_drvdata *ddat, u32 attr)
> +{
> + struc
On Tue, 07 Jun 2022 16:15:19 -0700, John Harrison wrote:
>
> On 6/7/2022 15:29, Dixit, Ashutosh wrote:
> > On Sat, 14 May 2022 23:05:06 -0700, Vinay Belgaumkar wrote:
> >> SLPC min/max frequency updates require H2G calls. We are seeing
> >> timeouts when GuC channel
On Sat, 14 May 2022 23:05:06 -0700, Vinay Belgaumkar wrote:
>
> SLPC min/max frequency updates require H2G calls. We are seeing
> timeouts when GuC channel is backed up and it is unable to respond
> in a timely fashion causing warnings and affecting CI.
>
> This is seen when waitboosting happens du
On Tue, 07 Jun 2022 15:23:17 -0700, John Harrison wrote:
>
> On 6/7/2022 15:07, Dixit, Ashutosh wrote:
> > On Tue, 07 Jun 2022 14:51:03 -0700, john.c.harri...@intel.com wrote:
> >> From: John Harrison
> >>
> >> Don't use pr_err in places where we have
On Tue, 07 Jun 2022 14:51:03 -0700, john.c.harri...@intel.com wrote:
>
> From: John Harrison
>
> Don't use pr_err in places where we have access to a struct_drm.
Seem to be many more pr_err's in selftests. Is there a reason why drm_err's
cannot be used in selftests (especially those using an i915
On Fri, 03 Jun 2022 08:55:45 -0700, john.c.harri...@intel.com wrote:
>
> From: John Harrison
>
> Update to the latest master version of the DRM UAPI header file from
> git://anongit.freedesktop.org/git/drm/drm:
> c4955d9cd2fc Merge tag 'drm-intel-next-fixes-2022-05-24' of
> git://anongit.freed
On Thu, 02 Jun 2022 16:55:50 -0700, Matt Roper wrote:
>
> On Thu, Jun 02, 2022 at 04:36:02PM -0700, Dixit, Ashutosh wrote:
> > On Fri, 27 May 2022 16:41:28 -0700, Matt Roper wrote:
> > >
> > > On Thu, May 26, 2022 at 12:00:42PM -0700, Ashutosh Dixit wrote:
>
On Fri, 27 May 2022 16:41:28 -0700, Matt Roper wrote:
>
> On Thu, May 26, 2022 at 12:00:42PM -0700, Ashutosh Dixit wrote:
> > Create a gt/gtN/.defaults directory (similar to
> > engine//.defaults) to expose default parameter values for each
> > gt in sysfs. This allows userspace to restore default
On Tue, 10 May 2022 03:58:13 -0700, Andi Shyti wrote:
>
> Hi Ashutosh,
Hi Andi,
> > > +static ssize_t
> > > +default_min_freq_mhz_show(struct kobject *kobj, struct kobj_attribute
> > > *attr, char *buf)
> > > +{
> > > + struct intel_gt *gt = kobj_to_gt(kobj->parent);
> > > +
> > > + return sysfs
On Tue, 10 May 2022 00:53:23 -0700, Tvrtko Ursulin wrote:
>
> On 29/04/2022 20:56, Ashutosh Dixit wrote:
> > Create a gt/gtN/.defaults directory (similar to
> > engine//.defaults) to expose default parameter values for each
> > gt in sysfs. Populate the .defaults directory with RPS parameter defaul
On Wed, 25 May 2022 01:21:06 -0700, Dixit, Ashutosh wrote:
>
> On Mon, 23 May 2022 01:57:51 -0700, Tvrtko Ursulin wrote:
> >
> > On 13/05/2022 02:36, Ashutosh Dixit wrote:
> > > Some recent Intel dGfx platforms allow media IP to work at a different
> > > fr
On Thu, 26 May 2022 00:29:54 -0700, Patchwork wrote:
>
> Patch Details
>
> Series: drm/i915: Media freq factor and per-gt enhancements/fixes (rev10)
> URL: https://patchwork.freedesktop.org/series/102665/
> State: failure
> Details:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102
On Mon, 23 May 2022 01:57:51 -0700, Tvrtko Ursulin wrote:
>
> On 13/05/2022 02:36, Ashutosh Dixit wrote:
> > Some recent Intel dGfx platforms allow media IP to work at a different
> > frequency from the base GT. This patch series exposes sysfs controls for
> > this functionality in the new per-gt s
On Mon, 23 May 2022 04:08:41 -0700, Badal Nilawar wrote:
>
> +static umode_t
> +i915_in_is_visible(const struct i915_hwmon_drvdata *ddat, u32 attr)
> +{
> + struct drm_i915_private *i915 = ddat->dd_uncore->i915;
> +
> + switch (attr) {
> + case hwmon_in_input:
> + return (IS
On Mon, 23 May 2022 04:08:40 -0700, Badal Nilawar wrote:
>
> From: Dale B Stimson
>
> As part of the System Managemenent Interface (SMI), use the HWMON
> subsystem to display energy utilization
Energy seems to be hardly ever exposed in the kernel. Searching for
'hwmon_energy' shows only a single
On Mon, 23 May 2022 04:08:40 -0700, Badal Nilawar wrote:
>
> diff --git a/drivers/gpu/drm/i915/i915_hwmon.c
> b/drivers/gpu/drm/i915/i915_hwmon.c
> index b94c11f2517f..b35c4de73f30 100644
> --- a/drivers/gpu/drm/i915/i915_hwmon.c
> +++ b/drivers/gpu/drm/i915/i915_hwmon.c
> @@ -18,8 +18,10 @@
> /*
On Mon, 23 May 2022 04:08:39 -0700, Badal Nilawar wrote:
>
A few initial comments.
> +static void
> +i915_hwmon_get_preregistration_info(struct drm_i915_private *i915)
> +{
> + struct i915_hwmon *hwmon = i915->hwmon;
> + struct intel_uncore *uncore = &i915->uncore;
> + struct i915_hwm
On Mon, 23 May 2022 04:08:38 -0700, Badal Nilawar wrote:
>
> This series adds the HWMON support for DG1, DG2
>
> Dale B Stimson (2):
> drm/i915/hwmon: Add HWMON power sensor support
> drm/i915/hwmon: Add HWMON energy support
I would suggest a slight reorganization of the series. I think the fi
On Fri, 13 May 2022 02:31:28 -0700, Tvrtko Ursulin wrote:
>
> From: Tvrtko Ursulin
>
> Leave some sysfs files open and attempt to read from them after hotunplug.
A few minor comments below but otherwise LGTM:
Reviewed-by: Ashutosh Dixit
> Signed-off-by: Tvrtko Ursulin
> Cc: Ashutosh Dixit
>
On Thu, 12 May 2022 23:58:55 -0700, Patchwork wrote:
>
> Patch Details
>
> Series: drm/i915: Media freq factor and per-gt enhancements/fixes (rev6)
> URL: https://patchwork.freedesktop.org/series/102665/
> State: failure
> Details:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10266
On Thu, 12 May 2022 00:48:08 -0700, Tvrtko Ursulin wrote:
Hi Tvrtko,
> On 12/05/2022 00:15, Dixit, Ashutosh wrote:
> > On Tue, 10 May 2022 03:41:57 -0700, Andrzej Hajda wrote:
> >> On 10.05.2022 11:48, Tvrtko Ursulin wrote:
> >>> On 10/05/2022 10:39, Andrzej Hajda
On Thu, 12 May 2022 00:59:11 -0700, Tvrtko Ursulin wrote:
Hi Tvrtko,
> On 12/05/2022 05:38, Dixit, Ashutosh wrote:
> > On Wed, 11 May 2022 19:32:13 -0700, Ashutosh Dixit wrote:
> >>
> >> Some recent Intel dGfx platforms allow media IP to work at a different
> >&
On Thu, 12 May 2022 03:36:31 -0700, Jani Nikula wrote:
>
Hi Jani,
> On Wed, 11 May 2022, Ashutosh Dixit wrote:
> > Each gt contains an independent instance of pcode. Extend pcode functions
> > to interface with pcode on different gt's. To avoid creating dependency of
> > display functionality on
On Wed, 11 May 2022 19:32:13 -0700, Ashutosh Dixit wrote:
>
> Some recent Intel dGfx platforms allow media IP to work at a different
> frequency from the base GT. This patch series exposes sysfs controls for
> this functionality in the new per-gt sysfs. Some enhancements and fixes to
> previous per
On Wed, 11 May 2022 01:18:07 -0700, Tvrtko Ursulin wrote:
> On 11/05/2022 06:26, Dixit, Ashutosh wrote:
> > On Tue, 10 May 2022 00:43:29 -0700, Jani Nikula wrote:
> >> On Tue, 10 May 2022, Tvrtko Ursulin wrote:
> >>> On 29/04/2022 20:56, Ashutosh Dixit wrote:
>
On Tue, 10 May 2022 00:37:38 -0700, Tvrtko Ursulin wrote:
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> > b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> > index 2b1cd6a01724..ab91e9cf9deb 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> > +++ b/drivers/gpu/drm/i915/
On Tue, 10 May 2022 00:24:02 -0700, Tvrtko Ursulin wrote:
>
> > @@ -598,4 +720,12 @@ void intel_gt_sysfs_pm_init(struct intel_gt *gt,
> > struct kobject *kobj)
> > drm_warn(>->i915->drm,
> > "failed to create gt%u throttle sysfs files (%pe)",
> >
On Wed, 11 May 2022 06:04:54 -0700, Anshuman Gupta wrote:
>
> RPM suspend/resume also supported on gfx platforms which doesn't have
> kms support and even on platforms without any connected display panel.
> There is no good reason to log rpm suspend/resume debug message with
> drm_dbg_kms() therefo
On Tue, 10 May 2022 03:41:57 -0700, Andrzej Hajda wrote:
> On 10.05.2022 11:48, Tvrtko Ursulin wrote:
> > On 10/05/2022 10:39, Andrzej Hajda wrote:
> >> On 10.05.2022 10:18, Tvrtko Ursulin wrote:
> >
> > Was there closure/agreement on the matter of whether or not there is
> > a potentia
On Tue, 10 May 2022 00:43:29 -0700, Jani Nikula wrote:
> On Tue, 10 May 2022, Tvrtko Ursulin wrote:
> > On 29/04/2022 20:56, Ashutosh Dixit wrote:
> >> diff --git a/drivers/gpu/drm/i915/i915_driver.c
> >> b/drivers/gpu/drm/i915/i915_driver.c
> >> index 90b0ce5051af..bc49eff38c6a 100644
> >> --- a
On Sun, 01 May 2022 23:22:02 -0700, Andrzej Hajda wrote:
> On 29.04.2022 06:25, Dixit, Ashutosh wrote:
> > On Thu, 28 Apr 2022 07:36:14 -0700, Andrzej Hajda wrote:
> >> See [1], it is quite old, so maybe it is not valid anymore, but I see no
> >> code proving sth
On Fri, 29 Apr 2022 16:38:35 -0700, Patchwork wrote:
>
> Possible regressions
>
> * igt@gem_eio@in-flight-suspend:
>
> * shard-skl: PASS -> INCOMPLETE
This failure in unrelated.
>
> * {igt@i915_pm_disag_freq@media-freq@gt0} (NEW):
>
> * shard-iclb: NOTRUN -> SKIP
>
> * shard-tglb: NOTRUN -> SK
On Fri, 29 Apr 2022 05:58:21 -0700, Rodrigo Vivi wrote:
>
> > @@ -1251,7 +1251,7 @@ static int i915_drm_resume(struct drm_device *dev)
> >
> > disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
> >
> > - ret = intel_pcode_init(dev_priv);
> > + ret = intel_gt_pcode_init(dev_priv);
>
> I did
On Thu, 28 Apr 2022 07:36:14 -0700, Andrzej Hajda wrote:
> On 27.04.2022 22:46, Dixit, Ashutosh wrote:
> > On Sun, 24 Apr 2022 15:36:23 -0700, Andi Shyti wrote:
> >> Hi Andrzej and Ashutosh,
> >>
> >>>>>> b/drivers/gpu/drm/i915/gt/intel_gt_types.h
On Sun, 24 Apr 2022 15:00:24 -0700, Andi Shyti wrote:
>
> Hi Ashutosh,
>
> On Tue, Apr 19, 2022 at 11:25:05PM -0700, Ashutosh Dixit wrote:
> > From: Dale B Stimson
> >
> > Add a couple of helpers to help formatting pcode commands and improve code
> > readability.
>
> Can you please add some more d
On Sun, 24 Apr 2022 12:08:18 -0700, Andi Shyti wrote:
>
> Hi Ashutosh,
Hi Andi,
> [...]
>
> > -static bool skl_pcode_try_request(struct drm_i915_private *i915, u32 mbox,
> > - u32 request, u32 reply_mask, u32 reply,
> > - u32 *status)
> > +s
On Sun, 24 Apr 2022 14:54:22 -0700, Andi Shyti wrote:
>
> Hi Ashutosh,
>
> On Tue, Apr 19, 2022 at 11:25:04PM -0700, Ashutosh Dixit wrote:
> > Convert appropriate callers to use per-gt pcode functions. Callers using
> > pcode functions at "global scope", including *all* display functions are
> > no
On Sun, 24 Apr 2022 15:05:47 -0700, Andi Shyti wrote:
>
> Hi Ashutosh,
>
> [...]
>
> > +static ssize_t media_RP0_freq_mhz_show(struct device *dev,
> > + struct device_attribute *attr,
> > + char *buff)
> > +{
> > + struct intel_gt
On Wed, 27 Apr 2022 15:45:40 -0700, Patchwork wrote:
>
> Possible regressions
>
> * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
>
> * shard-skl: PASS -> INCOMPLETE
>
> * igt@syncobj_timeline@wait-all-for-submit-snapshot:
>
> * shard-skl: PASS -> FAIL
>
> Warnings
>
> * igt@gem_eio@unwedge-
On Wed, 27 Apr 2022 04:45:03 -0700, Andi Shyti wrote:
>
> Hi Ashutosh,
Hi Andi,
> > > > -static struct kobj_type kobj_gt_type = {
> > > > - .release = kobj_gt_release,
> > > > +static struct kobj_type kobj_gtn_type = {
> > >
> > > what does it mean GTN? Or is it GTn? Please use just GT, gtn
On Sun, 24 Apr 2022 15:36:23 -0700, Andi Shyti wrote:
>
> Hi Andrzej and Ashutosh,
>
> > > > > b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> > > > > index 937b2e1a305e..4c72b4f983a6 100644
> > > > > --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> > > > > +++ b/drivers/gpu/drm/i915/gt/intel_gt_types
On Wed, 27 Apr 2022 10:16:03 -0700, Tvrtko Ursulin wrote:
>
>
> On 27/04/2022 16:43, Dixit, Ashutosh wrote:
> > On Wed, 27 Apr 2022 02:15:35 -0700, Tvrtko Ursulin wrote:
> >>
> >> On 15/04/2022 01:25, Ashutosh Dixit wrote:
> >>> At present i915
On Wed, 27 Apr 2022 02:15:35 -0700, Tvrtko Ursulin wrote:
>
> On 15/04/2022 01:25, Ashutosh Dixit wrote:
> > At present i915 does not fetch busyness information from GuC, resulting in
> > incorrect busyness values in fdinfo. Because engine information is coupled
> > with busyness in fdinfo, skip sh
On Sun, 24 Apr 2022 15:30:59 -0700, Andi Shyti wrote:
>
> Hi Ashutosh,
>
Hi Andi,
> [...]
>
> > -static struct kobj_type kobj_gt_type = {
> > - .release = kobj_gt_release,
> > +static struct kobj_type kobj_gtn_type = {
>
> what does it mean GTN? Or is it GTn? Please use just GT, gtn is
> confus
On Tue, 26 Apr 2022 00:55:26 -0700, Jani Nikula wrote:
>
> On Tue, 19 Apr 2022, Ashutosh Dixit wrote:
> > Each gt contains an independent instance of pcode. Extend pcode functions
> > to interface with pcode on different gt's. Previous (GT0) pcode read/write
> > interfaces are preserved.
>
> Reply
On Mon, 25 Apr 2022 20:13:09 -0700, Patchwork wrote:
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in
> Patchwork_103110v1_full:
>
> IGT changes
>
> Possible regressions
>
> * {igt@i915_pm_disag_freq@media-freq@gt0} (NEW):
>
> * shard-iclb: NOTRUN -> SKIP
On Mon, 25 Apr 2022 02:39:42 -0700, Kamil Konieczny wrote:
>
> Hi Ashutosh,
Hi Kamil,
> On 2022-04-13 at 11:11:06 -0700, Ashutosh Dixit wrote:
> > Retrieve RP0 and RPn freq for media IP from PCODE and display in per-gt
> > sysfs. This patch adds the following files to gt/gtN sysfs:
> > * media_RP
On Thu, 21 Apr 2022 13:57:03 -0700, Rodrigo Vivi wrote:
>
> On Tue, Apr 19, 2022 at 10:21:26PM -0700, Ashutosh Dixit wrote:
>
> > +#define U8_8_VAL_MASK 0x
> > +#define U8_8_SCALE_TO_VALUE "0.00390625"
>
> I really like this style because it gets future proof...
> Well, honestly I
On Sun, 24 Apr 2022 11:43:18 -0700, Andi Shyti wrote:
>
> Hi Ashutosh,
Hi Andi
> [...]
>
> > static int intel_sysfs_rps_init(struct intel_gt *gt, struct kobject *kobj,
> > const struct attribute * const *attrs)
> > {
> > @@ -598,4 +720,12 @@ void intel_gt_sysfs_pm_in
On Wed, 20 Apr 2022 05:17:57 -0700, Andrzej Hajda wrote:
>
> Hi Ashutosh,
Hi Andrzej,
> On 20.04.2022 07:21, Ashutosh Dixit wrote:
> > All kmalloc'd kobjects need a kobject_put() to free memory. For example in
> > previous code, kobj_gt_release() never gets called. The requirement of
> > kobject_
On Wed, 20 Apr 2022 05:17:57 -0700, Andrzej Hajda wrote:
>
> Hi Ashutosh,
Hi Andrzej,
> On 20.04.2022 07:21, Ashutosh Dixit wrote:
> > All kmalloc'd kobjects need a kobject_put() to free memory. For example in
> > previous code, kobj_gt_release() never gets called. The requirement of
> > kobject_
On Fri, 15 Apr 2022 03:21:26 -0700, Rodrigo Vivi wrote:
> On Thu, Apr 14, 2022 at 03:31:07PM -0700, Dixit, Ashutosh wrote:
> > On Thu, 14 Apr 2022 06:28:57 -0700, Jani Nikula wrote:
> > >
> > > On Wed, 13 Apr 2022, Ashutosh Dixit wrote:
> > > > Each gt co
On Fri, 15 Apr 2022 03:31:19 -0700, Rodrigo Vivi wrote:
>
> On Wed, Apr 13, 2022 at 11:11:05AM -0700, Ashutosh Dixit wrote:
> > Add a couple of helpers to help formatting pcode commands and improve code
> > readability.
> >
> > Cc: Mike Ruhl
> > Cc: Rodrigo Vivi
> > Original-author: Dale B Stimso
On Thu, 14 Apr 2022 06:28:57 -0700, Jani Nikula wrote:
>
> On Wed, 13 Apr 2022, Ashutosh Dixit wrote:
> > Each gt contains an independent instance of pcode. Extend pcode functions
> > to interface with pcode on different gt's. Previous (GT0) pcode read/write
> > interfaces are preserved.
>
> The b
On Wed, 13 Apr 2022 18:00:29 -0700, Patchwork wrote:
>
>
> Possible regressions
>
> * igt@gem_lmem_swapping@parallel-random-engines:
>
> * bat-dg1-5: NOTRUN -> FAIL
>
> * bat-dg1-6: NOTRUN -> FAIL
These failures are unrelated. They are showing up everywhere and causing
all recent pre-merge CI re
On Wed, 13 Apr 2022 11:11:07 -0700, Ashutosh Dixit wrote:
>
> All kmalloc'd kobjects need a kobject_put() to free memory. For example in
> previous code, kobj_gt_release() never gets called.
Even if kobj_gt_release() were to get called, the code allocates 'struct
kobj_gt' and frees 'struct kobject
On Wed, 06 Apr 2022 03:09:45 -0700, Anshuman Gupta wrote:
> On 2022-03-24 at 01:24:35 +0530, Ashutosh Dixit wrote:
> > +/* "Caps" frequencies should be converted to MHz using intel_gpu_freq() */
> IMHO, if this exported function deserves a comment, it should Kernel Doc
> comment.
> for an example
Is anyone looking into fixing this:
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c: In function
‘amdgpu_gtt_mgr_recover’:
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c:200:31: error: ‘struct
ttm_range_mgr_node’ has no member named ‘tbo’
amdgpu_ttm_recover_gart(node->tbo);
On Mon, 28 Mar 2022 03:22:27 -0700, Anshuman Gupta wrote:
>
> +#ifdef CONFIG_PM
> +static int i915_runtime_dump_child_status(struct device *dev, void *data)
> +{
> + struct seq_file *m = data;
> + const char *rpm_status;
> +
> + /* Early return if runtime_pm is disabled */
> + if (d
On Thu, 24 Mar 2022 07:26:20 -0700, Matthew Auld wrote:
>
> @@ -554,6 +560,7 @@ igt_main_args("", long_options, help_str, opt_handler,
> NULL)
> igt_fixture {
> free(regions);
> close(i915);
> + igt_i915_driver_unload();
I thought we'd reload the modu
On Thu, 24 Mar 2022 07:26:19 -0700, Matthew Auld wrote:
>
> @@ -353,14 +356,17 @@ static void test_evict(int i915,
> if (flags & TEST_PARALLEL) {
> int fd = gem_reopen_driver(i915);
>
> + ctx = intel_ctx_create_all_physical(fd);
> + __gem_context_set_pers
On Thu, 24 Mar 2022 07:26:18 -0700, Matthew Auld wrote:
>
> On DG2 the object size might be rounded when allocating lmem. Make sure
> we account for any rounding up.
Reviewed-by: Ashutosh Dixit
On Wed, 23 Mar 2022 00:03:23 -0700, Nilawar, Badal wrote:
>
> > +/* "Caps" frequencies should be converted to MHz using intel_gpu_freq() */
> > +void intel_rps_get_freq_caps(struct intel_rps *rps, struct
> > intel_rps_freq_caps *capSis)
>
> Since this function is covering gen6 and above it would b
On Mon, 21 Mar 2022 11:17:46 -0700, Lucas De Marchi wrote:
>
> On Mon, Mar 21, 2022 at 10:56:04AM -0700, Ashutosh Dixit wrote:
> > diff --git a/drivers/gpu/drm/i915/gt/intel_rps_types.h
> > b/drivers/gpu/drm/i915/gt/intel_rps_types.h
> > index 3941d8551f52..5990df35b393 100644
> > --- a/drivers/gp
On Mon, 21 Mar 2022 11:17:46 -0700, Lucas De Marchi wrote:
>
> On Mon, Mar 21, 2022 at 10:56:04AM -0700, Ashutosh Dixit wrote:
> > diff --git a/drivers/gpu/drm/i915/gt/intel_rps_types.h
> > b/drivers/gpu/drm/i915/gt/intel_rps_types.h
> > index 3941d8551f52..5990df35b393 100644
> > --- a/drivers/gp
On Mon, 14 Mar 2022 08:35:17 -0700, Tvrtko Ursulin wrote:
>
> >> Alternatively, all other uapi uses struct i915_engine_class_instance to
> >> address engines which uses u16:u16.
> >>
> >> How ugly it is to stuff a struct into u32 flags is the question... But you
> >> could at least use u16:u16 for
On Tue, 01 Mar 2022 03:03:59 -0800, Matthew Auld wrote:
>
> The shmem mmap and pwrite interfaces conveniently let us probe just a
> few pages, without needing to populate the entire object. On discrete
> and newer platforms the kernel has dropped support for both, leaving us
> with MMAP_OFFSET, whi
On Fri, 18 Feb 2022 14:38:53 -0800, Lucas De Marchi wrote:
>
> The move to softpin in igt is ongoing and should land soon.
> Meanwhile, like was done for ADL and RKL, add an exception to allow
> running the igt display tests before that conversion is complete
> so we can unblock CI.
One example fa
On Tue, 01 Feb 2022 07:19:46 -0800, Tvrtko Ursulin wrote:
>
> From: Tvrtko Ursulin
>
> Print out end user friendly help text when the running user has
> insufficient privilege for accessing system wide performance counters.
Reviewed-by: Ashutosh Dixit
> Signed-off-by: Tvrtko Ursulin
> Issue: h
On Thu, 20 Jan 2022 17:09:28 -0800, john.c.harri...@intel.com wrote:
>
> From: John Harrison
>
> The capture tests require knowing exactly how big the test allocation
> is. Part of the test is to compare the captured size against the
> allocated size to make sure they match. That doesn't work if t
On Thu, 06 Jan 2022 08:42:58 -0800, Tvrtko Ursulin wrote:
>
> From: Tvrtko Ursulin
>
> Commit d7a74b959eea ("tests/i915/perf_pmu: Convert to intel_ctx_t (v3)")
> broke the test when it is run in its entirety.
>
> Correct context id needs to be used with igt_allow_hang to avoid context
> ban preven
On Wed, 05 Jan 2022 09:21:06 -0800, Matthew Auld wrote:
>
> We need to use the FIXED mapping type on discrete platforms.
Reviewed-by: Ashutosh Dixit
> Signed-off-by: Matthew Auld
> Cc: Thomas Hellström
> Cc: Priyanka Dandamudi
> ---
> tests/i915/gem_userptr_blits.c | 5 -
> 1 file change
On Mon, 06 Dec 2021 18:02:39 -0800, Umesh Nerlige Ramappa wrote:
>
> GuC PMU busyness gets gt wakeref if awake, but fails to release the
> wakeref if a reset is in progress. Release the wakeref if it was
> acquried successfully.
>
> v2: Simplify the fix (Ashutosh)
Reviewed-by: Ashutosh Dixit
> S
On Mon, 06 Dec 2021 16:45:42 -0800, Umesh Nerlige Ramappa wrote:
>
> GuC PMU busyness gets gt wakeref if awake, but fails to release the
> wakeref if a reset is in progress. Release the wakeref if it was
> acquried successfully.
>
> Signed-off-by: Umesh Nerlige Ramappa
> ---
> drivers/gpu/drm/i91
On Fri, 03 Dec 2021 07:54:56 -0800, Tvrtko Ursulin wrote:
>
> From: Tvrtko Ursulin
>
> Use the i915 exported data in /proc//fdinfo to show GPU utilization
> per DRM client.
Didn't we just remove it? Adding it back now? Sorry for the probably dumb
question :/
On Tue, 30 Nov 2021 05:20:05 -0800, Anshuman Gupta wrote:
>
> gt_pm selftest calculates engine ticks cycles and wall time
> cycles by delta of respective engine elapsed TIMESTAMP and ktime
> for period of 1000us.
> It compares the engine ticks cycles with wall time cycles.
>
> Disable local cpu int
On Thu, 11 Nov 2021 23:10:16 -0800, Vinay Belgaumkar wrote:
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> index 4e1d3cd29164..22c1c12369f2 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/
On Mon, 01 Nov 2021 18:26:08 -0700, Vinay Belgaumkar wrote:
>
> Add a helper to sort through the SLPC/RPS paths of get/set methods.
> Boost frequency will be modified as long as it is within the constraints
> of RP0 and if it is different from the existing one. We will set min
> freq to boost only
On Mon, 01 Nov 2021 13:28:14 -0700, Dixit, Ashutosh wrote:
>
> On Sun, 31 Oct 2021 21:39:37 -0700, Belgaumkar, Vinay wrote:
> >
> > +static int set_boost_freq(struct intel_rps *rps, u32 val)
>
> Since this is legacy rps code path maybe change function name to
> rps_set_
On Mon, 01 Nov 2021 18:26:07 -0700, Vinay Belgaumkar wrote:
>
> Add helper in RPS code for handling SLPC and non-SLPC paths.
> When boost is requested in the SLPC path, we can ask GuC to ramp
> up the frequency req by setting the minimum frequency to boost freq.
> Reset freq back to the min softlim
On Mon, 01 Nov 2021 18:26:06 -0700, Vinay Belgaumkar wrote:
>
> Define helpers and struct members required to record boost info.
> Boost frequency is initialized to RP0 at SLPC init. Also define num_waiters
> which can track the pending boost requests.
>
> Boost will be done by scheduling a worker
On Mon, 01 Nov 2021 18:26:05 -0700, Vinay Belgaumkar wrote:
>
> Waitboost is a legacy feature implemented in the Host Turbo algorithm. This
> patch set implements it for the SLPC path. A boost can happen when a request
> is waiting for an unmet dependency. GT frequency gets temporarily bumped to
>
On Sun, 31 Oct 2021 21:39:37 -0700, Belgaumkar, Vinay wrote:
>
> +static int set_boost_freq(struct intel_rps *rps, u32 val)
Since this is legacy rps code path maybe change function name to
rps_set_boost_freq?
On Sun, 31 Oct 2021 21:39:36 -0700, Belgaumkar, Vinay wrote:
>
> @@ -945,6 +960,17 @@ void intel_rps_boost(struct i915_request *rq)
> if (!test_and_set_bit(I915_FENCE_FLAG_BOOST, &rq->fence.flags)) {
> struct intel_rps *rps = &READ_ONCE(rq->engine)->gt->rps;
>
> + if
On Sun, 31 Oct 2021 21:39:35 -0700, Belgaumkar, Vinay wrote:
>
> Define helpers and struct members required to record boost info.
> Boost frequency is initialized to RP0 at SLPC init. Also define num_waiters
> which can track the pending boost requests.
>
> Boost will be done by scheduling a worker
On Sun, 31 Oct 2021 21:39:34 -0700, Belgaumkar, Vinay wrote:
>
> Waitboost is a legacy feature implemented in the Host Turbo algorithm. This
> patch set implements it for the SLPC path. A "boost" happens when user
> calls gem_wait ioctl on a submission that has not landed on HW yet.
Afaiu user doe
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