sed some issues in the tests.
>
> Signed-off-by: Stanislav Lisovskiy
Looks good to me,
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/
On Wed, Dec 07, 2022 at 11:35:24PM +0200, Ville Syrjälä wrote:
> On Wed, Dec 07, 2022 at 01:05:15PM -0800, Navare, Manasi wrote:
> > On Wed, Dec 07, 2022 at 05:10:54PM +0200, Ville Syrjälä wrote:
> > > On Mon, Dec 05, 2022 at 12:34:25PM -0800, Navare, Manasi wrote:
> >
by: Stanislav Lisovskiy
Looks good now,
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 50 +
> drivers/gpu/drm/i915/display/intel_dp.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 1 -
> 3 files changed
On Wed, Dec 07, 2022 at 05:10:54PM +0200, Ville Syrjälä wrote:
> On Mon, Dec 05, 2022 at 12:34:25PM -0800, Navare, Manasi wrote:
> > On Fri, Dec 02, 2022 at 03:44:10PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > We are mis
nt to toggle VRR on/off
> via DSB in the future, and as we know DSB can't read registers.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 40 +++-
> 1 file changed, 25 insertions(+), 15 deletion
out a full modeset anyway this seems like the better order
> to follow.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/d
On Fri, Dec 02, 2022 at 03:44:10PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We are miscalculating both the guardband value, and the resulting
> vblank exit length on adl+. This means that our start of vblank
> (double buffered register latch point) is incorrect, and we also
> think
only impact display <13, so as long as we dont
regress anything on TGL then we should be good.
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 13 ++---
> 1 file changed, 2 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/d
Thanks Stan for the explanation,
With that
Reviewed-by: Manasi Navare
Manasi
-Original Message-
From: Lisovskiy, Stanislav
Sent: Tuesday, November 22, 2022 2:40 AM
To: Navare, Manasi D
Cc: intel-gfx@lists.freedesktop.org; Saarinen, Jani ;
Nikula, Jani ; dri-de
On Thu, Nov 03, 2022 at 03:23:00PM +0200, Stanislav Lisovskiy wrote:
> Fix intel_dp_dsc_compute_config, previously timeslots parameter
> was used in fact not as a timeslots, but more like a ratio
> timeslots/64, which of course didn't have any effect for SST DSC,
> but causes now issues for MST
On Thu, Nov 03, 2022 at 03:21:46PM +0200, Stanislav Lisovskiy wrote:
> We might to use that function separately from intel_dp_dsc_compute_config
> for DP DSC over MST case, because allocating bandwidth in that
> case can be a bit more tricky. So in order to avoid code copy-pasta
> lets extract
On Wed, Nov 09, 2022 at 12:36:44PM +0200, Jani Nikula wrote:
> On Wed, 09 Nov 2022, Nischal Varide wrote:
> > A check on mode->clock to see if is greater than i915->max_dotclk_freq
> > or greater than 2 * (i915_max_dotclk_freq) in case of big-joiner and
> > return an -EINVAL in both the cases
>
On Thu, Nov 03, 2022 at 11:32:22AM +0530, Swati Sharma wrote:
> Lets use RUNTIME_INFO->has_dsc since platforms supporting dsc has this
> flag enabled.
>
> This is done based on the review comments received on
> https://patchwork.freedesktop.org/patch/509393/
>
> Signed-off-by: Swati Sharma
>
makes sense since we have seen issues otherwise
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_p
dmi_info struct and not combine
with DP VRR info struct in display info since hdmi info has other HDMI
cap info stored here.
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/drm_edid.c | 26 --
> include/drm/drm_connector.h | 27 ++
Display >=12.
> Bspec: 50490
>
> Signed-off-by: Ankit Nautiyal
Looks good to me
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 11 ++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm
On Mon, Sep 19, 2022 at 05:10:47PM -0400, Rodrigo Vivi wrote:
> On Mon, Sep 19, 2022 at 12:46:45PM -0700, Navare, Manasi wrote:
> > On Fri, Sep 16, 2022 at 05:44:04PM -0700, Anusha Srivatsa wrote:
> > > Add a helper function to get stringify values of the
> > > de
Please find the review commenst for the respective patches.
Also as a general rule, please add/ copy all folks nvolved in offline
discussions/ triage help in order to accelerate reviews and get feedback
from all.
Manasi
On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote:
> This
On Fri, Sep 16, 2022 at 05:44:04PM -0700, Anusha Srivatsa wrote:
> Add a helper function to get stringify values of the
> desired cdclk action and dump it with rest of the
> cdclk config values
>
> Signed-off-by: Anusha Srivatsa
Please add Suggested-by: field to give proper credits as per our
On Mon, Sep 19, 2022 at 12:27:55PM +0300, Jani Nikula wrote:
> On Fri, 16 Sep 2022, Anusha Srivatsa wrote:
> > Populate the new struct steps for squash case.
> >
> > Signed-off-by: Anusha Srivatsa
> > ---
> > drivers/gpu/drm/i915/display/intel_cdclk.c | 9 -
> > 1 file changed, 8
On Mon, Sep 19, 2022 at 12:26:19PM +0300, Jani Nikula wrote:
> On Fri, 16 Sep 2022, Anusha Srivatsa wrote:
> > The struct has the action to be performed - squash, crawl
> > or modeset and the corresponding cdclk which is the desired
> > cdclk. This is the structure that gets populated during
> >
On Fri, Aug 19, 2022 at 05:58:20PM -0700, Anusha Srivatsa wrote:
> Apart from checking if squashing can be performed,
> accommodate accessing in-flight cdclk state for any changes
> that are needed during commit phase.
>
> v2: Move squashing bits to switch case.(Anusha)
>
> Cc: Jani Nikula
>
On Fri, Aug 19, 2022 at 05:58:19PM -0700, Anusha Srivatsa wrote:
> This is a prep patch for what the rest of the series does.
>
> Add existing actions that change cdclk - squash, crawl, modeset to
> intel_cdclk_state so we have access to the cdclk values
> that are in transition.
>
> Cc: Jani
rged at the
same time else IGT will throw err
Reviewed-by: Manasi Navare
Manasi
> ---
> .../drm/i915/display/intel_display_debugfs.c | 27 +--
> .../drm/i915/display/intel_display_types.h| 2 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 21 ---
On Sat, Aug 27, 2022 at 12:34:53AM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Rename info->monitor_range to info->vrr_range to actually
> reflect its usage.
Okay makes sense.
Reviewed-by: Manasi Navare
Manasi
>
> Cc: Manasi Navare
> Cc: Nicholas Kazla
for adding this description for monitor_range
Reviewed-by: Manasi Navare
Manasi
> Cc: Manasi Navare
> Cc: Nicholas Kazlauskas
> Cc: Harry Wentland
> Cc: Leo Li
> Cc: Rodrigo Siqueira
> Cc: amd-...@lists.freedesktop.org
> Signed-off-by: Ville Syrjälä
> ---
> drivers/g
monitor_range->min_vfreq += 255;
> + if (data->pad2 & DRM_EDID_RANGE_OFFSET_MAX_VFREQ)
> + monitor_range->max_vfreq += 255;
Yes this makes sense. This looks like added for supporting HRR (high
refresh rate) panels.
Do you think we sh
On Thu, Aug 11, 2022 at 10:33:51AM +0300, Lisovskiy, Stanislav wrote:
> On Wed, Aug 10, 2022 at 04:02:08PM -0400, Lyude Paul wrote:
> > Btw, what's the plan for this? Figured I'd ask since I noticed this on the
> > ML,
> > nd I'm now finishing up getting the atomic only MST patches I've been
> >
On Tue, May 17, 2022 at 12:56:36PM +0530, Bhanuprakash Modem wrote:
> This function sets the vrr_enabled property for crtc based
> on the platform support and the request from userspace.
>
> V2: Check for platform support before updating the prop.
> V3: Don't attach vrr_enabled prop, as it is
On Tue, May 17, 2022 at 12:56:35PM +0530, Bhanuprakash Modem wrote:
> Modern display hardware is capable of supporting variable refresh rates.
> This patch introduces helpers to attach and set "vrr_enabled" property
> on the crtc to allow userspace to query VRR enabled status on that crtc.
>
>
Jani, I have cleaned up the hsw_crtc_enable now removing the unused
function calls.
Could you please take a look?
Regards
Manasi
On Thu, May 12, 2022 at 12:52:04PM -0700, Manasi Navare wrote:
> Currently we reuse hsw_crtc_enable for SKL+ platforms.
> But this has added a lot of platform checks
On Thu, May 12, 2022 at 12:45:09PM +0300, Jani Nikula wrote:
> On Wed, 11 May 2022, Manasi Navare wrote:
> > Currently we reuse hsw_crtc_enable for SKL+ platforms.
> > But this has added a lot of platform checks for SKL+ platforms.
> > So its time to move the code to a separate crtc_enable hook
>
On Mon, Apr 25, 2022 at 12:16:11PM +0530, Bhanuprakash Modem wrote:
> Modern display hardware is capable of supporting variable refresh rates.
> This patch introduces helpers to attach and set "vrr_enabled" property
> on the crtc to allow userspace to query VRR enabled status on that crtc.
>
>
bc_state_cache")
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/disp
code got moved
> into intel_fbc_check_plane() from somewhere else tht did return
> a boolean.
>
> No functional issue here since false==0.
>
> Signed-off-by: Ville Syrjälä
Good catch
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 8 +
separate functions
Does this refactoring make sense?
Manasi
On Thu, Mar 17, 2022 at 09:14:16PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 17, 2022 at 12:05:47PM -0700, Navare, Manasi wrote:
> > On Thu, Mar 17, 2022 at 08:52:52PM +0200, Ville Syrjälä wrote:
> > > On Tue, Mar 15, 2022 a
On Thu, Mar 17, 2022 at 08:52:52PM +0200, Ville Syrjälä wrote:
> On Tue, Mar 15, 2022 at 04:38:56PM -0700, Manasi Navare wrote:
> > This patch abstracts pieces of hsw_crtc_enable corresponding to different
> > Bspec enable sequence steps into separate functions.
> > This helps to call them in a
On Thu, Mar 17, 2022 at 11:28:03AM -0700, Navare, Manasi wrote:
> On Thu, Mar 17, 2022 at 05:35:43PM +0200, Jani Nikula wrote:
> > On Wed, 16 Mar 2022, "Navare, Manasi" wrote:
> > > On Wed, Mar 16, 2022 at 09:48:17AM +0200, Jani Nikula wrote:
> > >> O
On Thu, Mar 17, 2022 at 05:35:43PM +0200, Jani Nikula wrote:
> On Wed, 16 Mar 2022, "Navare, Manasi" wrote:
> > On Wed, Mar 16, 2022 at 09:48:17AM +0200, Jani Nikula wrote:
> >> On Tue, 15 Mar 2022, Manasi Navare wrote:
> >> > This patch abstracts
On Wed, Mar 16, 2022 at 09:48:17AM +0200, Jani Nikula wrote:
> On Tue, 15 Mar 2022, Manasi Navare wrote:
> > This patch abstracts pieces of hsw_crtc_enable corresponding to different
> > Bspec enable sequence steps into separate functions.
> > This helps to call them in a specific order for
Ville Syrjälä
Looks good
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_drrs.c | 16 +++-
> 1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c
> b/drivers/gpu/drm/i915/di
On Fri, Mar 04, 2022 at 05:10:33PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 03, 2022 at 02:41:23PM -0800, Navare, Manasi wrote:
> > On Wed, Feb 23, 2022 at 03:13:15PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > When using bigjoiner it
On Thu, Mar 10, 2022 at 01:43:57AM +0200, Ville Syrjälä wrote:
> On Thu, Mar 03, 2022 at 03:32:22PM -0800, Manasi Navare wrote:
> > With some VRR panels, user can turn VRR ON/OFF on the fly from the panel
> > settings.
> > When VRR is turned OFF ,sends a long HPD to the driver clearing the Ignore
Hi Ville,
Here the VRR set/reset moved to set/unset edid like you suggested.
Anything else needed here?
Manasi
On Thu, Mar 03, 2022 at 03:32:22PM -0800, Manasi Navare wrote:
> With some VRR panels, user can turn VRR ON/OFF on the fly from the panel
> settings.
> When VRR is turned OFF ,sends a
On Wed, Feb 23, 2022 at 03:13:15PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> When using bigjoiner it's useful to know the offset of each
> individual pipe in the whole set of joined pipes. Let's include
> that information in our PIPESRC rectangle. With this we can make
> the plane
On Thu, Feb 24, 2022 at 12:35:59PM +0200, Ville Syrjälä wrote:
> On Wed, Feb 23, 2022 at 12:00:28PM -0800, Navare, Manasi wrote:
> > On Wed, Feb 23, 2022 at 03:13:14PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Replace the hardcoded 2 p
f yet
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 15 ++--
> drivers/gpu/drm/i915/display/intel_cursor.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 55 ++-
> .../drm/
On Tue, Mar 01, 2022 at 09:34:54PM +0200, Ville Syrjälä wrote:
> On Tue, Mar 01, 2022 at 11:30:52AM -0800, Navare, Manasi wrote:
> > Hi Ville,
> >
> > Does it make sense to add the set prop in intel_dp_Set_edid but keep the
> > reset to false
> > in int
Hi Ville,
Does it make sense to add the set prop in intel_dp_Set_edid but keep the reset
to false
in intel_dp_detect where we clear other parameters?
Manasi
On Fri, Feb 25, 2022 at 05:11:02PM -0800, Navare, Manasi wrote:
> On Fri, Feb 25, 2022 at 11:13:35AM +0200, Ville Syrjälä wr
On Fri, Feb 25, 2022 at 11:13:35AM +0200, Ville Syrjälä wrote:
> On Thu, Feb 24, 2022 at 05:30:55PM -0800, Manasi Navare wrote:
> > With some VRR panels, user can turn VRR ON/OFF on the fly from the panel
> > settings.
> > When VRR is turned OFF ,sends a long HPD to the driver clearing the Ignore
Hi,
I fixed the regression in this patch and resent it, it still has BAT failures,
I wanted to understand if it failed to boot some of the machines again or the
errors flagged here are the known errors.
Regards
Manasi
From: Patchwork
Sent: Thursday, February 24, 2022 10:45 AM
To: Navare
On Wed, Feb 23, 2022 at 03:13:14PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Replace the hardcoded 2 pipe assumptions when we're massaging
> pipe_mode and the pipe_src rect to be suitable for bigjoiner.
> Instead we can just count the number of pipes in the bitmask.
>
> v2:
gjoiner state tracking to use the
> pipe bitmask")
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu
On Wed, Feb 23, 2022 at 10:29:16AM +0200, Jani Nikula wrote:
> On Wed, 23 Feb 2022, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > This reverts commit 9bc34b4d0f3cb368241684cc5e0445d435dded44.
> >
> > Just oopses on most machines.
> >
> > Cc: Manasi Navare
> > Cc: Jani Nikula
> >
3e63a141 ("drm/i915:
> Clear most of crtc state when disabling the crtc") but then
> commit 19f65a3dbf75 ("drm/i915: Try to make bigjoiner work in atomic
> check") undid it all :(
>
> Signed-off-by: Ville Syrjälä
okay agree
Reviewed-by: Manasi Navare
Manasi
>
off-by: Ville Syrjälä
Yup makes sense to have this debug
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display
er why that got added here
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/int
off-by: Ville Syrjälä
Okay looks good to have more debug info here
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_di
y: Ville Syrjälä
So basically always print the debugfs even for crtcs that are not enabled to
catch any stale state?
Reviewed-by: Manasi Navare
Manasi
> ---
> .../gpu/drm/i915/display/intel_display_debugfs.c | 16 +++-
> 1 file changed, 7 insertions(+), 9 deletions(-)
>
On Fri, Feb 18, 2022 at 10:36:00AM +0200, Jani Nikula wrote:
> On Thu, 17 Feb 2022, "Navare, Manasi" wrote:
> > Hi Jani,
> >
> > This addresses the review comments, could you please take a look at thsi
> > patch?
>
> Sorry for the delay,
>
> R
Hi Jani,
This addresses the review comments, could you please take a look at thsi patch?
Manasi
On Tue, Feb 15, 2022 at 12:26:01PM -0800, Manasi Navare wrote:
> With some VRR panels, user can turn VRR ON/OFF on the fly from the panel
> settings.
> When VRR is turned OFF ,sends a long HPD to
>
> Signed-off-by: Ville Syrjälä
Patch looks good, perhaps can be squashed with Patch 10 ?
But either ways
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 23 +++-
> 1 file changed, 13 insertions(+), 10 deletions(-)
>
bigjoiner_master_pipe(master_crtc_state)))
> + return -EINVAL;
>
> - if (slave_pipes & ~bigjoiner_pipes(i915)) {
> + if (master_crtc_state->bigjoiner_pipes & ~bigjoiner_pipes(i915)) {
So here we are making sure that in compute_config if master pipe = D
e
> - user mode crtc timings == full timings
>
> Yes, that is a lot of timings. One day we'll try to remove
> some of the ones we don't actually need to keep around...
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/di
ll pimp the debugs while at it.
>
> Signed-off-by: Ville Syrjälä
Yup looks lot more organized
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 28 ++--
> 1 file changed, 20 insertions(+), 8 deletions(-)
>
> diff --git a
On Tue, Feb 15, 2022 at 08:32:02PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> intel_crtc_compute_config() doesn't really tell a unified story.
> Let's chunk it up into pieces. We'll start with
> intel_crtc_compute_pipe_src().
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi
On Tue, Feb 15, 2022 at 08:32:01PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Deduplicate the code to convert the full timings to
> per-pipe timings for bigjoiner usage.
>
> Signed-off-by: Ville Syrjälä
Makes sense to have a helper to do this:
Reviewed-by: Mana
e old
> nameing conventions elsewhere.
>
> Signed-off-by: Ville Syrjälä
Yes the name cleanup looks good, would be good to call out "No functional
changes" in the
commit message.
With that
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_displ
On Wed, Feb 16, 2022 at 10:39:56AM +0200, Ville Syrjälä wrote:
> On Tue, Feb 15, 2022 at 07:25:36PM -0800, Navare, Manasi wrote:
> > On Tue, Feb 15, 2022 at 08:31:57PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Adjust the cursor dst
On Tue, Feb 15, 2022 at 08:31:57PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Adjust the cursor dst coordinates appripriately when it's on
> the bigjoiner slave pipe. intel_atomic_plane_check_clipping()
> already did this but with the cursor we discard those results
> (apart from
On Tue, Feb 15, 2022 at 07:07:27PM +0530, Anshuman Gupta wrote:
> Since OpRegion ver 2.1 MBOX3 RVDA field is Relative address of Raw
> VBT data from OpRegion Base.
> Populate the opreion->rvda accordingly.
> As Intel DGFX cards supports OpRegion version 2.2 or greater,
> RVDA as an absolute VBT
On Tue, Feb 15, 2022 at 07:07:23PM +0530, Anshuman Gupta wrote:
> Abstract opregion operations like get opregion base, get rvda and
> opregion cleanup in form of i915_opregion_ops.
> This will be required to converge igfx and dgfx opregion.
>
> v2:
> - Keep only function pointer abstraction
On Tue, Feb 15, 2022 at 07:07:26PM +0530, Anshuman Gupta wrote:
> On igfx cards ACPI OpRegion retrieve through ASLS.
> System BIOS writes ASLS address to pci config space(0xFC) but
> on discrete cards OpRegion is part of PCI Option ROM(OPROM) along
> with other firmware images, i915 is interested
this be just combined with the patch that would use the
slave and mastr pipes
in the readout ?
Either way,
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 25 +++-
> 1 file changed, 14 insertions(+), 11 deletions(-)
>
&g
On Thu, Feb 03, 2022 at 08:38:21PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Convert a few hand roller for_each_intel_crtc_in_pipe_mask()
> to the real thing.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
> ---
> driv
ask, and rename it to
> for_each_intel_crtc_in_pipe_mask() to make it clear what
> it does.
>
> The current users of for_each_intel_crtc_mask() don't really
> care which kind of mask we use, but for other uses a pipe
> mask if better.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
On Mon, Feb 07, 2022 at 09:31:19AM +0200, Ville Syrjälä wrote:
> On Fri, Feb 04, 2022 at 03:58:29PM -0800, Navare, Manasi wrote:
> > On Thu, Feb 03, 2022 at 08:38:23PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Get rid of the inflexible
On Thu, Feb 03, 2022 at 08:38:23PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Get rid of the inflexible bigjoiner_linked_crtc pointer thing
> and just track things as a bitmask of pipes instead. We can
> also nuke the bigjoiner_slave boolean as the role of the pipe
> can be determined
On Thu, Feb 03, 2022 at 08:38:19PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Introduce helpers to query whether the crtc is the slave/master
> for bigjoiner. This decouples most places from the exact
> state layout we use to track this relationship, allowing us
> to change and extend
On Thu, Feb 03, 2022 at 08:38:18PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Remove all the dead code from icl_ddi_bigjoiner_pre_enable().
>
> Signed-off-by: Ville Syrjälä
Yup good catch here and thank you for cleaning up the dead code
Reviewed-by: Manasi
m copy-paste fail
>
> Signed-off-by: Ville Syrjälä
Yup looks good
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 14 +-
> 1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/dis
On Fri, Feb 04, 2022 at 09:20:49AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Currently the bigjoiner state copy logic is kind of
> a byzantine mess.
>
> Clean it up to operate in the following manner during a full
> modeset:
> 1) master uapi -> hw state copy
> 2) master hw -> slave
in intel_atomic_check_bigjoiner(). All we have to care
> about is whether bigjoiner is needed for the new state,
> and whether we can get the slave crtc we need.
>
> Signed-off-by: Ville Syrjälä
Completely agree with this cleanup, makes it so much easier to add new future
code
On Thu, Feb 03, 2022 at 08:38:15PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We seem to be missing a few things from the bigjoiner state copy.
> Namely hw.mode isn't getting copied (which probably causes PIPESRC
> to be misconfigured), CTM/LUTs aren't getting copied (which could
>
> flag the prop change as a modeset ourselves. Assuming nothing else
> has changed the operation will get promoted (demoted?) to a fastset
> later.
>
> Signed-off-by: Ville Syrjälä
Makes sense, although not sure why this was sent as part of bigjoiner bitmask
series
Revie
On Mon, Jan 31, 2022 at 02:28:04PM +0200, Jani Nikula wrote:
> On Wed, 26 Jan 2022, Manasi Navare wrote:
> > With some VRR panels, user can turn VRR ON/OFF on the fly from the panel
> > settings.
> > When VRR is turned OFF ,sends a long HPD to the driver clearing the Ignore
> > MSA bit
> > in
Hi Jani,
I have addressed your review comments, could you take a look at this patch,
this is needed by one of our customers.
Manasi
On Wed, Jan 26, 2022 at 11:53:04AM -0800, Manasi Navare wrote:
> With some VRR panels, user can turn VRR ON/OFF on the fly from the panel
> settings.
> When VRR
On Fri, Jan 14, 2022 at 02:33:29PM +0200, Jani Nikula wrote:
> On Wed, 12 Jan 2022, Manasi Navare wrote:
> > With some VRR panels, user can turn VRR ON/OFF on the fly from the panel
> > settings.
> > When VRR is turned OFF ,sends a long HPD to the driver clearing the Ignore
> > MSA bit
> > in
e.
For the bigjoiner check aroind intel_dsc_enable(), I think the function
intel_dsc_dp_pps_write(encoder, crtc_state);
also needs to be moved into that check.
And then this functions needs to be called from icl_ddi_bigjoiner_pre_enable()
where we call intel_dsc_enable
With that:
Revi
On Tue, Jan 18, 2022 at 06:34:20PM +0200, Ville Syrjälä wrote:
> On Fri, Oct 22, 2021 at 12:51:12PM -0700, Navare, Manasi wrote:
> >
> > Hi Ville,
> >
> > Could you take a look at this, this addresses teh review comments from prev
> > version
>
> I
On Mon, Jan 10, 2022 at 08:24:54PM -0800, Kulkarni, Vandita wrote:
> > -Original Message-
> > From: Navare, Manasi D
> > Sent: Tuesday, January 11, 2022 1:07 AM
> > To: Kulkarni, Vandita
> > Cc: Nikula, Jani ; Lisovskiy, Stanislav
> >
4PM -0800, Kulkarni, Vandita wrote:
> Revisiting this thread after update from the bspec.
>
> > -Original Message-
> > From: Nikula, Jani
> > Sent: Tuesday, September 14, 2021 8:40 PM
> > To: Kulkarni, Vandita ; Lisovskiy, Stanislav
> >
> > Cc: Ville Syrjäl
@Jani , @Ville, can you take a look at this, this was how the original DSC
patches
clamped the max bpp, but with latest DSC changes looks like this is not
obeyed anymore and needs to be fixed.
Manasi
On Thu, Nov 11, 2021 at 03:09:49PM -0800, Manasi Navare wrote:
> Pipe_bpp limits are decided by
On Wed, Nov 17, 2021 at 03:09:45PM -0800, Navare, Manasi wrote:
> On Wed, Nov 17, 2021 at 11:04:05PM +0200, Ville Syrjälä wrote:
> > On Wed, Nov 17, 2021 at 01:10:13PM -0800, Navare, Manasi wrote:
> > > On Wed, Nov 17, 2021 at 08:31:02PM +0200, Ville Syrjala wrote:
> >
On Wed, Nov 17, 2021 at 11:04:05PM +0200, Ville Syrjälä wrote:
> On Wed, Nov 17, 2021 at 01:10:13PM -0800, Navare, Manasi wrote:
> > On Wed, Nov 17, 2021 at 08:31:02PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Let's adjust the vblank e
djusted already.
>
> Cc: Manasi Navare
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_
On Wed, Nov 17, 2021 at 08:31:02PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Let's adjust the vblank evasion to account for the case where
> a push has already been sent. In that case the vblank exit will start
> at vmin vblank start (as opposed to vmax vblank start when no push
>
sh after enabling IRQs but I think it makes
sense to send push just before enabling IRQs so avoid the vblank
termination getting delayed due to IRQs
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_crtc.c | 19 ---
> 1 file changed, 16 insertion
On Mon, Nov 01, 2021 at 12:25:21PM +0200, Jani Nikula wrote:
> On Mon, 28 Jun 2021, Madhumitha Tolakanahalli Pradeep
> wrote:
> > PCH display HPD IRQ is not detected with default filter value.
> > So, PP_CONTROL is manually reprogrammed.
>
> Returning to this workaround.
>
> You're not
On Mon, Nov 01, 2021 at 09:35:32PM -0700, Kulkarni, Vandita wrote:
> > -Original Message-
> > From: Navare, Manasi D
> > Sent: Tuesday, November 2, 2021 10:11 AM
> > To: Kulkarni, Vandita
> > Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani
> > Su
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