[PATCH] lib/string: fix size computation and str_vprintf

--- lib/string.c |9 - 1 files changed, 4 insertions(+), 5 deletions(-) diff --git a/lib/string.c b/lib/string.c index 6b9fadc..32a1b55 100644 --- a/lib/string.c +++ b/lib/string.c @@ -55,9 +55,9 @@ int str_resize(struct string *str, unsigned long capacity) return 0; } -sta

[PATCH] Add myself to AUTHORS

Signed-off-by: Arthur HUILLET --- AUTHORS |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/AUTHORS b/AUTHORS index 92693d2..417ea18 100644 --- a/AUTHORS +++ b/AUTHORS @@ -24,3 +24,8 @@ L: Oslo, Norway N: Saeed Siam D: Array handling, VMT L: Dhaka, Bangladesh + +N

[PATCH] Added dependencies installation instructions for Arch Linux

Signed-off-by: Arthur HUILLET --- README |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/README b/README index cd32316..15122b0 100644 --- a/README +++ b/README @@ -33,6 +33,10 @@ How can I try it out? $ su $ pkg install SUNWgnome-common-devel SUNWgcc

[PATCH] Added dependencies installation instructions for Arch Linux

Signed-off-by: Arthur HUILLET --- This patch applies cleanly. Sorry. :) README |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/README b/README index 78d61fa..1b0cb7b 100644 --- a/README +++ b/README @@ -33,6 +33,10 @@ How can I try it out? $ su $ pkg

[PATCH] Added dependencies installation instructions for Arch Linux

Signed-off-by: Arthur HUILLET --- README |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/README b/README index 03985d6..970bdcd 100644 --- a/README +++ b/README @@ -29,6 +29,10 @@ How can I try it out? $ su $ make install ; exit + For Archlinux

[PATCH] Add myself to AUTHORS

Signed-off-by: Arthur HUILLET --- AUTHORS |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/AUTHORS b/AUTHORS index 8fe5c9f..cb33d28 100644 --- a/AUTHORS +++ b/AUTHORS @@ -19,3 +19,8 @@ L: Oslo, Norway N: Saeed Siam D: Array handling, VMT L: Dhaka, Bangladesh + +N

Re: [PATCH 3/3] spill-reload: Use radix_tree_lookup() in insert_mov_insns()

by empty basic blocks. > > Cc: Arthur HUILLET > Cc: Tomek Grabiec > Signed-off-by: Pekka Enberg > --- > jit/basic-block.c | 16 +--- > jit/spill-reload.c |2 +- > 2 files changed, 2 insertions(+), 16 deletions(-) > > diff --git a/jit/basic-bloc

Re: [PATCH 2/2] jit: introduce per-edge data flow resolution blocks

Hi, On Sat, 8 Aug 2009 12:43:50 +0200 Tomek Grabiec wrote: > When resolving data flow we can not emit reload instructions at the > end of a basic block. That's because the register we are reloading to > might be allocated to another interval at the end of this > block. Especially, it can be use

[PATCH] jit: fix split_interval_at to handle fixed intervals correctly

Signed-off-by: Arthur HUILLET --- jit/interval.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/jit/interval.c b/jit/interval.c index 8a7620f..9ad9d97 100644 --- a/jit/interval.c +++ b/jit/interval.c @@ -74,6 +74,10 @@ struct live_interval *split_interval_at(struct

[PATCH 4/4] jit: fix bb_last_insn so it returns the last LIR instruction of the block

. This is a bugfix. Signed-off-by: Arthur HUILLET --- jit/basic-block.c | 16 +++- 1 files changed, 15 insertions(+), 1 deletions(-) diff --git a/jit/basic-block.c b/jit/basic-block.c index 0a13062..4cd642e 100644 --- a/jit/basic-block.c +++ b/jit/basic-block.c @@ -154,7 +154,21

[PATCH 2/4] jit: bug fixes in control flow resolution (regalloc)

Signed-off-by: Arthur HUILLET --- jit/spill-reload.c | 36 ++-- 1 files changed, 22 insertions(+), 14 deletions(-) diff --git a/jit/spill-reload.c b/jit/spill-reload.c index 8750dae..520e6d7 100644 --- a/jit/spill-reload.c +++ b/jit/spill-reload.c @@ -186,31

[PATCH 3/4] jit: bugfix for control flow resolution when a live interval ends at a basic block boundary

Signed-off-by: Arthur HUILLET --- jit/spill-reload.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/jit/spill-reload.c b/jit/spill-reload.c index 520e6d7..61b97ff 100644 --- a/jit/spill-reload.c +++ b/jit/spill-reload.c @@ -196,7 +196,7 @@ static void insert_mov_insns

[PATCH 1/4] jit: add prev_child field to struct live_interval

We need that for the register allocator. Signed-off-by: Arthur HUILLET --- include/jit/vars.h |2 +- jit/interval.c |1 + 2 files changed, 2 insertions(+), 1 deletions(-) diff --git a/include/jit/vars.h b/include/jit/vars.h index b567116..a697b1c 100644 --- a/include/jit/vars.h

Re: [PATCH] jit: fix control flow resolution in regalloc

Hi, On Fri, 24 Jul 2009 22:44:15 +0200 Arthur HUILLET wrote: > Signed-off-by: Arthur HUILLET > --- > jit/spill-reload.c |4 ++-- > regression/jvm/RegisterAllocatorTortureTest.java |5 ++--- > 2 files changed, 4 insertions(+), 5 deletions(

[PATCH] jit: fix control flow resolution in regalloc

Signed-off-by: Arthur HUILLET --- jit/spill-reload.c |4 ++-- regression/jvm/RegisterAllocatorTortureTest.java |5 ++--- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/jit/spill-reload.c b/jit/spill-reload.c index 489cefe..8750dae 100644

[PATCH] regression: System.out.write(int) now works. Enable the test.

Signed-off-by: Arthur HUILLET --- regression/jvm/PrintTest.java |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/regression/jvm/PrintTest.java b/regression/jvm/PrintTest.java index d0789e6..6746a9b 100644 --- a/regression/jvm/PrintTest.java +++ b/regression/jvm

Re: [RFC PATCH 3/3] WIP bits for control flow resolution

Hi, if you apply this series, you can help me work on the bug. On Thu, 23 Jul 2009 23:24:50 +0200 Arthur HUILLET wrote: > From: Arthur Huillet > > DO NOT MERGE THIS !!! > > Signed-off-by: Arthur Huillet > diff --git a/Makefile b/Makefile > index 58ad9db..55de435 10

[RFC PATCH 1/3] jit: add bb_first_insn and bb_last_insn

From: Arthur Huillet Those functions are to be used by the register allocator when resolving control flow. Signed-off-by: Arthur Huillet --- include/jit/basic-block.h |2 ++ jit/basic-block.c | 10 ++ 2 files changed, 12 insertions(+), 0 deletions(-) diff --git a

[PATCH 2/3] jit: add vreg_start_interval and interval_child_at

From: Arthur Huillet Those functions will be used by the register allocator when doing control flow resolution. Signed-off-by: Arthur Huillet --- include/jit/vars.h |4 +++- jit/interval.c | 33 + 2 files changed, 36 insertions(+), 1 deletions

[RFC PATCH 3/3] WIP bits for control flow resolution

From: Arthur Huillet DO NOT MERGE THIS !!! Signed-off-by: Arthur Huillet diff --git a/Makefile b/Makefile index 58ad9db..55de435 100644 --- a/Makefile +++ b/Makefile @@ -256,6 +256,7 @@ REGRESSION_TEST_SUITE_CLASSES = \ regression/jvm/PutstaticTest.class \ regression/jvm

[RFC PATCH] Control flow resolution WIP patch

Signed-off-by: Arthur Huillet --- Hi, this is my work in progress patch. It does not make substringtest work yet, and I'm afraid I won't be able to get it done today as I was planning to. I am not sure what went wrong yet. Anyway you have my comp

[PATCH] x86: add INSN_PUSH_MEMBASE

This will be necessary for stack slot copies when doing control flow resolution. Signed-off-by: Arthur Huillet --- arch/x86/emit-code.c|8 arch/x86/include/arch/instruction.h |1 + arch/x86/lir-printer.c |7 +++ arch/x86/use-def.c

Re: [PATCH] x86: ESP and EBP are of GPR type

+0200, Arthur Huillet wrote: > Signed-off-by: Arthur Huillet > --- > arch/x86/registers_32.c |2 ++ > 1 files changed, 2 insertions(+), 0 deletions(-) > > diff --git a/arch/x86/registers_32.c b/arch/x86/registers_32.c > index ecce9df..463572b 100644 > --- a/arch/x86/re

[PATCH] x86: ESP and EBP are of GPR type

Signed-off-by: Arthur Huillet --- arch/x86/registers_32.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/x86/registers_32.c b/arch/x86/registers_32.c index ecce9df..463572b 100644 --- a/arch/x86/registers_32.c +++ b/arch/x86/registers_32.c @@ -34,6 +34,8 @@ static

[PATCH] jit: add control flow resolving to the register allocator

This fixes bug encountered when compiling Substring(). --- include/jit/vars.h |5 ++- jit/interval.c | 33 +++ jit/linear-scan.c |1 + jit/spill-reload.c | 113 +++- 4 files changed, 141 insertions(+), 11 deletions(-) dif

[PATCH] x86: speed up floating point value argument passing

We now push directly the floating point immediate value when we have one instead of going through the XMM registers back to memory. Signed-off-by: Arthur Huillet --- arch/x86/insn-selector_32.brg | 14 +- 1 files changed, 13 insertions(+), 1 deletions(-) diff --git a/arch/x86

[PATCH] x86: performance improvements at the beginning of functions

introduce freg: EXPR_LOCAL and stmt_store: STMT_STORE(EXPR_TEMPORARY, EXPR_LOCAL) Signed-off-by: Arthur Huillet --- arch/x86/insn-selector_32.brg | 44 +++- 1 files changed, 42 insertions(+), 2 deletions(-) diff --git a/arch/x86/insn-selector_32.brg b

[PATCH] x86: floating point returning is now ABI conformant

We use the top of the x87 stack as is specified by the i386 SystemV ABI. Signed-off-by: Arthur Huillet --- arch/x86/emit-code.c| 12 +++ arch/x86/include/arch/instruction.h |3 + arch/x86/insn-selector_32.brg | 126 ++- arch/x86

[PATCH] x86: factorize code for INVOKE and FINVOKE

Signed-off-by: Arthur Huillet --- arch/x86/insn-selector_32.brg | 125 - 1 files changed, 48 insertions(+), 77 deletions(-) diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg index 35d9ecb..857f2a9 100644 --- a/arch/x86/insn

[PATCH] x86: factorize code for INVOKEVIRTUAL and FINVOKEVIRTUAL

Signed-off-by: Arthur Huillet --- arch/x86/insn-selector_32.brg | 108 +++-- 1 files changed, 40 insertions(+), 68 deletions(-) diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg index 0e8e84f..35d9ecb 100644 --- a/arch/x86/insn

[PATCH] x86: implement OP_FREM

This calls the C function fmodf() as the VM Spec suggests. Signed-off-by: Arthur Huillet --- arch/x86/insn-selector_32.brg | 21 + regression/jvm/FloatArithmeticTest.java |9 +++-- 2 files changed, 28 insertions(+), 2 deletions(-) diff --git a/arch/x86

[PATCH] x86: implement f2i and i2f

This is done by extending the HIR with two new EXPR_CONVERSION : EXPR_CONVERSION_{TO,FROM}_FLOAT. Signed-off-by: Arthur Huillet --- arch/x86/insn-selector_32.brg | 38 ++ include/jit/expression.h|4 +++ jit/expression.c

[PATCH] regression: add integer<->float conversion tests

Disabled until conversion is implemented. Signed-off-by: Arthur Huillet --- regression/jvm/FloatArithmeticTest.java | 18 +- 1 files changed, 17 insertions(+), 1 deletions(-) diff --git a/regression/jvm/FloatArithmeticTest.java b/regression/jvm/FloatArithmeticTest.java index

[PATCH] x86: float remainder is FREM in the HIR

Not implemented for now because the emulation function returns float, and we cannot talk to functions returning floats that respect the ABI for now. Signed-off-by: Arthur Huillet --- include/jit/expression.h |1 + jit/arithmetic-bc.c |2 +- jit/tree

[PATCH 2/2] x86: improve FPU support

- fix moving floats between GPR and XMM registers - implemented FSUB FMUL and FDIV, cannot be fully tested yet - implemented FCMPL - missing : FNEG, FREM, and more importantly functions returning float are not doing it properly yet. Signed-off-by: Arthur Huillet --- arch/x86/emit-code.c

[PATCH 1/2] x86: fix cvtsi2ss and cvtss2si code emission

source and destination registers were swapped Signed-off-by: Arthur Huillet --- arch/x86/emit-code.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/emit-code.c b/arch/x86/emit-code.c index 577df05..e58dae6 100644 --- a/arch/x86/emit-code.c +++ b/arch/x86

[PATCH 2/2] x86: add float <-> int conversions

This uses "conditional rules" for EXPR_CONVERSION in order to catch the right terminals (both produced and kids) without cluttering HIR with new FLOAT_TO_INT_CONVERSION and INT_TO_FLOAT_CONVERSION. Signed-off-by: Arthur Huillet --- arch/x86/insn-selector_32.

Conditional rules in Monoburg

Hi, I mentionned, several times in the past, that I would have liked to have conditional rules in Monoburg. A conditional rule is a rule whose application depends not only on the tree pattern, but also on an arbitrary condition computed on the relevant tree nodes, such as the ->vm_type field of o

Conditional rules in Monoburg

Hi, I mentionned, several times in the past, that I would have liked to have conditional rules in Monoburg. A conditional rule is a rule whose application depends not only on the tree pattern, but also on an arbitrary condition computed on the relevant tree nodes, such as the ->vm_type field of o

[PATCH] monoburg: add MB_DISCARD_RULE

This makes "conditional rules" easier to implement and clearer to the reader. Signed-off-by: Arthur Huillet --- arch/x86/insn-selector_32.brg |2 ++ arch/x86/insn-selector_64.brg |1 + monoburg/monoburg.c |2 +- 3 files changed, 4 insertions(+), 1 deletions(-)

[PATCH] x86: fix FMUL FDIV FCMPL, implement FNEG, enable FloatArithmeticTest

Signed-off-by: Arthur Huillet --- The patch that makes things work. :) arch/x86/emit-code.c|8 arch/x86/include/arch/instruction.h |1 + arch/x86/insn-selector_32.brg | 22 +++--- arch/x86/lir-printer.c

[PATCH 1/2] jit: add emulate_fcmpl and emulate_fcmpg functions

Signed-off-by: Arthur Huillet --- include/jit/emulate.h |2 ++ jit/emulate.c | 30 ++ 2 files changed, 32 insertions(+), 0 deletions(-) diff --git a/include/jit/emulate.h b/include/jit/emulate.h index c042871..d797eb7 100644 --- a/include/jit/emulate.h

[PATCH] build: add Makefile in regression/ as a dev process speedup

Signed-off-by: Arthur Huillet --- regression/Makefile |5 + 1 files changed, 5 insertions(+), 0 deletions(-) create mode 100644 regression/Makefile diff --git a/regression/Makefile b/regression/Makefile new file mode 100644 index 000..4883b97 --- /dev/null +++ b/regression/Makefile

[PATCH] x86: add FPU->GPR conversion, and FADD

Signed-off-by: Arthur Huillet --- arch/x86/emit-code.c| 18 ++ arch/x86/include/arch/instruction.h |2 ++ arch/x86/insn-selector_32.brg | 34 +- arch/x86/lir-printer.c | 14 ++ arch/x86/use

Re: [PATCH 2/4] jit: add -Xtrace:invoke for tracing method invocations (v2)

m(buf, (unsigned long) method); > + __emit_push_imm(buf, (unsigned long) class); > + __emit_push_imm(buf, (unsigned long) "trace invoke: %s.%s%s\n"); > + __emit_call(buf, &printf); > + __emit_add_imm_reg(buf, 32, REG_RSP); > +} Aren't you

[PATCH] x86: XMM register spilling and reloading using movss

Signed-off-by: Arthur Huillet --- arch/x86/emit-code.c| 38 +++ arch/x86/include/arch/instruction.h | 16 - arch/x86/lir-printer.c | 14 arch/x86/use-def.c |2 + 4 files changed, 68

[PATCH] jit: get_fixed_var now properly sets var type (GPR or FPU)

Signed-off-by: Arthur Huillet --- jit/compilation-unit.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/jit/compilation-unit.c b/jit/compilation-unit.c index 793924f..2c2212e 100644 --- a/jit/compilation-unit.c +++ b/jit/compilation-unit.c @@ -144,6 +144,7 @@ struct

[PATCH] jit: use OP_FADD OP_FSUB OP_FDIV OP_FMUL

Signed-off-by: Arthur HUILLET --- include/jit/expression.h |6 ++ include/vm/system.h | 10 ++ jit/arithmetic-bc.c |8 jit/tree-printer.c|4 test/jit/arithmetic-bc-test.c |8 5 files changed, 28 insertions

[PATCH] x86: add INSN_GPR_TO_XMM for floating point immediate values using SSE

Signed-off-by: Arthur HUILLET --- arch/x86/emit-code.c|9 + arch/x86/include/arch/instruction.h |1 + arch/x86/insn-selector_32.brg | 13 +++-- arch/x86/lir-printer.c |7 +++ arch/x86/use-def.c |1 + 5

Re: [PATCH] jit: temporaries for mimic stack spilling are now recursively propagated

Hi, On Tue, 30 Jun 2009 16:04:33 +0200 Arthur Huillet wrote: > please don't apply right now, I have a test that breaks. Please apply this patch, it is OK. The test wasn't. :) -- Gr

Re: [PATCH] jit: temporaries for mimic stack spilling are now recursively propagated

Hi, please don't apply right now, I have a test that breaks. On Tue, 30 Jun 2009 16:01:00 +0200 Arthur HUILLET wrote: > This fixes potential bugs when "master-master" relationships: > > A C E > \ / \ / \ > \ / \ / \ >B D F

[PATCH] jit: temporaries for mimic stack spilling are now recursively propagated

temporary. We easily see that this temporary must be used by *all* the blocks for their mimic stack spill slots. Recursive propagation of the temporary choice from B into C, D, E does this. Signed-off-by: Arthur HUILLET

[PATCH] regression: add FloatArithmeticTest, doing nothing for now

Signed-off-by: Arthur HUILLET --- Makefile|1 + regression/jvm/FloatArithmeticTest.java | 126 +++ regression/jvm/TestCase.java|5 + 3 files changed, 132 insertions(+), 0 deletions(-) create mode 100644 regression

[PATCH] jit: properly load constant float values

Signed-off-by: Arthur HUILLET --- jit/load-store-bc.c | 10 -- 1 files changed, 8 insertions(+), 2 deletions(-) diff --git a/jit/load-store-bc.c b/jit/load-store-bc.c index ddbd2df..b827219 100644 --- a/jit/load-store-bc.c +++ b/jit/load-store-bc.c @@ -94,6 +94,11 @@ static int

Re: [PATCH 9/11] x86: add OP_XXX(reg, reg) monoburg rules

Hi, On Sat, 27 Jun 2009 03:30:52 +0200 Tomek Grabiec wrote: > They will be needed when EXPR_LOCAL will be replaced with EXPR_TEMPORARY Strange justification. They are needed already on certain programs. Have you tested the new rules by removing the EXPR_LOCAL variants and running {Integer,Lon

[PATCH] x86: add OP_REM(reg, reg)

Signed-off-by: Arthur HUILLET --- arch/x86/insn-selector_32.brg | 15 +++ 1 files changed, 15 insertions(+), 0 deletions(-) diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg index b7c339c..5c7eddd 100644 --- a/arch/x86/insn-selector_32.brg +++ b/arch/x86

[PATCH] run-suite: fix missing $JAVA_OPTS on cmdline

Signed-off-by: Arthur HUILLET --- regression/run-suite.sh |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/regression/run-suite.sh b/regression/run-suite.sh index 4b89769..f5b7625 100755 --- a/regression/run-suite.sh +++ b/regression/run-suite.sh @@ -10,7 +10,7

[PATCH] x86: add OP_MUL(reg, reg)

It is necessary for System.out.println to work. Signed-off-by: Arthur HUILLET --- arch/x86/insn-selector_32.brg |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg index 96316b7..63ed31b 100644 --- a/arch

Re: [PATCH] x86: implement i2b conversion

On Thu, 25 Jun 2009 11:59:16 +0200 Arthur HUILLET wrote: > Signed-off-by: Arthur HUILLET Don't apply, the test is broken. -- Greetings, A.H. -- ___ Jatovm-devel

[PATCH] regression: add PrintTest test

Signed-off-by: Arthur HUILLET --- This patch works, please merge. Makefile |3 ++- regression/jvm/PrintTest.java | 39 +++ regression/run-suite.sh |1 + 3 files changed, 42 insertions(+), 1 deletions(-) create mode 100644

[PATCH] regression: add PrintTest test

Signed-off-by: Arthur HUILLET --- Hi, this patch adds a PrintTest regression test - for now the only thing enabled is a write call because that's the only working thing. :) Makefile |3 ++- regression/jvm/PrintTest.java |

[PATCH] x86: implement i2b conversion

Signed-off-by: Arthur HUILLET --- Hi, this is the updated, working version. Please merge. Sorry for screwing up. arch/x86/emit-code.c|8 arch/x86/include/arch/instruction.h |1 + arch/x86/insn-selector_32.brg |5 + arch/x86

[PATCH] x86: implement i2b conversion

Signed-off-by: Arthur HUILLET --- arch/x86/emit-code.c|8 arch/x86/include/arch/instruction.h |1 + arch/x86/insn-selector_32.brg |5 + arch/x86/lir-printer.c |8 arch/x86/use-def.c |1 + regression/jvm

[PATCH] x86: add OP_AND(reg, reg)

It is necessary for System.out.println Signed-off-by: Arthur HUILLET --- arch/x86/emit-code.c|7 +++ arch/x86/include/arch/instruction.h |1 + arch/x86/insn-selector_32.brg | 15 +++ arch/x86/lir-printer.c |7 +++ arch/x86/use

Monoburg arithmetic operations

Hi, I wasted several hours until I noticed that OP_AND was only implemented with (reg, EXPR_LOCAL). The (reg, reg) variant is missing for several binops, and it's very difficult with monoburg to notice it. Implementing the (reg, reg) variants for operations will be my work of tomorrow as it is

[PATCH] regression: ObjectStackTest now enabled

Signed-off-by: Arthur HUILLET --- regression/jvm/ObjectStackTest.java |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/regression/jvm/ObjectStackTest.java b/regression/jvm/ObjectStackTest.java index d49cc62..04efeca 100644 --- a/regression/jvm/ObjectStackTest.java

[PATCH 3/3] bc2ir: mimic stack spilling/reloading

Mimic stack is now correctly spilled and reloaded at basic block boundaries. Signed-off-by: Arthur HUILLET --- jit/bytecode-to-ir.c | 155 +- 1 files changed, 141 insertions(+), 14 deletions(-) diff --git a/jit/bytecode-to-ir.c b/jit/bytecode-to

[PATCH 2/3] jit: add list of mimic stack exprs to struct basic_block

BC2IR needs it to properly replace them by temporaries. Signed-off-by: Arthur HUILLET --- include/jit/basic-block.h |3 +++ jit/basic-block.c | 26 -- 2 files changed, 19 insertions(+), 10 deletions(-) diff --git a/include/jit/basic-block.h b/include/jit

[PATCH 1/3] jit: add EXPR_MIMIC_STACK_SLOT and expr_set_type

This will be necessary for bc2ir to work. Signed-off-by: Arthur HUILLET --- include/jit/expression.h | 16 jit/expression.c | 12 jit/tree-printer.c | 11 +-- 3 files changed, 37 insertions(+), 2 deletions(-) diff --git a/include/jit

[PATCH 2/2] jit: set up bb predecessors in bb_add_successor

Signed-off-by: Arthur HUILLET --- jit/basic-block.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/jit/basic-block.c b/jit/basic-block.c index df984eb..5a4fa53 100644 --- a/jit/basic-block.c +++ b/jit/basic-block.c @@ -167,6 +167,7 @@ int __bb_add_neighbor(struct

[PATCH 1/2] jit: add predecessors to basic block structure

The list of predecessors is not set yet, this is just the infrastructure. Signed-off-by: Arthur HUILLET --- include/jit/basic-block.h |2 ++ jit/basic-block.c | 32 +++- jit/trace-jit.c | 23 +++ test/jit

[PATCH] bc2ir: fix refcount bug in spill_expression

Signed-off-by: Arthur HUILLET --- jit/bytecode-to-ir.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/jit/bytecode-to-ir.c b/jit/bytecode-to-ir.c index 76fd5a4..862a335 100644 --- a/jit/bytecode-to-ir.c +++ b/jit/bytecode-to-ir.c @@ -143,7 +143,7 @@ static int

[PATCH] regression: fix building of ObjectStackTest

Signed-off-by: Arthur HUILLET --- regression/jvm/ObjectStackTest.java |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/regression/jvm/ObjectStackTest.java b/regression/jvm/ObjectStackTest.java index f5afcbe..ee2184a 100644 --- a/regression/jvm/ObjectStackTest.java +++ b

[PATCH] test_convert_goto: empty basic blocks need OPC_NOP

An "empty" basic block is a block of size 1, with a JVM NOP instruction. Signed-off-by: Arthur HUILLET --- test/jit/branch-bc-test.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/test/jit/branch-bc-test.c b/test/jit/branch-bc-test.c index 5684c65..8477

[PATCH] bc2ir: fix converters array out-of-bound access

--- jit/bytecode-to-ir.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/jit/bytecode-to-ir.c b/jit/bytecode-to-ir.c index 0ad607e..19a0c29 100644 --- a/jit/bytecode-to-ir.c +++ b/jit/bytecode-to-ir.c @@ -371,6 +371,11 @@ static int do_convert_bb_to_ir(struct basic_blo

[PATCH] regression: enable 64bit integer tests in PutfieldTest

Signed-off-by: Arthur HUILLET --- regression/jvm/PutfieldTest.java | 28 +--- 1 files changed, 13 insertions(+), 15 deletions(-) diff --git a/regression/jvm/PutfieldTest.java b/regression/jvm/PutfieldTest.java index b7d0987..04612b0 100644 --- a/regression/jvm

[PATCH] regression: enable all tests in PutstaticTest

They all work fine now. Signed-off-by: Arthur HUILLET --- regression/jvm/PutstaticTest.java |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/regression/jvm/PutstaticTest.java b/regression/jvm/PutstaticTest.java index faa162f..cbf9496 100644 --- a/regression/jvm

[PATCH] jit: fix interval splitting so it marks the child with REG_UNASSIGNED

ith !REG_UNASSIGNED would make it impossible for the register allocator to detect when try_allocate_free_reg failed - and therefore assuming a reg had successfully been allocated, whereas it should spill one instead. Signed-off-by: Arthur HUILLET --- jit/interval.c |2 +- 1 files changed, 1 inserti

[PATCH] jit: fix interval splitting so it marks the child with REG_UNASSIGNED

ith !REG_UNASSIGNED would make it impossible for the register allocator to detect when try_allocate_free_reg failed - and therefore assuming a reg had successfully been allocated, whereas it should spill one instead. Signed-off-by: Arthur HUILLET --- jit/interval.c |2 +- 1 files changed, 1 inserti

[PATCH] regression: long tests use long integer constants in PutstaticTest

This way we really test the high dword. Signed-off-by: Arthur HUILLET --- regression/jvm/PutstaticTest.java |8 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/regression/jvm/PutstaticTest.java b/regression/jvm/PutstaticTest.java index aadfd7c..a205dd1 100644 --- a

[PATCH] x86: implement 64bit EXPR_INSTANCE_FIELD

Signed-off-by: Arthur HUILLET --- arch/x86/insn-selector_32.brg | 12 +++- 1 files changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg index 556dc24..c723526 100644 --- a/arch/x86/insn-selector_32.brg +++ b/arch/x86/insn

Re: [PATCH 1/4] x86: introduce word-size independent register names

Hi, On Wed, 22 Apr 2009 12:21:01 +0300 Eduard - Gabriel Munteanu wrote: > Some code relating to x86 and x86-64 differs only in regards to register > width. This change makes it possible to specify registers by word-size > independent names, thus allowing for generic code while keeping the > comp

[PATCH] jit: indicate use positions when tracing liveness

Signed-off-by: Arthur HUILLET --- jit/trace-jit.c | 17 - 1 files changed, 12 insertions(+), 5 deletions(-) diff --git a/jit/trace-jit.c b/jit/trace-jit.c index ca69da9..2e2236d 100644 --- a/jit/trace-jit.c +++ b/jit/trace-jit.c @@ -133,14 +133,21 @@ void trace_liveness(struct

[PATCH] jit: shut up warning in register allocation trace code

Signed-off-by: Arthur HUILLET --- jit/trace-jit.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/jit/trace-jit.c b/jit/trace-jit.c index ca69da9..1200787 100644 --- a/jit/trace-jit.c +++ b/jit/trace-jit.c @@ -161,7 +161,7 @@ void trace_regalloc(struct compilation_unit

[PATCH] jit: fix bug in allocate_blocked_reg

The wrong variable name was used in a conditional block, leading to invalid memory reads and potential bugs. Signed-off-by: Arthur HUILLET --- jit/linear-scan.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/jit/linear-scan.c b/jit/linear-scan.c index 27bf271

Broken while loops: BC2IR bug(s)

Hi, The following java code : public static void aaa() { int i = 0; while (i < 5) { i = i+1; } assertEquals(5, i); } is compiled into the following bytecode : public static void aaa(); Code: 0: iconst_0 1: istore_0 2: goto

[PATCH] jit: HIR now separates 32bit and 64bit shifts

OP_{SHR, USHR, SHL} now denotes 32bit operations, OP_{SHR, USHR, SHL}_64 represent 64bit operations. This is necessary because we cannot provide "optimised" reg, EXPR_LOCAL rules for 64bit shifts easily on x86. Signed-off-by: Arthur HUILLET --- arch/x86/insn-selector_32.

[PATCH] jit trace: improved format for LIR and regalloc tracers.

LIR trace now has a \t between instruction and operand. regalloc now properly spaces start and end positions for intervals for better readability. Signed-off-by: Arthur HUILLET --- arch/x86/lir-printer.c |2 +- jit/trace-jit.c|3 +-- 2 files changed, 2 insertions(+), 3 deletions

[PATCH] Added support for LIR tracing. Implemented for x86.

Signed-off-by: Arthur HUILLET --- Hi, this patch adds a LIR tracer. It has only been implemented for x86 so I assume you will have to tweak it a bit before merging it upstream. It seems to work fine here, so please apply. arch/x86/Makefile_32|1

Crash in fix_invoke function

Hi, I managed to trigger a segfault in fix_invoke when running the following program : http://rafb.net/p/fT6n2f27.html (duplicated below) Simply run the regression test with this code and you should experience the segfault. I have not investigated, tgrabiec, can you please look at it? +

Bug with register allocator when splitting intervals

Hello, I have found an interesting bug when increasing the pressure on the register allocator after some modifications in use-def (namely marking MUL as defining EAX and EDX on x86). I have an interval (actually, a split-out part of an interval) that gets no register allocated. Here is the rega

[PATCH] jit: fix bug in register allocator when splitting intervals

unassigned registers. Signed-off-by: Arthur HUILLET --- jit/linear-scan.c |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/jit/linear-scan.c b/jit/linear-scan.c index b90f1b6..27bf271 100644 --- a/jit/linear-scan.c +++ b/jit/linear-scan.c @@ -309,7 +309,7 @@ int

[PATCH] x86: Add fixed registers to use-def for instructions with implicit operands

Also removed DEF_CALLER_SAVED_REGISTERS in favor of a binary OR of the said fixed registers. This exposes a bug in the register allocator with long multiplication, which is why it is disabled by this patch. Signed-off-by: Arthur HUILLET --- arch/x86/include/arch/registers_32.h |5

[PATCH] jit: fix regalloc tracing so interval splitting is readable

Intervals are now displayed with their start and end positions, and the assigned register is selected correctly. Signed-off-by: Arthur HUILLET --- jit/trace-jit.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/jit/trace-jit.c b/jit/trace-jit.c index 5bdd36e..98f5b59

[PATCH] x86: implement 64 bit multiplication

Signed-off-by: Arthur HUILLET --- arch/x86/insn-selector_32.brg| 20 +++- regression/jamvm/LongArithmeticTest.java |6 -- 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg index

[PATCH 2/2] x86: add OP_MUL_64 and stub code selection rule

64bit multiplication now is separate from 32bit multiplication because it can only easily be carried out between two registers Signed-off-by: Arthur HUILLET --- arch/x86/insn-selector_32.brg |5 + include/jit/expression.h |1 + jit/arithmetic-bc.c |2 +- jit/tree

[PATCH] x86: improve naming of multiplication operations in LIR

MUL_MEMBASE_REG and MUL_REG_REG have been renamed to MUL_*_EAX because of the implicit eax operand of the x86 "mul" instruction. MUL_REG_REG was introduced and emits the x86 "imul" instruction that does not have implicit operands. Signed-off-by: Arthur HUILLET --- arc