Hi guys,
Please consider pulling the following urgent fix from Dave. It fixes an
earlyprintk=efi regression introduced in v3.16. Due to changes in the
early ACPI code we run out of early_ioremap slots when earlyprintk=efi
is specified on the command line, resulting in a hang during kernel
boot.
On Thursday 18 September 2014 07:47 PM, Shawn Guo wrote:
> On Wed, Sep 17, 2014 at 01:46:30PM +0530, Bhuvanchandra DV wrote:
>> Signed-off-by: Bhuvanchandra DV
>> ---
>> arch/arm/boot/dts/vf610-colibri-eval-v3.dts |6 ++
>> arch/arm/boot/dts/vf610-colibri.dtsi|7 +++
>>
The function max77686_rtc_calculate_wday() is used to
calculate the day of the week to be filled in struct
rtc_time but that function only calculates the number
of bits shifted. So the ffs() function can be used to
find the first bit set instead of a special function.
Signed-off-by: Javier
The max77686 mfd driver adds a regmap IRQ chip which creates an
IRQ domain that is used to map the virtual RTC alarm1 interrupt.
The RTC driver assumes that this will always be true since the
PMIC IRQ is a required property according to the max77686 DT
binding doc. If an "interrupts" property is
From: Doug Anderson
The max77686 includes an RTC that keeps power during suspend. It's
convenient to be able to use it as a wakeup source.
Signed-off-by: Doug Anderson
Reviewed-by: Javier Martinez Canillas
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Javier Martinez Canillas
---
The MAX77686 RTC chip has two features called SMPL (Sudden Momentary
Power Loss) and WTSR (Watchdog Timeout and Software Resets).
Support for these features seems to be implemented in the driver but
compilation is disabled using a C pre-processor conditional.
This code has been disabled since the
The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms.
This patch adds support for the RTC and is based on a driver
added by Simon Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas
Reviewed-by: Krzysztof Kozlowski
---
Changes since v9:
- Use ffs() to
If devm_rtc_device_register() fails a dev_err() is already
reported so there is no need to do an additional dev_info().
Signed-off-by: Javier Martinez Canillas
Reviewed-by: Krzysztof Kozlowski
---
drivers/rtc/rtc-max77686.c | 2 --
1 file changed, 2 deletions(-)
diff --git
(max77802) machines and applies cleanly
to both 3.17-rc1 and today's linux-next (20140919).
NOTE: The patches from the previous version [1] were already
present in the -mm tree [2] so I didn't know if I should had
sent this as a delta or as a new revision. I decided to do
the later but please let me
On Wed, Sep 17, 2014 at 06:34:45PM +0200, Sebastian Andrzej Siewior wrote:
> On 09/11/2014 01:42 PM, Sebastian Andrzej Siewior wrote:
> >> We should add hooks like tx_dma and rx_dma to struct uart_8250_dma so
> >> that the probe drivers can replace serial8250_tx_dma and
> >> seria8250_rx_dma, like
Hi Ivan,
On Thursday 18 September 2014 06:45 PM, Ivan T. Ivanov wrote:
> The current ADC is peripheral of Qualcomm SPMI PMIC chips. It has
> 16 bits resolution and register space inside PMIC accessible across
> SPMI bus.
>
> The driver registers itself through IIO interface.
>
> Signed-off-by:
On Thursday 18 September 2014 07:42 PM, Shawn Guo wrote:
> On Wed, Sep 17, 2014 at 01:46:29PM +0530, Bhuvanchandra DV wrote:
>> The Colibri standard defines four pins as PWM outputs, two of them (PWM
>> A and C) are routed to FTM instance 0 and the other two (PWM B and D)
>> are routed to FTM
On Fr, 2014-09-19 at 10:37 +0200, David Herrmann wrote:
> Hi
>
> On Fri, Sep 19, 2014 at 10:11 AM, Gerd Hoffmann wrote:
> > Signed-off-by: Gerd Hoffmann
> > ---
> > drivers/gpu/drm/cirrus/cirrus_mode.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git
On Fri, Sep 19, 2014 at 08:09:47AM +0100, Wang, Yalin wrote:
> this patch extend the start and end address of initrd to be page aligned,
> so that we can free all memory including the un-page aligned head or tail
> page of initrd, if the start or end address of initrd are not page
> aligned, the
>> Vybrid ADC peripheral includes a temperature sensor
>> which is connected to channel number 26. The patch
>> adds support for the sensor. The raw value is read
>> and the temperature calculated in milli degree Celsius,
>> which is returned using IIO_CHAN_INFO_PROCESSED option.
>>
>> Sanchayan
On Thu, 18 Sep 2014, Chuck Ebbert wrote:
> > > [1] sig 0x000306f2, pf mask 0x6f, 2014-09-03, rev 0x0029, size 28672
> > > sig 0x000306c3, pf mask 0x32, 2014-07-03, rev 0x001c, size 21504
> > > sig 0x00040651, pf mask 0x72, 2014-07-03, rev 0x001c, size 20480
> > > sig 0x00040661, pf
>> Enable ADC support for Colibri VF61 modules
>>
>> Signed-off-by: Sanchayan Maity
>> ---
>> arch/arm/boot/dts/vf610-colibri.dtsi | 10 ++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/vf610-colibri.dtsi
>> b/arch/arm/boot/dts/vf610-colibri.dtsi
>> index
> -Original Message-
> From: Giuseppe CAVALLARO [mailto:peppe.cavall...@st.com]
> Sent: Thursday, September 18, 2014 10:50 PM
> On 9/18/2014 2:34 PM, Kweh Hock Leong wrote:
> > From: "Kweh, Hock Leong"
>
> Hmm I am not sure this is the right fix. The driver has to fail if the main
>
I plan to release an automated kdump testsuite that will be
focus on testing kernel and the crash utility. It should work
for all major distros since it will use none of distro-specific
stuff, and also support different arches including x86, ARM,
PPC64 and s390x.
It does the following:
1) check
On 26/08/2014 at 16:17:57 +0200, Tomasz Figa wrote :
> Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch
> settings configured in registers leading to crashes if L2C is enabled
> without overriding them. This patch introduces bindings to enable
> prefetch settings to be
Make clear what work_sem really does.
Suggested-by: Artem Bityutskiy
Signed-off-by: Richard Weinberger
---
drivers/mtd/ubi/ubi.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h
index 7bf4163..f2933df 100644
---
This assertion was only correct before UBIFS had xattr support.
Now with xattr support also a directory node can carry data
and can act as host node.
Suggested-by: Artem Bityutskiy
Signed-off-by: Richard Weinberger
---
fs/ubifs/journal.c | 7 +++
1 file changed, 3 insertions(+), 4
Am 17.09.2014 11:35, schrieb Artem Bityutskiy:
> On Tue, 2014-09-16 at 09:48 +0200, Richard Weinberger wrote:
>> If sync_erase() failes with EINTR, ENOMEM, EAGAIN or
>> EBUSY erase_worker() re-schedules the failed work.
>> This will lead to a deadlock because erase_worker() is called
>> with
On Wed, Sep 17, 2014 at 11:42:09PM +0200, Oleg Nesterov wrote:
> > Hopefully this helps:
> >
> >"umount" "events/1"
> >
> > sys_umount sysrq_handle_sync
> > deactivate_super(sb)
Users can perform clustered scheduling using the cpuset facility.
After an exclusive cpuset is created, task migrations happen only
between CPUs belonging to the same cpuset. Inter- cpuset migrations
can only happen when the user requires so, moving a task between
different cpusets. This behaviour
Hello everyone,
This patchset fixes admission control, bandwidth management and
(clustered) SMP scheduling for SCHED_DEADLINE tasks.
Patch 1/3 properly clears things up when a task leaves SCHED_DEADLINE,
without dying (and it is a different solution for the problem spotted
by Daniel,
When a task is using SCHED_DEADLINE and the user setschedules it to a different
class its sched_dl_entity static parameters are not cleaned up. This causes a
bug if the user sets it back to SCHED_DEADLINE with the same parameters again.
The problem resides in the check we perform at the very
Exclusive cpusets are the only way users can restrict SCHED_DEADLINE tasks
affinity (performing what is commonly called clustered scheduling).
Unfortunately, such thing is currently broken for two reasons:
- No check is performed when the user tries to attach a task to
an exlusive cpuset
Hi Dong and Xiubo,
On Friday, September 19, 2014, Dong Aisheng wrote,
> On Fri, Sep 19, 2014 at 01:20:18PM +0800, Xiubo Li-B47053 wrote:
> > [...]
> > > >create child: /dcsr@2000/dcsr-atbrepl@3a8000
> > > >create child: /dcsr@2000/dcsr-tsgen-ctrl@3a9000
> > > >create child:
On Fri, Sep 19, 2014 at 11:31 AM, Alexandre Courbot wrote:
> On Sat, Sep 6, 2014 at 12:22 AM, Octavian Purdila
> wrote:
>> The current implementation of gpiochip_remove() does not check to see
>> if the GPIO pins are busy before removing the associated irqchip and
>> this is causing the
On Fri, Sep 19, 2014 at 02:57:03AM +, Drokin, Oleg wrote:
> 4. Sometimes we need large allocations. general kmalloc is less
> reliable as system lives on and memory fragmentation worsens. So we
> have this "allocations over 2-4 pages get switched to vmalloc" logic,
> if there's a way to do
This patch series moves the generic RCU string library used internally by BTRFS
to be accessible by anyone. It provides printk_in_rcu and
printk_ratelimited_in_rcu to print these strings. In order to avoid a weird
inconsistency between the two, the first patch fixes printk_ratelimited so it
passes
8xx sometimes need to load a invalid/non-present TLBs in
it DTLB asm handler.
These must be invalidated separaly as linux mm doesn't.
Commit 5efab4a02c89c252fb4cce097aafde5f8208dbfe was invalidating them in
arch/powerpc/mm/fault.c.
This patch does the invalidation earlier in order to free
Branching takes two cycles on MPC8xx. Lets duplicate the two instructions
and avoid the branching.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes in v4:
- None
arch/powerpc/kernel/head_8xx.S |6 --
1 files changed, 4 insertions(+), 2
The RCU-friendy string API used internally by BTRFS is generic enough for
common use. This doesn't add any new functionality, but instead just moves the
code and documents the existing API.
Signed-off-by: Omar Sandoval
---
fs/btrfs/check-integrity.c | 6 +--
fs/btrfs/dev-replace.c | 19
In DTLBError handler there is not need to restore r10, r11 and cr registers
after fixing DAR as they are saved again to the same place just after.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes in v4:
- None
arch/powerpc/kernel/head_8xx.S |4 ++--
DataAccess exception is never generated by MPC8xx so do the job directly where
it is used to avoid an unnecessary branching.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- arch/powerpc/mm/fault.c uses the vector number, so make sure it understands
the new ones.
printk returns an integer; there's no reason for printk_ratelimited to swallow
it.
Signed-off-by: Omar Sandoval
---
include/linux/printk.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/linux/printk.h b/include/linux/printk.h
index d78125f..67534bc 100644
---
Commit d5e136a21b2028fb1f45143ea7112d5869bfc6c7 ("clk: samsung: Register
clk provider only after registering its all clocks", merged to v3.17-rc1)
modified a way that driver registers registers to core framework. This
change has not been applied to s5pv210 clocks driver, which has been
merged in
On Sep 19, 2014, at 10:58 AM, Borislav Petkov wrote:
> On Thu, Sep 18, 2014 at 03:36:43PM +0200, Paolo Bonzini wrote:
>> We're talking about the case where the field is not reserved anymore and
>> we _know_ that the vendor has just decided to grow the bitfield that
>> precedes it.
>
> We're
The subject should be "[PATCH] ...".
On 2014/9/19 16:51, Zefan Li wrote:
> We call put_css_set() after setting CGRP_RELEASABLE flag in
> cgroup_task_migrate(), but in other places we call it without setting
> the flag. I don't see the necessity of this flag.
>
--
To unsubscribe from this list:
Commit 5a17f543ed68 ("cgroup: improve css_from_dir() into
css_tryget_from_dir()")
removed perf_tryget_cgroup(), so let's also remove perf_put_cgroup().
Signed-off-by: Zefan Li
---
kernel/events/core.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git
We call put_css_set() after setting CGRP_RELEASABLE flag in
cgroup_task_migrate(), but in other places we call it without setting
the flag. I don't see the necessity of this flag.
Moreover once the flag is set, it will never be cleared, unless writing
to the notify_on_release control file, so it
David Ahern writes:
> On 9/18/14, 2:21 PM, David Ahern wrote:
>> On 9/18/14, 12:53 PM, Arnaldo Carvalho de Melo wrote:
>>> If nobody objects I'll merge this patch, as it fixes problems, but I
>>> wonder if the best wouldn't be simply not calling
>>> perf_evlist__mmap_consume() till the last
Since commit 2321f33790a6c5b80322d907a92d5739e7521a13, r10 is not used anymore
after FixupDAR. There is therefore no need to set it up with the value of DAR.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes in v4:
- None
arch/powerpc/kernel/head_8xx.S
SCRATCH0 and SCRATCH1 are only used in Exceptions prologs where no other
exception can happen. There is therefore no need to preserve them accross
TLB handlers, we can use them there as in other exceptions. One of the
advantages is that they do not suffer CPU6 errata unlike M_TW register.
Since commit 2321f33790a6c5b80322d907a92d5739e7521a13, dirty handling is not
handled here anymore. So we fix the comment.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes in v4:
- None
arch/powerpc/kernel/head_8xx.S | 8 ++--
1 file changed, 2
Since coming 469d62be9263b92f2c3329540cbb1c076111f4f3, SPRG2 is used as a
scratch register just like SPRG0 and SPRG1. So Declare it as such and fix
the comment which is not valid anymore since that commit.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes
r10 and r3 are only used inside FixupDAR function. So lets save them inside
that function only.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes in v4:
- None
arch/powerpc/kernel/head_8xx.S | 27 +--
1 files changed, 13
This patchset:
1) provides several MMU TLB handling optimisation on MPC8xx.
2) adds support of 16k pages on MPC8xx.
All changes have been successfully tested on a custom board equipped with MPC885
Signed-off-by: Christophe Leroy
Tested-by: Christophe Leroy
---
Changes in v2:
- Patch number 10
By XORing the upper part of the instruction code, we get a value that can
directly be verified with the second test and we can remove the first test.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes in v4:
- None
arch/powerpc/kernel/head_8xx.S |6
When a PMD entry is valid, _PMD_PRESENT is set. Therefore, forcing that bit
during TLB loading is useless.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes in v4:
- None
arch/powerpc/kernel/head_8xx.S |2 --
1 files changed, 0 insertions(+), 2
This patch activates the handling of 16k pages on the MPC8xx.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes in v4:
- None
arch/powerpc/Kconfig |2 +-
arch/powerpc/include/asm/mmu-8xx.h |2 ++
arch/powerpc/kernel/head_8xx.S
Use M_TW instead of M_TWB for storing Level 1 table address as M_TWB requires
4k aligned tables, which is only the case with 4k pages.
Consequently, we have to calculate the level 1 table index by ourselves.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
For PAGE size related operations, use PAGE size consts in order to be able to
use different page size in the futur.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes in v4:
- None
arch/powerpc/kernel/head_8xx.S | 30 ++
1
MD_TWC can only be used properly with 4k pages.
So lets calculate level 2 table index by ourselves.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- No need to save r11 in cr, we can do without modifying r11 in DataStoreTLBMiss
Changes in v3:
- None
Changes in v4:
- None
There is not need to restore r10, r11 and cr registers at this end of ITLBmiss
handler as they are saved again to the same place in ITLBError handler we are
jumping to.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes in v4:
- None
No need to re-set this bit at each TLB miss. Let's set it in the PTE.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- Removed PPC405 related macro from PPC8xx specific code
- PTE_NONE_MASK doesn't need PAGE_ACCESSED in Linux 2.6
Changes in v4:
- None
Hi
On Fri, Sep 19, 2014 at 10:11 AM, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
> ---
> drivers/gpu/drm/cirrus/cirrus_mode.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c
> b/drivers/gpu/drm/cirrus/cirrus_mode.c
> index e1c5c32..c7c5a9d
Value 0x00f0 is used to force bits in TLB level 2 entry. This value is linked
to the page size and will vary when we change the page size. Lets define a const
for it in order to have it at only one place.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes
As we are not using anymore DAR to save registers, it is now available for
saving the r3 register used for CPU6 ERRATA handling. Therefore we can
remove the major hack which was to use memory location 0 to save r3.
Signed-off-by: Christophe Leroy
---
Changes in v3:
- New
Changes in v4:
- Fixed
Exception InstructionAccess does not exist on MPC8xx. No need to branch there
from somewhere else.
Handling can be done directly in InstructionTLBError Exception.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- arch/powerpc/mm/fault.c uses the vector number, so
This patch hiddes that SPR address needed for CPU6 ERRATA handling in the macro.
Then we don't have to worry about this address directly in the code.
Signed-off-by: Christophe Leroy
---
Changes in v2:
- None
Changes in v3:
- None
Changes in v4:
- None
arch/powerpc/kernel/head_8xx.S | 29
On Sat, Sep 6, 2014 at 12:22 AM, Octavian Purdila
wrote:
> The current implementation of gpiochip_remove() does not check to see
> if the GPIO pins are busy before removing the associated irqchip and
> this is causing the following warning:
>
> WARNING: CPU: 3 PID: 553 at fs/proc/generic.c:521
>
After we implemented default unified hierarchy, cgrp->kn can never
be NULL.
Signed-off-by: Zefan Li
---
include/linux/cgroup.h | 7 ++-
mm/memory-failure.c| 2 +-
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h
index
On Tue, Sep 16, 2014 at 8:52 PM, Mika Westerberg
wrote:
> From: Aaron Lu
>
> GPIO descriptors are the preferred way over legacy GPIO numbers
> nowadays. Convert the driver to use GPIO descriptors internally but
> still allow passing legacy GPIO numbers from platform data to support
> existing
On Tue, Sep 16, 2014 at 8:52 PM, Mika Westerberg
wrote:
> GPIO descriptors are the preferred way over legacy GPIO numbers
> nowadays. Convert the driver to use GPIO descriptors internally but
> still allow passing legacy GPIO numbers from platform data to support
> existing platforms.
>
>
As described in AHCI v1.0 specification chapter 10.6.2.2
"Multiple MSI Based Messages" generation of interrupts
is not controlled through the HOST_IRQ_STAT register.
Considering MMIO access is expensive remove unnecessary
reading and writing of HOST_IRQ_STAT register.
Further, serializing access
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/bochs/bochs_kms.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/bochs/bochs_kms.c
b/drivers/gpu/drm/bochs/bochs_kms.c
index 9d7346b..6b7efcf3 100644
--- a/drivers/gpu/drm/bochs/bochs_kms.c
+++
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/cirrus/cirrus_mode.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c
b/drivers/gpu/drm/cirrus/cirrus_mode.c
index e1c5c32..c7c5a9d 100644
--- a/drivers/gpu/drm/cirrus/cirrus_mode.c
+++
Commit ce93718fb7cdbc064c3000ff59e4d3200bdfa744 ("net: Don't keep
around original SKB when we software segment GSO frames") frees the
original skb after software GSO even for dodgy gso skbs. This breaks
the stream throughput from untrusted sources, since only header
checking was done during
Get voltage & duty table from device tree might be better, other platforms can
also use this
driver without any modify.
Signed-off-by: Chris Zhong
---
Changes in v3:
Adviced by Doug Anderson
- Make Kconfig & Makefile alphabetical
- remove pwm_reg_period from pwm_regulator_data
- modify the
On Thu, Sep 18, 2014 at 06:00:12PM -0700, Andy Lutomirski wrote:
> Yes, but how? I assume that BIOS isn't switching between two
> different ucode blobs, and I don't know about any wrcpuid instruction.
> So there must be *some* way, at least on new ucode (and maybe on old
> ucode) to change that
Document the st-pwm regulator
Signed-off-by: Chris Zhong
---
Changes in v3:
Adviced by Doug Anderson
- update the Example
Changes in v2:
Adviced by Lee Jones
- rename the documentation
Adviced by Doug Anderson
- update the example
Adviced by Mark Rutland
- remove pwm-reg-period
get voltage & duty table from device tree might be better, other platforms can
also use this
driver without any modify.
Tested on a rk3288 sdk board as logic voltage regulator.
Changes in v3:
Adviced by Doug Anderson
- Make Kconfig & Makefile alphabetical
- remove pwm_reg_period from
On Thu, Sep 18, 2014 at 03:36:43PM +0200, Paolo Bonzini wrote:
> We're talking about the case where the field is not reserved anymore and
> we _know_ that the vendor has just decided to grow the bitfield that
> precedes it.
We're talking about the case where you assumed that a reserved bit is 0
On 09/19/2014 03:04 PM, Eric Dumazet wrote:
> On Fri, 2014-09-19 at 14:38 +0800, Jason Wang wrote:
>> Commit ce93718fb7cdbc064c3000ff59e4d3200bdfa744 ("net: Don't keep
>> around original SKB when we software segment GSO frames") frees the
>> original skb after software GSO even for dodgy gso skbs.
Adds PCI identifier for the X1000
Adds clocking and register size and register shift
Signed-off-by: Bryan O'Donoghue
---
drivers/tty/serial/8250/8250_pci.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_pci.c
Le 18/09/2014 22:02, Joakim Tjernlund a écrit :
christophe leroy wrote on 2014/09/18 21:11:01:
Le 18/09/2014 20:12, Joakim Tjernlund a écrit :
leroy christophe wrote on 2014/09/18
18:42:14:
Le 18/09/2014 17:15, Joakim Tjernlund a écrit :
Christophe Leroy wrote on 2014/09/17
18:36:57:
On Sat, Sep 6, 2014 at 4:52 AM, Nishanth Menon wrote:
> When viewing the /proc/interrupts, there is no information about which
> GPIO bank a specific gpio interrupt is hooked on to. This is more than a
> bit irritating as such information can esily be provided back to the
> user and at times, can
I should have responded to that thread long ago, but I am currently on
holidays and strangely tend to check my mail less often than I should.
:P
On Tue, Sep 9, 2014 at 4:24 PM, Linus Walleij wrote:
> Argh! This is the kind of stuff I want to get rid of
>
> Preferably gpio should be a
Commit: e676253b19b2d269cccf67fdb1592120a0cd0676 (serial/8250: Add
support for RS485 IOCTLs), adds support for RS485 ioctls for 825_core on
all the archs. Unfortunately the definition of TIOCSRS485 and
TIOCGRS485 was missing on the ioctls.h file
Reported-by: Guenter Roeck
Reviewed-by: Guenter
If the hw is in ALDPS mode, the hw may have no response for accessing
the most registers. Therefore, the ALDPS should be disabled before
accessing the hw in rtl_ops.init(), rtl_ops.disable(), rtl_ops.up(),
and rtl_ops.down(). Regardless of rtl_ops.enable(), because the hw
wouldn't enter ALDPS mode
Currently these driver are missing a check on the return value of devm_kzalloc,
which would cause a NULL pointer dereference in a OOM situation.
This patch adds a missing check for tpm_i2c_atmel.c and tpm_i2c_nuvoton.c
Signed-off-by: Kiran Padwal
---
drivers/char/tpm/tpm_i2c_atmel.c |4
On Thu, Sep 18, 2014 at 06:54:34PM +0300, Octavian Purdila wrote:
> On Thu, Sep 18, 2014 at 3:46 PM, Johan Hovold wrote:
> > On Thu, Sep 18, 2014 at 03:43:07PM +0300, Octavian Purdila wrote:
> >> On Thu, Sep 18, 2014 at 1:54 PM, Johan Hovold wrote:
> >> > On Tue, Sep 09, 2014 at 10:24:46PM
On 07/01/2014 06:49 PM, Michael S. Tsirkin wrote:
> Signed-off-by: Michael S. Tsirkin
> ---
> drivers/vhost/vhost.h | 19 +--
> drivers/vhost/net.c | 30 +-
> drivers/vhost/scsi.c | 23 +++
> drivers/vhost/test.c | 5 +++--
>
On Thu, Sep 18, 2014 at 06:26:52PM +1000, Michael Neuling wrote:
>From: Ian Munsie
>
>This adds a number of functions for allocating IRQs under powernv PCIe for cxl.
>
>Signed-off-by: Ian Munsie
>Signed-off-by: Michael Neuling
>---
> arch/powerpc/include/asm/pnv-pci.h| 27 +
>
On Fri, 19 Sep 2014 13:10:21 +0900
Masahiro Yamada wrote:
> Hi Clang folks,
>
>
> I'd like to know the status of Clang support
> in the Linux mainline.
>
>
> I can see some "clang" specific parts in makefiles,
> so I guess Clang is already supported to a certain extent.
>
>
> I just tried
this patch extend the start and end address of initrd to be page aligned,
so that we can free all memory including the un-page aligned head or tail
page of initrd, if the start or end address of initrd are not page
aligned, the page can't be freed by free_initrd_mem() function.
Signed-off-by:
On Fri, 2014-09-19 at 14:38 +0800, Jason Wang wrote:
> Commit ce93718fb7cdbc064c3000ff59e4d3200bdfa744 ("net: Don't keep
> around original SKB when we software segment GSO frames") frees the
> original skb after software GSO even for dodgy gso skbs. This breaks
> the stream throughput from
Hi all,
Changes since 20140917:
The fsl tree still had its build failure so I used the version from
next-20140917.
The v4l-dvb tree lost its build failure.
The security tree gained a conflict against the file-locks tree.
Non-merge commits (relative to Linus' tree): 6014
5488 files changed,
On Thu, Sep 18, 2014 at 06:26:50PM +1000, Michael Neuling wrote:
>From: Ian Munsie
>
>Some of the MSI IRQ code in pnv_pci_ioda_msi_setup() is generically useful so
>split it out.
>
>This will be used by some of the cxl PCIe code later.
>
>Signed-off-by: Ian Munsie
>Signed-off-by: Michael Neuling
On 09/18/2014 08:36 PM, Mark Rutland wrote:
> On Thu, Sep 18, 2014 at 06:07:40AM +0100, Michal Simek wrote:
>> On 09/17/2014 06:17 PM, Mark Rutland wrote:
>>> On Wed, Sep 17, 2014 at 03:30:49PM +0100, Michal Simek wrote:
From: Peter Crosthwaite
Modern TTC implementations can extend
On 2014/9/19 13:18, Jiang Liu wrote:
> Implement required callback functions for intel_irq_remapping driver
> to support DMAR unit hotplug.
>
> Signed-off-by: Jiang Liu
Reviewed-by: Yijing Wang
> ---
> drivers/iommu/intel_irq_remapping.c | 226
> ++-
> 1
On 2014/9/19 13:18, Jiang Liu wrote:
> Introduce helper function dmar_walk_resources to walk resource entries
> in DMAR table and ACPI buffer object returned by ACPI _DSM method
> for IOMMU hot-plug.
>
> Signed-off-by: Jiang Liu
Reviewed-by: Yijing Wang
> ---
> drivers/iommu/dmar.c|
This patch will fix the below compilation errors on i386 ARCH
drivers/built-in.o: In function `_scsih_qcmd':
mpt2sas_scsih.c:(.text+0x1e7b56): undefined reference to `__udivdi3'
mpt2sas_scsih.c:(.text+0x1e7b8a): undefined reference to `__umoddi3'
Used sector_div() API to fix above compilation
Commit ce93718fb7cdbc064c3000ff59e4d3200bdfa744 ("net: Don't keep
around original SKB when we software segment GSO frames") frees the
original skb after software GSO even for dodgy gso skbs. This breaks
the stream throughput from untrusted sources, since only header
checking was done during
These patches are intend to improve dw_wdt in the following two aspects:
Firstly, the TOP_INIT may be zero at reset on some HW, so the timeout period
may be very short, thus we will see immediate system reset after openning
the watchdog. Fix this problem by restarting the counter immediately
The kernel core now provides an API to trigger a system restart.
Register with it to support restarting the system via. watchdog.
Signed-off-by: Jisheng Zhang
---
drivers/watchdog/dw_wdt.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/watchdog/dw_wdt.c
The TOP_INIT may be zero, so the timeout period may be very short after
initialization is done, thus the system may be reset soon after enabling.
We fix this problem by restarting the counter immediately after enabling
WDT.
Signed-off-by: Jisheng Zhang
---
drivers/watchdog/dw_wdt.c | 1 +
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