Because of some hardware limitation, AMD I2C controller can't
trigger next interrupt if interrupt status has been changed
after clearing interrupt status bits. Then, I2C will lost
interrupt and IO timeout.
According to hardware design, this patch implements a workaround
to disable i2c controller i
sun4i-ss implementaton of md5/sha1 is via ahash algorithms.
A recent change make impossible to load them without giving statesize.
This patch specifiy statesize for sha1 and md5.
Signed-off-by: LABBE Corentin
Cc: sta...@vger.kernel.org
---
drivers/crypto/sunxi-ss/sun4i-ss-core.c | 2 ++
1 file c
Change the watchdog compatible to "atmel,sama5d4-wdt" to support
SAMA5D4 watchdog driver.
Signed-off-by: Wenyou Yang
---
arch/arm/boot/dts/sama5d4.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 15
On 3 November 2015 at 22:48, Laura Abbott wrote:
>
> Currently, the set_memory_* functions that are implemented for arm64
> are restricted to module addresses only. This was mostly done
> because arm64 maps normal zone memory with larger page sizes to
> improve TLB performance. This has the side e
Add watchdog node to support SAMA5D4 watchdog.
Signed-off-by: Wenyou Yang
---
arch/arm/boot/dts/at91-sama5d2_xplained.dts |4
arch/arm/boot/dts/sama5d2.dtsi |7 +++
2 files changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
b/arch/
Enabel AT91SAM9X / AT91CAP9 watchdog and SAMA5D4 watchdog.
Signed-off-by: Wenyou Yang
---
arch/arm/configs/sama5_defconfig |3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index a0c57ac..963daae 100644
--- a/arch/arm/c
Enable smp for rk3036, and add the smp sram name for adapting.
---
Changes in v7:
Signed-off-by: Xing Zheng
Reviewed-by: Heiko Stuebner
arch/arm/boot/dts/rk3036.dtsi |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index
Initial release for rk3036, node definitions rk3036 sdk board.
Signed-off-by: Xing Zheng
Reviewed-by: Heiko Stuebner
---
Changes in v7: None
arch/arm/boot/dts/Makefile |1 +
arch/arm/boot/dts/rk3036-evb.dts | 64 +
arch/arm/boot/dts/rk3036.dtsi| 547 ++
Add the clock tree definition for the new rk3036 SoC.
Signed-off-by: Xing Zheng
Reviewed-by: Heiko Stuebner
---
Changes in v7: None
drivers/clk/rockchip/Makefile |1 +
drivers/clk/rockchip/clk-rk3036.c | 478 +
drivers/clk/rockchip/clk.h|
Add the dt-bindings header for the rk3036, that gets shared between
the clock controller and the clock references in the dts.
Signed-off-by: Xing Zheng
Reviewed-by: Heiko Stuebner
---
Changes in v7: None
include/dt-bindings/clock/rk3036-cru.h | 193
1 file c
The rk3036's pll and clock are different with base on the rk3066(rk3188,
rk3288, rk3368 use it), there are different adjust foctors and control
registers, so these should be independent and separate from the series
of rk3066s.
Signed-off-by: Xing Zheng
Reviewed-by: Heiko Stuebner
---
Changes in
Add the devicetree binding for the cru on the rk3036 which quite similar
structured as previous clock controllers.
Signed-off-by: Xing Zheng
Reviewed-by: Heiko Stuebner
Acked-by: Rob Herring
---
Changes in v7: None
.../bindings/clock/rockchip,rk3036-cru.txt | 56 ++
Hi,
We need to support rk3036 soc platform via upstream, there are
some primary parts for the initial release of minimum system: dts,
clk-pll, smp, and clock tree for rk3036, and additional, we can use
these startup and run to init processs.
Thanks.
Changed in v7:
- removed the patch "make sur
On 11/05/2015 03:02 AM, Sami Tolvanen wrote:
> This patch set adds error correction support to dm-verity, which
> makes it possible to recover from data corruption in exchange of
> increased space overhead.
>
> The feature is implemented as part of dm-verity to take advantage
> of the existing has
Signed-off-by: Diego Viola
---
README | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/README b/README
index a326a6a..e1df543 100644
--- a/README
+++ b/README
@@ -59,7 +59,7 @@ DOCUMENTATION:
INSTALLING the kernel source:
- If you install the full sources, p
Instead of disabling the IRQ, use the spin lock to serialize accesses to
the HW. This protects the driver from interference of non-IRQ callbacks
with each other and makes the driver more consistent in its
serialization method.
Signed-off-by: Soren Brinkmann
---
v2:
- remove unused variable
---
Ignore RX-related interrupts if RX is not enabled.
Signed-off-by: Soren Brinkmann
---
drivers/tty/serial/xilinx_uartps.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/xilinx_uartps.c
b/drivers/tty/serial/xilinx_uartps.c
index aa1176e6661a
Non-functional, formatting changes to ease reading the code.
Signed-off-by: Soren Brinkmann
---
drivers/tty/serial/xilinx_uartps.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/tty/serial/xilinx_uartps.c
b/drivers/tty/serial/xilinx_uartps.c
index 00
start_tx must start transmitting characters. Regardless of the state of
the circular buffer, always enable the transmitter hardware.
Signed-off-by: Soren Brinkmann
---
drivers/tty/serial/xilinx_uartps.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/tty/serial/
Shutting down the UART port can happen while console operations are in
progress. Holding the port lock serializes these operations and avoids
the UART HW to be disabled in the middle of console prints.
Signed-off-by: Soren Brinkmann
---
drivers/tty/serial/xilinx_uartps.c | 6 ++
1 file chang
When shutting down the UART, clear the interrupt status register.
Signed-off-by: Soren Brinkmann
---
drivers/tty/serial/xilinx_uartps.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/tty/serial/xilinx_uartps.c
b/drivers/tty/serial/xilinx_uartps.c
index df6778d17949..b7fc30639292 10
Hi,
this is v2, hopefully without any build issues. The changes are the same
as before, just the warning reported by kbuild test robot about unused
variables have been fixed. And, I added one more patch with some
cleanup/refactoring.
I recently found my system locking up under some conditions. I
The RX path in the interrupt handler released a lock unnecessarily.
Signed-off-by: Soren Brinkmann
---
drivers/tty/serial/xilinx_uartps.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/tty/serial/xilinx_uartps.c
b/drivers/tty/serial/xilinx_uartps.c
index 167e0f4bcf7a..5efd1b9d220f
Convert an if-else into the more common early return on error, reducing
the indent level of the happy path.
Signed-off-by: Soren Brinkmann
---
v2:
- added this patch
---
drivers/tty/serial/xilinx_uartps.c | 124 ++---
1 file changed, 62 insertions(+), 62 deletion
The startup function is supposed to initialize the UART for receiving.
Hence, don't enable the TX part. Also, protect HW accesses with the port
lock.
Signed-off-by: Soren Brinkmann
---
drivers/tty/serial/xilinx_uartps.c | 20
1 file changed, 12 insertions(+), 8 deletions(-)
Move RX-related IRQ handling into a helper function.
Signed-off-by: Soren Brinkmann
---
drivers/tty/serial/xilinx_uartps.c | 50 +-
1 file changed, 28 insertions(+), 22 deletions(-)
diff --git a/drivers/tty/serial/xilinx_uartps.c
b/drivers/tty/serial/xilinx_
>
> This patch adds the missing git repository infomation and directory for
> devfreq. When using get_maintainer.pl, the result should include the
> correct maintainer information.
>
> Suggested-by: Joe Perches
> [cw00.chio: Add missing directory for devfreq]
> Signed-off-by: Chanwoo Choi
>
* Thomas Gleixner wrote:
> From: Linus Torvalds
>
> [ tglx: Split it out from the patch which provides the new callback
> and wrapped it into local_irq_save/restore ]
>
> Signed-off-by: Linus Torvalds
> Signed-off-by: Thomas Gleixner
> ---
> arch/x86/kernel/apic/x2apic_cluster.c |
Hi Sinan,
[auto build test ERROR on: scsi/for-next]
[also build test ERROR on: v4.3 next-20151105]
url:
https://github.com/0day-ci/linux/commits/Sinan-Kaya/scsi-mpt2sas-try-64-bit-DMA-when-32-bit-DMA-fails/20151105-125248
base: https://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi.git f
Hi Laura,
On 3 November 2015 at 22:48, Laura Abbott wrote:
>
> Rather than always putting the least restrictived permissions
restrictive
> (PAGE_KERNEL_EXEC) when spliting a pmd into pages, use
> the existing permissions from the pmd for the page.
>
> Signed-off-by: Laura Abbott
> ---
> arch/
On Wed, Nov 4, 2015 at 2:19 PM, Greg KH wrote:
>
> Here is the big char/misc driver update for 4.4-rc1. Lots of different
> driver and subsystem updates, hwtracing being the largest with the
> addition of some new platforms that are now supported.
Hmm. So if you answer 'N' to "System Trace Modul
The whole menu is guarded by
menu "Pin controllers"
depends on PINCTRL
...
endmenu
The if conditional outside of it is redundant.
Signed-off-by: Masahiro Yamada
---
drivers/pinctrl/Kconfig | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/pinctrl/Kconfig b/dri
On Thu, 2015-11-05 at 02:54PM +0900, Masahiro Yamada wrote:
> Currently, reset_controller_register() always return 0, but it would
> be better to check its return code.
>
> Signed-off-by: Masahiro Yamada
Acked-by: Sören Brinkmann
Sören
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To unsubscribe from this list: send the line "un
On Wed, Nov 4, 2015 at 10:38 PM, Ingo Molnar wrote:
>
> but in the above sequence I think we can do even better: we don't need the
> local_irq_save()/restore() I think.
Right. Thomas added that one to my patch.
I don't think he realized just *how* trivial sending a single IPI is
with the x2apic,
On Wed, 4 Nov 2015 08:30:14 -0800
Maxime Ripard wrote:
> Hi Arnd,
>
> On Fri, Oct 30, 2015 at 09:27:03AM +0100, Arnd Bergmann wrote:
> > On Tuesday 27 October 2015 17:50:24 Jens Kuske wrote:
> > >
> > > +static int sun8i_h3_bus_reset_xlate(struct reset_controller_dev *rcdev,
> > > +
>
> This patch adds the devfreq-event[1] entry to review the patches
> as just supporter. Patches will be picked up by Myungjoo Ham on
> devfreq git repository.
> [1] https://lkml.org/lkml/2015/1/25/573
>
> Signed-off-by: Chanwoo Choi
Signed-off-by: MyungJoo Ham
> ---
> MAINTAINERS | 10
On Thu, Nov 05, 2015 at 03:43:07AM +0100, Andi Kleen wrote:
> On Wed, Nov 04, 2015 at 09:42:48AM +0100, Jiri Olsa wrote:
> > On Mon, Nov 02, 2015 at 05:50:22PM -0800, Andi Kleen wrote:
> >
> > SNIP
> >
> > > evsel->attr.type == PERF_TYPE_HW_CACHE &&
> > > evsel->attr.config ==
Commit ed63f34c026e9a60d17fa750ecdfe3f600d49393 ("perf tools: Make perf
depend on libbpf") dynamically creates FEATURE-DUMP.libbpf during the
perf building, but the .gitignore under tools/lib/bpf/ mistakes
FEATURE-DUMP.libbpf for FEATURE-DUMP. Besides, the Makefile under
tools/lib/bpf/ also mistake
Hi Sinan,
[auto build test ERROR on: scsi/for-next]
[also build test ERROR on: v4.3 next-20151105]
url:
https://github.com/0day-ci/linux/commits/Sinan-Kaya/scsi-mpt2sas-try-64-bit-DMA-when-32-bit-DMA-fails/20151105-125248
base: https://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi.git f
The UniPhier SoCs support pinctrl drivers.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index b640458..82dddee 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++
On Thu, Nov 5, 2015 at 7:43 AM, Jean-Michel Hautbois
wrote:
>
> Le 5 nov. 2015 05:23, "Jon Nettleton" a écrit :
>>
>> On Wed, Nov 4, 2015 at 8:33 PM, Jean-Michel Hautbois
>> wrote:
>> > 2015-11-04 18:04 GMT+01:00 Jon Nettleton :
>> >> On Wed, Nov 4, 2015 at 5:52 PM, Jean-Michel Hautbois
>> >> w
On 2015/11/4 23:14, Thomas Gleixner wrote:
> On Wed, 4 Nov 2015, Keith Busch wrote:
>
>> On Tue, Nov 03, 2015 at 12:42:02PM +0100, Thomas Gleixner wrote:
>>> On Tue, 3 Nov 2015, Keith Busch wrote:
>> +msi_irqdomain = pci_msi_create_irq_domain(NULL,
>> &pci_chained_msi_domain_inf
On 11/04/2015 08:11 PM, Mark Brown wrote:
> On Tue, Nov 03, 2015 at 03:36:11PM +0530, Vignesh R wrote:
>
>> +ti_qspi_enable_memory_map(spi);
>> +ti_qspi_setup_mmap_read(spi, read_opcode, addr_width,
>> +dummy_bytes);
>> +memcpy_fromio(buf, qspi->mmap_base
After a few hours the machine started to spontaneously reboot.
It's back to running 4.2.5 - which works fine.
(I don't know if these messages are actually reaching lkml since it's
not showing up in the index on marc.info)
On 4 November 2015 at 10:24, Ian Kumlien wrote:
> Hi,
>
> This happened w
-Original Message-
From: Russell King - ARM Linux [mailto:li...@arm.linux.org.uk]
Sent: Wednesday, November 04, 2015 4:24 PM
To: Will Deacon
Cc: Sharma, Sanjeev; m.szyprow...@samsung.com;
linux-arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ARM:dma-mappi
On Thu, Nov 05, 2015 at 12:12:24AM -0500, Tejun Heo wrote:
> 6f60eade2433 ("cgroup: generalize obtaining the handles of and
> notifying cgroup files") introduced cftype->file_offset so that the
> handles for per-css file instances can be recorded. These handles
> then can be used, for example, to
Currently, reset_controller_register() always return 0, but it would
be better to check its return code.
Signed-off-by: Masahiro Yamada
---
drivers/reset/reset-berlin.c | 4 +---
drivers/reset/reset-socfpga.c | 3 +--
drivers/reset/reset-sunxi.c | 3 +--
drivers/reset/reset-zynq.c| 3 +--
Hi all,
Please do *not* add any material intended for v4.5 to your linux-next
included branches until after v4.4-rc1 has been released.
Changes since 20151104:
The battery tree still had its build failure so I used the version from
next-20150925.
The mailbox tree lost its build failure.
The
Hi,
This series adds SMP support for Broadcom's Northstar Plus SoC.
There are similar SMP enablement methods for many ARMv7 bsed SoCs.
BCM NSP SoC, has a typical such mechanism - after power-on, the
secondary core is held in a standby state, primary core provides a
startup address for the seconda
Add device tree changes required for providing SMP support
for Broadcom Northstar Plus SoC.
Signed-off-by: Kapil Hali
---
arch/arm/boot/dts/bcm-nsp.dtsi | 33 +
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/a
Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's
Northstar Plus CPU to the 32-bit ARM CPU device tree binding
documentation file and create a new binding documentation for
Northstar Plus CPU pen-release mechanism.
Signed-off-by: Kapil Hali
---
.../bindings/arm/bcm/brcm,nsp-cpu-method.tx
From: Jon Mason
Add SMP support for Broadcom's 4708 SoCs.
Signed-off-by: Jon Mason
Acked-by: Hauke Mehrtens
Tested-by: Hauke Mehrtens
Signed-off-by: Kapil Hali
---
arch/arm/boot/dts/bcm4708.dtsi | 2 ++
arch/arm/mach-bcm/Kconfig | 1 +
arch/arm/mach-bcm/Makefile | 3 +++
3 files ch
Add SMP support for Broadcom's Northstar Plus SoC,
cpu enable method and pen_release procedures. This
changes also consolidates iProc family's - BCM NSP
and BCM Kona, SMP handling in a common file.
Northstar Plus SoC is based on ARM Cortex-A9
revision r3p0 which requires configuration for ARM
Erra
When only one device is present, it is not necessary to specify
cs_gpios, as the CS line can be controlled by the hardware
module.
Without this patch, older device tree bindings used before
37457607 "spi: mediatek: mt8173 spi multiple devices support"
would cause a panic on boot. This fixes the cr
Hi zhuo-hao,
[auto build test WARNING on: tip/timers/core]
[also build test WARNING on: v4.3 next-20151104]
url:
https://github.com/0day-ci/linux/commits/zhuo-hao-lee-intel-com/alarmtimer-fix-unexpected-rtc-interrupt-when-system-resume/20151105-124811
reproduce:
# apt-get install
From: zhuo-hao
Before the system go to suspend (S3), if user create a timer with clockid
CLOCK_REALTIME_ALARM/CLOCK_BOOTTIME_ALARM and set a "large" timeout value
to this timer. The function alarmtimer_suspend will be called to setup
a timeout value to RTC timer to avoid the system sleep over tim
On 10/31/2015 04:04 AM, Bjorn Andersson wrote:
From: Werner Johansson
This adds support for the Sharp panel found on the Qualcomm
Snapdragon 800 Dragonboard (APQ8074)
Signed-off-by: Werner Johansson
Signed-off-by: Bjorn Andersson
Reviewed-by: Archit Taneja
---
Change since v1:
- Drop
On 05.11.2015 14:37, Alim Akhtar wrote:
> Hi Krzysztof
>
> On 11/02/2015 07:22 PM, Krzysztof Kozlowski wrote:
>> 2015-11-02 22:01 GMT+09:00 Alim Akhtar :
>
>arch/arm64/boot/dts/exynos/exynos7-espresso.dts | 349
> +++
>1 file changed, 349 insertions(+)
>
Hi Sinan,
[auto build test ERROR on: scsi/for-next]
[also build test ERROR on: v4.3 next-20151104]
url:
https://github.com/0day-ci/linux/commits/Sinan-Kaya/scsi-mpt2sas-try-64-bit-DMA-when-32-bit-DMA-fails/20151105-125248
base: https://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi.git
Hi Sami,
[auto build test ERROR on: dm/for-next]
[also build test ERROR on: v4.3 next-20151104]
url:
https://github.com/0day-ci/linux/commits/Sami-Tolvanen/dm-verity-clean-up-duplicate-hashing-code/20151105-124458
base:
https://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux
Hi Krzysztof
On 11/02/2015 07:22 PM, Krzysztof Kozlowski wrote:
2015-11-02 22:01 GMT+09:00 Alim Akhtar :
arch/arm64/boot/dts/exynos/exynos7-espresso.dts | 349
+++
1 file changed, 349 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
b/arch/a
On Tuesday 03 November 2015 07:26 AM, Krzysztof Kozlowski wrote:
On 26.10.2015 21:55, Pankaj Dubey wrote:
This patch splits up mach-exynos/pmu.c file, and moves exynos4210,
exynos4412 and exynos4212 PMU configuration data and functions handing
data into a common exynos4 SoC specific PMU file m
From: Matthew Fernandez
Date: Thu, 5 Nov 2015 11:09:52 +1100
> bpf: fix trivial comment typo
>
> Signed-off-by: Matthew Fernandez
This does not apply. It looks like your email client has
corrupted the patch.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the bo
Hi Krzysztof,
On Tuesday 03 November 2015 07:25 AM, Krzysztof Kozlowski wrote:
On 26.10.2015 21:55, Pankaj Dubey wrote:
This patch splits up mach-exynos/pmu.c file, and moves exynos3250 PMU
configuration data and functions handing those data into exynos3250
SoC specific PMU file mach-exynos/exy
On Tuesday 03 November 2015 07:37 AM, Krzysztof Kozlowski wrote:
On 26.10.2015 21:55, Pankaj Dubey wrote:
This patch splits up mach-exynos/pmu.c file, and moves exynos5250,
PMU configuration data and functions handing data into exynos5250
SoC specific PMU file mach-exynos/exynos5250-pmu.c.
Si
Hi Krzysztof,
On Tuesday 03 November 2015 07:40 AM, Krzysztof Kozlowski wrote:
On 26.10.2015 21:55, Pankaj Dubey wrote:
This patch splits up mach-exynos/pmu.c file, and moves exynos5420,
PMU configuration data and functions handing data into exynos5420
SoC specific PMU file mach-exynos/exynos54
Hi Krzysztof,
On Tuesday 03 November 2015 07:52 AM, Krzysztof Kozlowski wrote:
On 26.10.2015 21:55, Pankaj Dubey wrote:
This patch moves Exynos PMU driver implementation from "arm/mach-exynos"
to "drivers/soc/samsung". This driver is mainly used for setting misc
bits of register from PMU IP of
From: LABBE Corentin
Date: Wed, 4 Nov 2015 21:08:12 +0100
> The variable phy_iface is double-initialized and finally is not necessary
> at all.
>
> Reported-by: coverity (CID 1271141)
> Signed-off-by: LABBE Corentin
The value is used in two locations, so having it computed once in a
variable
On Tuesday 03 November 2015 07:16 AM, Krzysztof Kozlowski wrote:
On 26.10.2015 21:55, Pankaj Dubey wrote:
Moving Exynos PMU specific header file into "include/linux/soc/samsung"
thus updated affected files under "mach-exynos" to use new location of
these header files.
Signed-off-by: Amit Dani
On Tuesday 03 November 2015 07:07 AM, Krzysztof Kozlowski wrote:
On 26.10.2015 21:55, Pankaj Dubey wrote:
commit 6ec4f8d0d91f ("ARM: EXYNOS: add generic function to calculate
cpu number") introduced exynos_pmu_cpunr to be used by multi-cluster SoC's
e.g Exynos5420, but it's no more used in the
Hi Krzysztof,
On Tuesday 03 November 2015 07:36 AM, Krzysztof Kozlowski wrote:
On 26.10.2015 21:55, Pankaj Dubey wrote:
This patch series is a part of continuation work from following series
[1] and [2].
1: exynos: Move pmu driver to driver/soc folder and add exynos7 support
http://www.spi
On Wed, Nov 04, 2015 at 10:03:39AM -0500, Steven Rostedt wrote:
> On Wed, 4 Nov 2015 09:11:18 +0800
> Jiaxing Wang wrote:
>
> > Currently tracing_init_dentry() returns -ENODEV when debugfs is not
> > initialized, which causes tracefs not populated with tracing files and
> > directories, so we wi
This patch add the thermal needed info on RK3368.
Meanwhile, support the trips to throttle for thermal.
Signed-off-by: Caesar Wang
---
Changes in v2:
- fix a copy wrong name.
Series-changes: 1
- support the opt gpio pinctrl state
Changes in v1: None
arch/arm64/boot/dts/rockchip/rk3368.dtsi |
The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
of each channel can be configurable.
The system has two Temperature Sensors, channel 0 is for CPU,
and channel 1 is for GPU.
Signed-off-by: Caesar Wang
---
Changes in v2:
- remove some unused, completed on other patchs.
Chan
This patch enable the TS-ADC.
When a thermal temperature is invoked use the CRU to reset the chip
on R88 board. TSHUT is low active on this board.
Signed-off-by: Caesar Wang
---
Changes in v2: None
Changes in v1: None
arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 6 ++
1 file changed, 6
The conversion table has the adc value and temperature.
In fact, the adc value only has the increment or decrement mode in
conversion table.
Moment, we can add the flag to be better support the *code_to_temp*
for differenr SoCs.
Signed-off-by: Caesar Wang
---
Changes in v2: None
Changes in v1:
We should make the conversion table in as a parameter since the different
SoCs have the different conversionion table.
Signed-off-by: Caesar Wang
---
Changes in v2:
- make the conversion table in as a parameter both code_to_temp
and temp_to_code function.
Series-changes: 1
- As Dmitry comment,
This patchset add the thermal for RK3368 dts,
Since the two CPU clusters, with four CPU core for each cluster,
One cluster is optimized for high-performance(big cluster) and the othe
is optimized for low power(little cluster).
This patch adds the second order for thermal throttle, and the critical
The current driver is default to register the two thermal sensors
in probe since some SoCs maybe only have one sensor for thermal.
In some cases, the channel 0 is not always the cpu or gpu sensor.
So add the channel can be configured for sensors.
Signed-off-by: Caesar Wang
---
Changes in v2: No
This patchset attempts to new compatible for thermal founding
on RK3368 SoCs.
Signed-off-by: Caesar Wang
---
Changes in v2: None
Changes in v1:
- %s/thermal/rockchip-thermal in subject.
Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 4 +++-
1 file changed, 3 insertions(+), 1
Signed-off-by: Caesar Wang
---
Changes in v2:
- As Eduardo comments on patch v1, split in smaller changes.
Changes in v1: None
drivers/thermal/rockchip_thermal.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/drivers/thermal/rockchip_thermal.c
b/dr
This series patchs are working for RK3368 on Rockchip platform.
@Heiko,
The PATCH [5/6] is working based on big/littel cluster cpufreq
added. Anyway, the PATCH [5/6] also work for next kernel.
@Eduardo,
This patchset are based on linus master branch.
Note: Need add the following thermal p
On 10/14/2015 05:41 AM, Lukasz Pawelczyk wrote:
> Add a new LSM hook called before inode's setxattr. It is required for
> LSM to be able to reliably replace the xattr's value to be set to
> filesystem in __vfs_setxattr_noperm(). Useful for mapped values, like in
> the upcoming Smack namespace patch
On 11/04/2015 06:59 PM, Rajat Jain wrote:
Geez... I wonder how did I miss it. Thanks for fixing this.
Looks good to me.
Hi Rajat,
easy to miss. I only found it accidentally.
Thanks a lot for the review!
Guenter
Reviewed-by: Rajat Jain mailto:rajatxj...@gmail.com>>
On Sun, Nov 1, 2015 at 1
On 11/04/2015 05:59 PM, Timur Tabi wrote:
On Tue, Oct 27, 2015 at 11:06 AM, wrote:
+static irqreturn_t sbsa_gwdt_interrupt(int irq, void *dev_id)
+{
+ struct sbsa_gwdt *gwdt = (struct sbsa_gwdt *)dev_id;
+ struct watchdog_device *wdd = &gwdt->wdd;
+
+ /* We don't use pretimeo
6f60eade2433 ("cgroup: generalize obtaining the handles of and
notifying cgroup files") introduced cftype->file_offset so that the
handles for per-css file instances can be recorded. These handles
then can be used, for example, to generate file modified
notifications.
Unfortunately, it made the w
On Saturday 31 October 2015 06:45 PM, Noam Camus wrote:
> From: Noam Camus
>
> This platform include boards:
> Hardware Emulator (HE)
> Simulator based upon nSIM.
>
> Signed-off-by: Noam Camus
> ---
> MAINTAINERS |6 +
> arch/arc/plat-eznps/Kconfig
From: Yang Shi
Date: Wed, 4 Nov 2015 11:36:37 -0800
> When running "mod X" operation, if X is 0 the filter has to be halt.
> Add new test cases to cover A = A mod X if X is 0, and A = A mod 1.
>
> CC: Xi Wang
> CC: Zi Shen Lim
> Signed-off-by: Yang Shi
Applied, thank you.
--
To unsubscribe
On Thu, 5 Nov 2015, Vineet Gupta wrote:
> On Thursday 05 November 2015 05:18 AM, Nicolas Pitre wrote:
> > On Wed, 4 Nov 2015, Nicolas Pitre wrote:
> >
> >> On Fri, 30 Oct 2015, Måns Rullgård wrote:
> >>
> >>> Nicolas Pitre writes:
> >>>
> I'm going to do it anyway given that I already have i
Hi zhuo-hao,
[auto build test ERROR on: tip/timers/core]
[also build test ERROR on: v4.3 next-20151104]
url:
https://github.com/0day-ci/linux/commits/zhuo-hao-lee-intel-com/alarmtimer-fix-unexpected-rtc-interrupt-when-system-resume/20151105-124811
config: i386-randconfig-x009-11010709
Hi Eduardo,
After merging the thermal-soc tree, today's linux-next build (powerpc
allyesconfig) failed like this:
drivers/thermal/rockchip_thermal.c: In function 'rockchip_thermal_suspend':
drivers/thermal/rockchip_thermal.c:641:2: error: implicit declaration of
function 'pinctrl_pm_select_sleep
From: Arnd Bergmann
Date: Wed, 04 Nov 2015 16:00:32 +0100
> VXLAN may be a loadable module, and this driver cannot be built-in
> in that case, or we get a link error:
>
> drivers/built-in.o: In function `__bnxt_open_nic':
> drivers/net/ethernet/broadcom/bnxt/bnxt.c:4581: undefined reference to
Hello Eduardo,
Thanks your comments.
在 2015年11月04日 01:48, Eduardo Valentin 写道:
Hello Caesar,
On Thu, Oct 29, 2015 at 03:14:15PM +0800, Caesar Wang wrote:
The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
of each channel can be configurable.
The system has two Temperature
Current code gives up when 32 bit DMA is not supported.
This patch tests 64 bit support before bailing out in
such conditions.
Signed-off-by: Sinan Kaya
---
drivers/scsi/mpt3sas/mpt3sas_base.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/scsi
The mpt2sas and mpt3sas drivers are spinning
forever in their IRQ handlers if there is a lot
of job queued up by the PCIe card. This handler is
causing spikes for the rest of the system and
sluggish behavior.
Marking all MSI interrupts as non-shared and
moving the MSI interrupts to thread context.
The MULDIV macro has been designed for small
numbers. It emits an overflow warning on 64 bit
systems. This patch places type casts in the
parameters to fix the compiler warning.
Signed-off-by: Sinan Kaya
---
drivers/scsi/sg.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
Current code gives up when 32 bit DMA is not supported.
This patch tests 64 bit support before bailing out in
such conditions.
Signed-off-by: Sinan Kaya
---
drivers/scsi/mpt2sas/mpt2sas_base.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/scsi/
Turns out in the case of modulo by zero in a BPF program:
A = A % X; (X == 0)
the expected behavior is to terminate with return value 0.
The bug in JIT is exposed by a new test case [1].
[1] https://lkml.org/lkml/2015/11/4/499
Signed-off-by: Zi Shen Lim
Reported-by: Yang Shi
Reported-
On Sun, Nov 1, 2015 at 12:25 PM, Richard Weinberger
wrote:
> On Sat, Oct 24, 2015 at 11:54 PM, Shayan Pooya wrote:
>> I noticed the following core_pattern behavior in my linux box while
>> running docker containers. I am not sure if it is bug, but it is
>> inconsistent and not documented.
>>
>> I
On Tue, Sep 22, 2015 at 07:59:48PM +0200, Robert Richter wrote:
> From: Tirumalesh Chalamarla
>
> Increase the standard cacheline size to avoid having locks in the same
> cacheline.
>
> Cavium's ThunderX core implements cache lines of 128 byte size. With
> current granulare size of 64 bytes (L1_
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