Julia,
> hpsa_show_dev_msg prints other information and a newline after the
> message string, so the message string does not need to include a
> newline explicitly. Done using Coccinelle.
Applied to 4.16/scsi-queue, thanks.
--
Martin K. Petersen Oracle Linux Engineering
This check is racy but provides a good heuristic to determine whether
a CPU may need a remote tick or not.
Signed-off-by: Frederic Weisbecker
Cc: Chris Metcalf
Cc: Christoph Lameter
Cc: Luiz Capitulino
Cc: Mike Galbraith
Cc: Paul E. McKenney
Cc: Peter Zijlstra
Cc: Rik van Riel
Cc: Thomas G
When a CPU runs in full dynticks mode, a 1Hz tick remains in order to
keep the scheduler stats alive. However this residual tick is a burden
for bare metal tasks that can't stand any interruption at all, or want
to minimize them.
Adding the boot parameter "isolcpus=nohz_offload" will now outsource
Add the boot option that will allow us to offload the 1Hz scheduler tick
to the housekeeping CPU.
Signed-off-by: Frederic Weisbecker
Cc: Chris Metcalf
Cc: Christoph Lameter
Cc: Luiz Capitulino
Cc: Mike Galbraith
Cc: Paul E. McKenney
Cc: Peter Zijlstra
Cc: Rik van Riel
Cc: Thomas Gleixner
Do that rename in order to normalize the hrtick namespace.
Signed-off-by: Frederic Weisbecker
Cc: Chris Metcalf
Cc: Christoph Lameter
Cc: Luiz Capitulino
Cc: Mike Galbraith
Cc: Paul E. McKenney
Cc: Peter Zijlstra
Cc: Rik van Riel
Cc: Thomas Gleixner
Cc: Wanpeng Li
Cc: Ingo Molnar
---
k
Document the interface to offload the 1Hz scheduler tick in full
dynticks mode. Also improve the comment about the existing "nohz" flag
in order to differentiate its behaviour.
Signed-off-by: Frederic Weisbecker
Cc: Chris Metcalf
Cc: Christoph Lameter
Cc: Luiz Capitulino
Cc: Mike Galbraith
Cc
Ingo,
Please pull the sched/0hz branch that can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/frederic/linux-dynticks.git
sched/0hz
HEAD: 9e932b2cc707209febd130978a5eb9f4a943a3f4
--
Now that scheduler_tick() has become resilient towards the absence of
ticks, current->sched_
On Wed, Jan 3, 2018 at 8:07 PM, Hugh Dickins wrote:
> On Wed, Jan 3, 2018 at 5:24 PM, Ben Hutchings wrote:
>> On Wed, 2018-01-03 at 21:11 +0100, Greg Kroah-Hartman wrote:
>>> This is the start of the stable review cycle for the 4.9.75 release.
>>> There are 39 patches in this series, all will be
The Arasan Controller is based on a FPGA platform and has integrated phy
with specific registers used during initialization and
management of different modes. The phy and the controller are integrated
and registers are very specific to Arasan.
Arasan being an IP provider, licenses these IPs to var
On 2018/1/4 1:32, Jeremy Linton wrote:
> Hi,
>
> On 01/03/2018 08:29 AM, Sudeep Holla wrote:
>>
>> On 02/01/18 02:29, Xiongfeng Wang wrote:
>>> Hi,
>>>
>>> On 2017/12/18 20:42, Morten Rasmussen wrote:
On Fri, Dec 15, 2017 at 10:36:35AM -0600, Jeremy Linton wrote:
> Hi,
>
> On 12
On Wed, Jan 3, 2018 at 5:24 PM, Ben Hutchings wrote:
> On Wed, 2018-01-03 at 21:11 +0100, Greg Kroah-Hartman wrote:
>> This is the start of the stable review cycle for the 4.9.75 release.
>> There are 39 patches in this series, all will be posted as a response
>> to this one. If anyone has any is
Hi sagi
Many thanks for your kindly response.
On 01/03/2018 05:37 PM, Sagi Grimberg wrote:
> Hi Jianchao,
>
>> ctrl.tagset maybe NULL due to failure of io queue setup or blk-mq
>> tagset allocation in nvme_reset_work. Then panic would come up.
>> To fix this, just add ctrl.tagset check in nvme_s
Hi,
On Thu, Jan 04, 2018 at 09:48:50AM +0800, Boqun Feng wrote:
> > The location chosen is "Documentation/kernel-hacking", i was unsure
> > where this should reside & there was no .rst file in top-level directory
> > "Documentation", so put it into one of the existing folder that seemed
> > to me
On 2018/1/4 1:32, Jeremy Linton wrote:
> Hi,
>
> On 01/03/2018 08:29 AM, Sudeep Holla wrote:
>>
>> On 02/01/18 02:29, Xiongfeng Wang wrote:
>>> Hi,
>>>
>>> On 2017/12/18 20:42, Morten Rasmussen wrote:
On Fri, Dec 15, 2017 at 10:36:35AM -0600, Jeremy Linton wrote:
> Hi,
>
> On 12
On Wed, Jan 03, 2018 10:41 PM, Stafford Horne wrote:
> On Tue, Jan 02, 2018 at 11:47:19AM +, Wei Yongjun wrote:
> > In case of error, the function ioremap() returns NULL pointer not
> > ERR_PTR(). The IS_ERR() test in the return value check should be
> > replaced with NULL test.
>
> Thanks, I
Colin,
> Several statements are indented too far, fix these
Applied to 4.16/scsi-queue.
--
Martin K. Petersen Oracle Linux Engineering
Colin,
> localport is being dereferenced to assign lport and then immediately
> afterwards localport is being sanity checked to see if it is null.
> Fix this by only dereferencing localport until after it has been
> null checked.
Applied to 4.16/scsi-queue, thanks!
--
Martin K. Petersen O
Hi Jeremy,
> When no caching mode information can be found for a disk, use the
> warning log level rather than error. It is common for this to occur
> with cheap USB sticks.
Just because something is common occurrence doesn't mean it's not an
error. What's the rationale behind demoting this to a
Signed-off-by: Yunlong Song
---
fs/f2fs/segment.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
index 890d483..e3bbabf 100644
--- a/fs/f2fs/segment.c
+++ b/fs/f2fs/segment.c
@@ -2719,6 +2719,8 @@ void __f2fs_replace_block(struct f2fs_sb_info *sbi,
st
Hi,
On Thu, Jan 04, 2018 at 12:48:28AM +0100, Peter Zijlstra wrote:
> > Let PDF & HTML's be created out of memory-barriers Text by
> > reStructuring.
> So I hate this rst crap with a passion, so NAK from me.
Okay, the outcome is exactly as was feared.
Abondoning the patch, let this be > /dev/n
> From: Intel-wired-lan [mailto:intel-wired-lan-boun...@osuosl.org] On
> Behalf Of SF Markus Elfring
> Sent: Monday, January 1, 2018 11:57 AM
> To: net...@vger.kernel.org; intel-wired-...@lists.osuosl.org; Kirsher,
> Jeffrey T
> Cc: kernel-janit...@vger.kernel.org; LKML
> Subject: [Intel-wired-la
Hi Alex,
>>>
> Hi Gang,
>
> On 2018/1/3 13:14, Gang He wrote:
>> Hi Alex,
>>
>>
>
>>> Hi Gang,
>>>
>>> On 2017/12/28 18:07, Gang He wrote:
Add ocfs2_overwrite_io function, which is used to judge if
overwrite allocated blocks, otherwise, the write will bring extra
block allo
It always returns 0 and none of its callers check its return value. Make
it return void.
Signed-off-by: Viresh Kumar
---
drivers/cpufreq/cpufreq_stats.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/cpufreq/cpufreq_stats.c b/drivers/cpufreq/cpufreq_stats.c
index 1
On 12/14/17 at 05:24pm, Dave Young wrote:
> On 12/13/17 at 11:57pm, Yu Chen wrote:
> > On Wed, Dec 13, 2017 at 10:52:56AM +0800, Dave Young wrote:
> > > Hi,
> > >
> > > Kexec reboot and kdump has broken on my laptop for long time with
> > > 4.15.0-rc1+ kernels. With the patch below an early panic
Hi all:
This series tries to implement XDP transmission (ndo_xdp_xmit) for
tuntap. Pointer ring was used for queuing both XDP buffers and
sk_buff, this is done by encoding the type into lowest bit of the
pointer and storin XDP metadata in the headroom of XDP buff.
Tests gets 3.05 Mpps when doing
This patch switches to use ptr_ring instead of skb_array. This will be
used to enqueue different types of pointers by encoding type into
lower bits.
Signed-off-by: Jason Wang
---
drivers/net/tap.c | 41 +
drivers/net/tun.c | 42 ++
This patch implements XDP transmission for TAP. Since we can't create
new queues for TAP during XDP set, exist ptr_ring was reused for
queuing XDP buffers. To differ xdp_buff from sk_buff, TUN_XDP_FLAG
(0x1UL) was encoded into lowest bit of xpd_buff pointer during
ptr_ring_produce, and was decoded
On Thu, Jan 04, 2018 at 02:15:53AM +, Alan Cox wrote:
>
> > > Elena has done the work of auditing static analysis reports to a dozen
> > > or so locations that need some 'nospec' handling.
> >
> > How exactly is that related (especially in longer-term support terms) to
> > BPF anyway?
>
>
On Wed, 2018-01-03 at 17:54 -0800, Linus Torvalds wrote:
> On Wed, Jan 3, 2018 at 5:51 PM, Dan Williams m> wrote:
> >
> > Elena has done the work of auditing static analysis reports to a
> > dozen
> > or so locations that need some 'nospec' handling.
>
> I'd love to see that patch, just to see h
Hi Kan,
On Wed, Jan 03, 2018 at 02:15:38PM +, Liang, Kan wrote:
> > Hello,
> >
> > On Thu, Dec 21, 2017 at 10:08:46AM -0800, kan.li...@intel.com wrote:
> > > From: Kan Liang
> > >
> > > The direction of overwrite mode is backward. The last mmap__read_event
> > > will set tail to map->prev. N
On 11/1/17 8:18 AM, Greg Kroah-Hartman wrote:
> On Tue, Oct 31, 2017 at 03:02:11PM +0200, Thomas Backlund wrote:
>> Den 31.10.2017 kl. 11:55, skrev Greg Kroah-Hartman:
>>> 4.13-stable review patch. If anyone has any objections, please let me know.
>>>
>>> --
>>>
>>> From: Steve Fre
On 01/03/2018 01:52 PM, Thomas Gleixner wrote:
> On Wed, 3 Jan 2018, Thomas Gleixner wrote:
>
>> On Wed, 3 Jan 2018, Lars Wendler wrote:
>>> Am Wed, 3 Jan 2018 13:05:38 +0100 (CET)
>>> schrieb Thomas Gleixner :
Also can you please try Linus v4.15-rc6 with PTI enabled so we can see
whether
> > +ENTRY(__x86.indirect_thunk)
> > + CFI_STARTPROC
> > + callretpoline_call_target
> > +2:
> > + lfence /* stop speculation */
> > + jmp 2b
> > +retpoline_call_target:
> > +#ifdef CONFIG_64BIT
> > + lea 8(%rsp), %rsp
> > +#else
> > + lea
The F81532/534 had 4 clocksource 1.846/18.46/14.77/24MHz and baud rates
can be up to 1.5Mbits with 24MHz.
This device may generate data overrun when baud rate setting to 921600bps
or higher with old UART trigger level setting (8x14=112) with full
loading. We'll change trigger level from 8x14=112 t
The F81532/534 had 4 clocksource 1.846/18.46/14.77/24MHz and baud rates
can be up to 1.5Mbits with 24MHz. But on some baud rate (384~500kps), the
TX side will send the data frame too close to treat frame error on RX
side. This patch will force all TX data frame with delay 1bit gap.
Signed-off-by:
The F81532/534 had 3 output pin (M0/SD, M1, M2) with open-drain mode to
control transceiver. We'll read it from internal Flash with address
0x2f05~0x2f08 for 4 ports. The value is range from 0 to 7. The M0/SD is
MSB of this value. For a examples, If read value is 6, we'll write M0/SD,
M1, M2 as 1,
The F81532/534 can be disable port by manufacturer with
following H/W design.
1: Connect DCD/DSR/CTS/RI pin to ground.
2: Connect RX pin to ground.
In driver, we'll implements some detect method likes following:
1: Read MSR.
2: Turn MCR LOOP bit on, off and read LSR after delay wit
The F81532/534 had auto RTS direction support for RS485 mode.
We'll read it from internal Flash with address 0x2f01~0x2f04 for 4 ports.
There are 4 conditions below:
0: F81534_PORT_CONF_RS232.
1: F81534_PORT_CONF_RS485.
2: value error, default to F81534_PORT_CONF_RS232.
Hi All,
Since many panel power sequence request backlight stay disable
before panel power ready, but with now pwm-backlight drvier, it default to
enable backlight when pwm-backlight probe, it mess up the panel power
sequence.
So we need this patch. This patch have been fly for a long tim
> Disagreed, violently. CPU has to execute the instructions I ask it to
> execute, and if it executes *anything* else that reveals any information
> about the instructions that have *not* been executed, it's flawed.
Then stick to in order processors. Just don't be in a hurry to get your
computat
On Wed, Jan 3, 2018 at 9:00 PM, Andi Kleen wrote:
> From: Dave Hansen
>
> From: David Woodhouse
>
> retpoline is a special sequence on Intel CPUs to stop speculation for
> indirect branches.
>
> Provide assembler infrastructure to use retpoline by the compiler
> and for assembler. We add the out
On 04/01/2018 02:59, Alan Cox wrote:
>> But then, exactly because the retpoline approach adds quite some cruft
>> and leaves something to be desired, why even bother?
>
> Performance
Dunno. If I care about mitigating this threat, I wouldn't stop at
retpolines even if the full solution has pretty
Hi Alex,
>>>
> Hi Gang,
>
> On 2017/12/14 13:14, Gang He wrote:
>> As you know, ocfs2 has support trim the underlying disk via
>> fstrim command. But there is a problem, ocfs2 is a shared disk
>> cluster file system, if the user configures a scheduled fstrim
>> job on each file system node, thi
From: Andi Kleen
Convert all indirect jumps in xen inline assembler code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/crypto/camellia-aesni-avx2-asm_64.S | 1 +
arch/x86/include/asm/xen/hypercall.h | 3 ++-
2
From: Andi Kleen
Convert all indirect jumps in hyperv inline asm code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/include/asm/mshyperv.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/ar
From: Dave Hansen
From: David Woodhouse
retpoline is a special sequence on Intel CPUs to stop speculation for
indirect branches.
Provide assembler infrastructure to use retpoline by the compiler
and for assembler. We add the out of line trampoline used by the
compiler, and NOSPEC_JUMP / NOSPEC
From: Andi Kleen
Convert all indirect jumps in core 32/64bit entry assembler code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/entry/entry_32.S | 5 +++--
arch/x86/entry/entry_64.S | 12 +++-
2 files changed,
From: Andi Kleen
The speculative jump trampoline has to contain unreachable code.
objtool keeps complaining
arch/x86/lib/retpoline.o: warning: objtool: __x86.indirect_thunk()+0x8:
unreachable instruction
I tried to fix it here by adding ASM_UNREACHABLE annotation (after
supporting them for pur
From: Andi Kleen
Convert all indirect jumps in crypto assembler code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/crypto/aesni-intel_asm.S| 5 +++--
arch/x86/crypto/camellia-aesni-avx-asm_64.S | 3 ++-
ar
From: Andi Kleen
Convert all indirect jumps in 32bit checksum assembler code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/lib/checksum_32.S | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch
This is a fix for Variant 2 in
https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
Any speculative indirect calls in the kernel can be tricked
to execute any kernel code, which may allow side channel
attacks that can leak arbitrary kernel data.
So we want to
From: Andi Kleen
With the indirect call thunk enabled compiler two objtool
warnings are triggered very frequently and make the build
very noisy.
I don't see a good way to avoid them, so just disable them
for now.
Signed-off-by: Andi Kleen
---
tools/objtool/check.c | 11 +++
1 file cha
From: Dave Hansen
From: David Woodhouse
Add retpoline compile option in Makefile
Update Makefile with retpoline compile options. This requires a gcc with the
retpoline compiler patches enabled.
Print a warning when the compiler doesn't support retpoline
[Originally from David and Tim, but h
From: Andi Kleen
When the kernel or a module hasn't been compiled with a retpoline
aware compiler, print a warning and set a taint flag.
For modules it is checked at compile time, however it cannot
check assembler or other non compiled objects used in the module link.
Due to lack of better lett
From: Andi Kleen
Convert all indirect jumps in ftrace assembler code to use
non speculative sequences.
Based on code from David Woodhouse and Tim Chen
Signed-off-by: Andi Kleen
---
arch/x86/kernel/ftrace_32.S | 3 ++-
arch/x86/kernel/ftrace_64.S | 6 +++---
2 files changed, 5 insertions(+), 4
From: Andi Kleen
Convert all indirect jumps in 32bit irq inline asm code to use
non speculative sequences.
Signed-off-by: Andi Kleen
---
arch/x86/kernel/irq_32.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index a
On Wed, 3 Jan 2018, Dan Williams wrote:
> Speaking from a purely Linux kernel maintenance process perspective we
> play wack-a-mole with missed endian conversions and other bugs that
> coccinelle, sparse, etc help us catch.
Fully agreed.
> So this is in that same category, but yes, it's inconve
Hello,
on an Ivybridge CPU, I get with 4.14.11:
BUG: using smp_processor_id() in preemptible [] code:
ovsdb-server/4510
caller is native_flush_tlb_single+0x57/0xc0
CPU: 3 PID: 4510 Comm: ovsdb-server Not tainted
4.14.11-kvm-00434-gcd0b8eb84f5c #3
Hardware name: MSI MS-7798/B
> But then, exactly because the retpoline approach adds quite some cruft
> and leaves something to be desired, why even bother? Intel has also
Performance
> Also, according to Google the KVM PoC can be broken simply by clearing
> the registers on every exit to the hypervisor. Of course it's jus
On Wed, Jan 3, 2018 at 5:51 PM, Dan Williams wrote:
>
> Elena has done the work of auditing static analysis reports to a dozen
> or so locations that need some 'nospec' handling.
I'd love to see that patch, just to see how bad things look.
Because I think that really is very relevant to the inte
On Wed, Jan 3, 2018 at 5:27 PM, Jiri Kosina wrote:
> On Thu, 4 Jan 2018, Alan Cox wrote:
>
>> There are people trying to tune coverity and other tool rules to identify
>> cases,
>
> Yeah, but that (and *especially* Coverity) is so inconvenient to be
> applied to each and every patch ... that this
On Thu, 4 Jan 2018, Alan Cox wrote:
> > If the CPU speculation can cause these kinds of side-effects, it just must
> > not happen, full stop.
>
> At which point your performance will resemble that of a 2012 atom
> processor at best.
You know what? I'd be completely fine with that, if it's trad
On Wed, Jan 03, 2018 at 03:04:36PM +0530, afzal mohammed wrote:
> Let PDF & HTML's be created out of memory-barriers Text by
> reStructuring.
>
> reStructuring done were,
> 1. Section headers modification, lower header case except start
> 2. Removal of manual index(contents section), since it now
On 04/01/2018 00:51, Linus Torvalds wrote:
> On Wed, Jan 3, 2018 at 3:09 PM, Andi Kleen wrote:
>> This is a fix for Variant 2 in
>> https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
>>
>> Any speculative indirect calls in the kernel can be tricked
>> to execut
On Thu, 4 Jan 2018 02:27:54 +0100 (CET)
Jiri Kosina wrote:
> On Thu, 4 Jan 2018, Alan Cox wrote:
>
> > There are people trying to tune coverity and other tool rules to identify
> > cases,
>
> Yeah, but that (and *especially* Coverity) is so inconvenient to be
> applied to each and every pat
Hi Gang,
On 2017/12/14 13:14, Gang He wrote:
> As you know, ocfs2 has support trim the underlying disk via
> fstrim command. But there is a problem, ocfs2 is a shared disk
> cluster file system, if the user configures a scheduled fstrim
> job on each file system node, this will trigger multiple no
On 2018/1/4 4:13, Arnaldo Carvalho de Melo wrote:
Em Wed, Jan 03, 2018 at 03:33:07PM -0300, Arnaldo Carvalho de Melo escreveu:
Em Wed, Jan 03, 2018 at 03:27:01PM -0300, Arnaldo Carvalho de Melo escreveu:
Continuing investigation...
After applying the fallback patch to allow new tools to work
On 2018/1/2 19:02, Yunlong Song wrote:
>
>
> On 2018/1/2 14:49, Chao Yu wrote:
>> On 2017/12/30 15:42, Yunlong Song wrote:
>>> In some case, the node blocks has wrong blkaddr whose segment type is
>> You mean *data block* has wrong blkaddr whose segment type is NODE?
> Yes.
>>
>>> NODE, e.g., rec
On Wed, Jan 03, 2018 at 04:33:03PM -0800, Benjamin Gilbert wrote:
> I haven't been able to reproduce this on 4.15-rc6.
This is bad data. I was caught by the fact that 4.14.11 has
PAGE_TABLE_ISOLATION default y but 4.15-rc6 doesn't. Retesting.
--Benjamin Gilbert
Hi Shoaib,
Good to see you set out a patchset ;-)
On Tue, Jan 02, 2018 at 02:49:25PM -0800, Rao Shoaib wrote:
>
>
> On 01/02/2018 02:23 PM, Matthew Wilcox wrote:
> > On Tue, Jan 02, 2018 at 12:11:37PM -0800, rao.sho...@oracle.com wrote:
> > > -#define kfree_rcu(ptr, rcu_head)
On Thu, 4 Jan 2018, Alan Cox wrote:
> There are people trying to tune coverity and other tool rules to identify
> cases,
Yeah, but that (and *especially* Coverity) is so inconvenient to be
applied to each and every patch ... that this is not the way to go.
If the CPU speculation can cause thes
Hi,
2 month ago.
I start topic about replace jhash with xxhash.
That a another topic, about replace replace in memory hashing with xxhash.
Or at least make some light on that.
I use simple printk() in jhash/jhash2, to get correct input sizes,
so, at least on x86_64 systems, most of inputs are:
16
On Wed, 2018-01-03 at 21:11 +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.75 release.
> There are 39 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
[...]
On 2018/1/4 4:12, Jaegeuk Kim wrote:
> On 01/03, Chao Yu wrote:
>> If we need an array with variable size in the end of structure, we
>> can utilize flexible array feature which is supported in C99, so
>> let's change sit_nat_version_bitmap[] to flexible array in struct
>> f2fs_checkpoint for reada
On 04/01/2018 01:16, Andy Lutomirski wrote:
>> Note that the value I'm storing in HOST_FS_BASE and HOST_GS_BASE is
>> only used if FS/GS selector is zero. If FS/GS selector is not
>> zero, it is not used. Does that avoid this issue?
>>
> I'm not convinced that this is correct. It's not obviousl
Mel Gorman writes:
> On Wed, Jan 03, 2018 at 08:42:15AM +0800, Huang, Ying wrote:
>> Mel Gorman writes:
>>
>> > On Tue, Jan 02, 2018 at 12:29:55PM +0100, Jan Kara wrote:
>> >> On Tue 02-01-18 10:21:03, Mel Gorman wrote:
>> >> > On Sat, Dec 23, 2017 at 10:36:53AM +0900, Minchan Kim wrote:
>> >>
On 2018/1/4 3:06, Jaegeuk Kim wrote:
> On 01/03, Chao Yu wrote:
>> On 2018/1/3 10:21, Jaegeuk Kim wrote:
>>> This patch allows root to reserve some blocks via mount option.
>>>
>>> "-o reserve_root=N" means N x 4KB-sized blocks for root only.
>>>
>>> Signed-off-by: Jaegeuk Kim
>>> ---
>>>
>>> Chan
Hi Geert,
I love your patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on v4.15-rc6 next-20180103]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
[ adding Julia and Dan ]
On Wed, Jan 3, 2018 at 5:07 PM, Alan Cox wrote:
> On Wed, 3 Jan 2018 16:39:31 -0800
> Linus Torvalds wrote:
>
>> On Wed, Jan 3, 2018 at 4:15 PM, Dan Williams
>> wrote:
>> > The 'if_nospec' primitive marks locations where the kernel is disabling
>> > speculative executi
On 2018/1/4 2:58, Jaegeuk Kim wrote:
> Let's show precise # of blocks that user/root can use through bavail and bfree
> respectively.
>
> Signed-off-by: Jaegeuk Kim
> ---
> fs/f2fs/super.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/fs/f2fs/super.c b/fs/f2fs/sup
Hi Gang,
On 2018/1/3 13:14, Gang He wrote:
> Hi Alex,
>
>
>> Hi Gang,
>>
>> On 2017/12/28 18:07, Gang He wrote:
>>> Add ocfs2_overwrite_io function, which is used to judge if
>>> overwrite allocated blocks, otherwise, the write will bring extra
>>> block allocation overhead.
>>>
>>> Signed-
On Wed, 3 Jan 2018 16:39:31 -0800
Linus Torvalds wrote:
> On Wed, Jan 3, 2018 at 4:15 PM, Dan Williams wrote:
> > The 'if_nospec' primitive marks locations where the kernel is disabling
> > speculative execution that could potentially access privileged data. It
> > is expected to be paired with
On 1/3/2018 2:40 PM, Arnd Bergmann wrote:
The uplink_rpriv variable was added at the start of the function but
only used inside of an #ifdef:
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c: In function
'mlx5e_route_lookup_ipv6':
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c:1549:25: error:
On Wed, Jan 3, 2018 at 3:51 PM, Linus Torvalds
wrote:
> On Wed, Jan 3, 2018 at 3:09 PM, Andi Kleen wrote:
>> This is a fix for Variant 2 in
>> https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
>>
>> Any speculative indirect calls in the kernel can be tricked
Remove empty lines, useless comments and sort rules by alphabetical
order.
Signed-off-by: Cyrille Pitchen
---
Hi Bjorn,
This is the kernel oops I get when I test this patch.
I've applied it on top of the series for the Cadence PCIe controller.
I didn't have time to investigate more yet, sorry!
Hi,
In all my years of extensive experience writing drivers and kernels, I never
came across a situation
where you could brick an x86 CPU. Not until recently, when I was working on
debugging a piece of
code and I bricked an Intel CPU. I am not talking about an experimental
motherboard or anyt
> So you say, that we finally need a perl interpreter in the kernel to do
> alternative patching?
I don't think perl or objtool makes sense. That would be just incredibly
fragile because compilers can reorder and mix code.
It could be done with a gcc change I suppose. That should be reliable.
B
On Wed, Jan 3, 2018 at 4:15 PM, Dan Williams wrote:
> The 'if_nospec' primitive marks locations where the kernel is disabling
> speculative execution that could potentially access privileged data. It
> is expected to be paired with a 'nospec_{ptr,load}' where the user
> controlled value is actuall
> So you say, that we finally need a perl interpreter in the kernel to do
> alternative patching?
No but for weird cases like that
gcc -S
perl -e
as
does work.
Alan
On Wed, Jan 03, 2018 at 04:27:04PM -0800, Andy Lutomirski wrote:
> How much memory does the affected system have? It sounds like something
> is mapped in the LDT region and is getting corrupted because the LDT code
> expects to own that region.
We've seen this on systems from 1 to 7 GB.
--Benjam
On Wed, 3 Jan 2018, Benjamin Gilbert wrote:
> On Wed, Jan 03, 2018 at 10:20:16AM +0100, Greg Kroah-Hartman wrote:
> > Ick, not good, any chance you can test 4.15-rc6 to verify that the issue
> > is also there (or not)?
>
> I haven't been able to reproduce this on 4.15-rc6.
Hmm. So we need to scr
> On Jan 3, 2018, at 4:33 PM, Benjamin Gilbert
> wrote:
>
>> On Wed, Jan 03, 2018 at 10:20:16AM +0100, Greg Kroah-Hartman wrote:
>> Ick, not good, any chance you can test 4.15-rc6 to verify that the issue
>> is also there (or not)?
>
> I haven't been able to reproduce this on 4.15-rc6.
Ah.
On 01/03/2018 04:29 PM, Thomas Gleixner wrote:
> On Wed, 3 Jan 2018, Andi Kleen wrote:
>> unwind_init();
>> +
>> +#ifndef RETPOLINE
>> +add_taint(TAINT_NO_RETPOLINE, LOCKDEP_STILL_OK);
>> +pr_warn("No support for retpoline in kernel compiler\n");
>> +pr_warn("Kernel may be vulnerab
On Wed, Jan 03, 2018 at 10:20:16AM +0100, Greg Kroah-Hartman wrote:
> Ick, not good, any chance you can test 4.15-rc6 to verify that the issue
> is also there (or not)?
I haven't been able to reproduce this on 4.15-rc6.
--Benjamin Gilbert
On Wed, 3 Jan 2018 16:15:01 -0800
Andi Kleen wrote:
> > It should be a CPU_BUG bit as we have for the other mess. And that can be
> > used for patching.
>
> It has to be done at compile time because it requires a compiler option.
>
> Most of the indirect calls are in C code.
>
> So it cannot
On Thu, 4 Jan 2018, Alan Cox wrote:
> On Wed, 3 Jan 2018 16:15:01 -0800
> Andi Kleen wrote:
>
> > > It should be a CPU_BUG bit as we have for the other mess. And that can be
> > > used for patching.
> >
> > It has to be done at compile time because it requires a compiler option.
> >
> > Most
On Wed, 3 Jan 2018, Andi Kleen wrote:
Why is this all done without any configuration options?
I was thinking of a config option, but I was struggling with a name.
CONFIG_INSECURE_KERNEL, CONFIG_LEAK_MEMORY?
CONFIG_BUGGY_INTEL_CACHE (or similar)
something that indicates that this is to sup
On Wed, 3 Jan 2018, Andi Kleen wrote:
> unwind_init();
> +
> +#ifndef RETPOLINE
> + add_taint(TAINT_NO_RETPOLINE, LOCKDEP_STILL_OK);
> + pr_warn("No support for retpoline in kernel compiler\n");
> + pr_warn("Kernel may be vulnerable to data leaks.\n");
That's blantantly wrong.
T
Stefan Schake writes:
> We were calling enable_irq on bind, where it was already enabled previously
> by the IRQ helper. Additionally, dev->irq is not set correctly until after
> postinstall and so was always zero here, triggering a warning in 4.15.
> Fix both by moving the enable to the power ma
On Wed, 3 Jan 2018, Linus Torvalds wrote:
> On Wed, Jan 3, 2018 at 4:12 PM, Thomas Gleixner wrote:
> >
> > It should be a CPU_BUG bit as we have for the other mess. And that can be
> > used for patching.
>
> That would definitely be the right approach.
>
> However, that's also probably quite cha
101 - 200 of 956 matches
Mail list logo
