Since all cpus in the big and little clusters, respectively, are in the
same frequency domain, use all of them for mitigation in the
cooling-map. We end up with two cooling devices - one each for the big
and little clusters.
Signed-off-by: Amit Kucheria
Acked-by: Eduardo Valentin
---
Only one patch left in this series. This patch depends on [1] and [2] which
have been merged through by Rafael through the power tree.
Changes since v3:
- first trip point increased to 90 degrees based on Matthias' testing
- Added Acks
Changes since v2:
- Split up the series into
On Wednesday, January 30, 2019 10:40:17 PM CET Ladislav Michl wrote:
> pm_runtime_autosuspend_expiration calls ktime_get_mono_fast_ns
> even when its returned value may be unused. Therefore get
> current time later and remove gotos while there.
>
> Signed-off-by: Ladislav Michl
> Acked-by: Tony
On Tuesday, January 29, 2019 5:55:06 AM CET Amit Kucheria wrote:
> Add a flag for cpufreq drivers to tell cpufreq core to auto-register
> themselves as a thermal cooling device.
>
> There series converts over all the drivers except arm_big_little.c.
> Tested on SDM845 with the qcom-cpufreq-hw
On Monday, February 4, 2019 4:37:20 PM CET Sudeep Holla wrote:
> On Thu, Jan 31, 2019 at 04:05:59PM +, Sudeep Holla wrote:
> > On Thu, Jan 31, 2019 at 12:48:49AM +0100, Rafael J. Wysocki wrote:
> > > On Friday, January 25, 2019 4:09:06 PM CET Sudeep Holla wrote:
> > > > The sysfs for the cpu
From: Colin Ian King
Shifting a u8 by 24 will cause the value to be promoted to an integer. If
the top bit of the u8 is set then the following conversion to an unsigned
long will sign extend the value causing the upper 32 bits to be set in
the result.
Fix this by casting the u8 value to an
On Friday, February 1, 2019 7:15:44 AM CET Viresh Kumar wrote:
> Freq attribute for "trans_table" is defined right after its callback
> (without any blank line between them), but the others are defined
> separately later on. Keep this consistent and define all attributes
> right after their
On Mon 2019-02-04 14:56:49, Petr Mladek wrote:
> This patchset implements ideas that were mentioned and postponed during
> the review of the atomic replace patchset.
>
> The patches apply on top of livepatching.git, branch
> origin/for-5.1/atomic-replace.
>
>
> Changes against v1:
>
> +
On 04/02/19 15:42, Suthikulpanit, Suravee wrote:
> From: Julian Stecklina
>
> ACK notifiers don't work with AMD AVIC when the PIT interrupt is
> delivered as edge-triggered fixed interrupt via the IOAPIC. AMD
> processors cannot exit on EOI for these interrupts. The ACK notifiers do
> work when
On Monday, February 4, 2019 5:25:51 PM CET Vincent Guittot wrote:
> Fix time accounting which has the same lock contraint as for using hrtimer
> and update accounting_timestamp only when useful.
>
> Vincent Guittot (2):
> PM-runtime: move runtime accounting on ktime_get_mono_fast_ns()
>
On Tue 2019-02-05 09:59:33, Josh Poimboeuf wrote:
> On Tue, Feb 05, 2019 at 03:33:28AM +0900, Alice Ferrazzi wrote:
> > From: Alice Ferrazzi
> >
> > As a result of an unsupported operation is better to use EOPNOTSUPP
> > as error code.
> > ENOSYS is only used for 'invalid syscall nr' and nothing
On Tue, 2019-02-05 at 23:13 +0100, Thierry Reding wrote:
[...]
> > Drivers that never call _acquire()/_release() must continue to work as
> > they are, so exclusive reset controls have to be acquired by default.
>
> I don't think they have to. See below.
Currently the API makes guarantees about
Hi Julien,
On Thu, Jan 31, 2019 at 02:58:38PM +, Julien Thierry wrote:
> This series is a continuation of the work started by Daniel [1]. The goal
> is to use GICv3 interrupt priorities to simulate an NMI.
>
> The patches depend on the core API for NMIs patches [2]. Both series can
> be
Depends:
commit a1140e7bcb10ff96c192ee200e6cbf832f27158e
("PCI: fix serious bug when sizing bridges with additional size")
Background: I have come to find that the kernel parameters for reserving
resources for the hotplug bridges are not useful for Thunderbolt with
native PCI enumeration. You can
From: Colin Ian King
Shifting a u8 by 24 will cause the value to be promoted to an integer. If
the top bit of the u8 is set then the following conversion to an unsigned
long will sign extend the value causing the upper 32 bits to be set in
the result.
Fix this by casting the u8 value to an
Background: I discovered a bug while preparing my next patch for
Thunderbolt native PCI enumeration. This bugfix is vital for that next
Thunderbolt patch. They are related and could be put together but I am
presenting them as separate patches.
Nature of problem: On boot, the PCI bridges are
wt., 29 sty 2019 o 09:44 Bartosz Golaszewski napisał(a):
>
> From: Bartosz Golaszewski
>
> This series aims at reworking the gpio-mockup debugfs interface. The
> reason for that is the fact that certain known problems with this
> testing module exist and the user-space tests are broken anyway
>
On 2019/02/04 17:07, Dmitry Vyukov wrote:
> On Fri, Feb 1, 2019 at 2:09 PM Tetsuo Handa
> wrote:
>>
>> On 2019/02/01 19:50, Dmitry Vyukov wrote:
>>> On Fri, Feb 1, 2019 at 11:44 AM Tetsuo Handa
>>> wrote:
On 2019/02/01 19:09, Dmitry Vyukov wrote:
> Thanks for the explanations.
On Wed, Feb 06, 2019 at 09:46:28AM +, claudiu.bez...@microchip.com wrote:
>
>
> On 06.02.2019 10:13, Ludovic Desroches wrote:
> > On Thu, Jan 31, 2019 at 05:18:04PM +0100, Claudiu Beznea - M18063 wrote:
> >> From: Claudiu Beznea
> >>
> >> SAM9X60 uses high and low drive strengths. To
On Wed, Feb 6, 2019 at 4:14 PM Linus Walleij wrote:
>
> On Wed, Feb 6, 2019 at 4:32 AM Chen-Yu Tsai wrote:
>
> > The A80 SoC has configuration registers for I/O bias voltage. Incorrect
> > settings would make the affected peripherals inoperable in some cases,
> > such as Ethernet RGMII signals
_lock_irq+0x18/0x50
[ 64.055068] softirqs last enabled at (8096): []
__do_softirq+0x4f0/0x5e4
[ 64.062680] softirqs last disabled at (8083): []
irq_exit+0x160/0x16c
[ 64.069953] Preemption disabled at:
[ 64.069956] [<>] (null)
[ 64.076700] CPU: 6 PID: 353 Comm: aplay No
On 2/6/19 11:05, Charles Keepax wrote:
> DAIs linked to the dummy will not have an associated playback/capture
> widget, so we need to skip the update in that case.
>
> Fixes: 078a85f2806f ("ASoC: dapm: Only power up active channels from a DAI")
> Signed-off-by: Charles Keepax
Tested-by:
+Marek
As Vivek's and Andrzej's Samsung IDs bounced back.
On 06/02/19 11:38, Jochen Sprickerhof wrote:
> * Roger Quadros [2019-02-06 10:41]:
>> Hi,
>>
>> On 21/01/19 16:02, Jochen Sprickerhof wrote:
> [..]
>>> I'm not sure why this it only works with the driver compiled into the
>>> kernel nor
The rx_set_mode invokes number of messages to be send to PF for receive
mode configuration. In case if there any issues we need to stop sending
messages and release allocated memory.
This commit is to implement check of nicvf_msg_send_to_pf() result.
Signed-off-by: Vadim Lomovtsev
---
Having one work queue for receive mode configuration ndo_set_rx_mode()
call for all VFs results in making each of them wait till the
set_rx_mode() call completes for another VF if any of close, set
receive mode and change flags calls being already invoked. Potentially
this could cause device state
From: Melchior Franz
The FB_PRE_INIT_FB option keeps the kernel from reinitializing the display
and prevents flickering during the transition from a bootloader splash
screen to the kernel logo screen.
Make this option available for the mxsfb driver.
Signed-off-by: Melchior Franz
To communicate to PF each of ThunderX NIC VF uses mailbox which is
pair of 64 bit registers available to both VFn and PF.
This commit is to change the xcast message structure in order to
fit it into 64 bit.
Signed-off-by: Vadim Lomovtsev
---
drivers/net/ethernet/cavium/thunder/nic.h| 6
This commit is to implement routines to read mailbox IRQ status
for particular VF at PF side, and for mailbox IRQ status
from PF at VF side.
Signed-off-by: Vadim Lomovtsev
---
drivers/net/ethernet/cavium/thunder/nic_main.c | 13 +
Correct STREERING to STEERING at macro name for BGX steering register.
Signed-off-by: Vadim Lomovtsev
---
drivers/net/ethernet/cavium/thunder/thunder_bgx.c | 2 +-
drivers/net/ethernet/cavium/thunder/thunder_bgx.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
At the end of NIC VF initialization it send CFG_DONE message to PF without
using nicvf_msg_send_to_pf routine. This potentially could re-write data in
mailbox. This commit is to implement common way of sending CFG_DONE message
by the same way with other configuration messages by using
The ThunderX CN88XX NIC Virtual Function driver uses mailbox interface
to communicate to physical function driver. Each of VF has it's own pair
of mailbox registers to read from and write to. The mailbox registers
has no protection from possible races, so it has to be implemented
at software
In order to prevent mailbox data re-writing at VF side we need to check if
there is an active mailbox IRQ from PF, and if there is no one proceed with
sending message to PF. Having spinlock at irq handler and message send
routing wont help since by the moment when code flow would reach the irq
In some cases it could happen that nicvf_send_msg_to_pf() could be called
concurrently for the same NIC VF, and thus re-writing mailbox contents and
breaking messaging sequence with PF by re-writing NICVF data.
This commit is to implement mutex for NICVF to protect mailbox registers
and NICVF
Hi Matthias,
On Tuesday 05 Feb 2019 at 09:52:25 (-0800), Matthias Kaehlcke wrote:
> Try and register an Energy Model from mediatek-cpufreq to allow
> interested subsystems like the task scheduler to use the provided
> information.
>
> Signed-off-by: Matthias Kaehlcke
> ---
>
On 2/6/19 10:46, Sylwester Nawrocki wrote:
> On 2/5/19 22:16, Krzysztof Kozlowski wrote:
>> Bisect pointed to commit:
>> commit 078a85f2806f0ffd11289009462a6a390f9adb5c
>> Author: Charles Keepax
>> Date: Thu Jan 31 13:30:18 2019 +
>> ASoC: dapm: Only power up active
Hi Felipe, thanks for the review!
On Wed, 2019-02-06 at 08:35 +0200, Felipe Balbi wrote:
> Hi,
>
> Nicolas Saenz Julienne writes:
> > diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
> > index 40fa25c4d041..a4efbe62a1a3 100644
> > --- a/drivers/usb/host/xhci-ring.c
> >
From: Colin Ian King
Shifting a u8 by 24 will cause the value to be promoted to an integer. If
the top bit of the u8 is set then the following conversion to an unsigned
long will sign extend the value causing the upper 32 bits to be set in
the result.
Fix this by casting the u8 value to an
DAIs linked to the dummy will not have an associated playback/capture
widget, so we need to skip the update in that case.
Fixes: 078a85f2806f ("ASoC: dapm: Only power up active channels from a DAI")
Signed-off-by: Charles Keepax
---
Ok so that all makes sense, this patch is probably the best
Randy Dunlap writes:
> On 2/4/19 9:46 AM, Randy Dunlap wrote:
>> On 2/4/19 5:42 AM, Geert Uytterhoeven wrote:
>>> Below is the list of build error/warning regressions/improvements in
>>> v5.0-rc5[1] compared to v4.20[2].
>>>
>>> Summarized:
>>> - build errors: +2/-4
>>> - build warnings:
On Wed, Feb 06, 2019 at 10:20:00AM +0100, Maxime Ripard wrote:
> On Tue, Feb 05, 2019 at 09:44:02PM +0800, Chen-Yu Tsai wrote:
> > On Tue, Feb 5, 2019 at 5:45 PM Maxime Ripard
> > wrote:
> > >
> > > On Sat, Feb 02, 2019 at 05:52:09PM +0200, Priit Laes wrote:
> > > > Recent patch of improving MP
Hi Brian!
Thanks for this patch!
On Fri, Jan 25, 2019 at 5:23 PM Brian Masney wrote:
> The IRQ handler was hardcoded as handle_level_irq and this patch
> properly sets the handler to either handle_edge_irq or handle_level_irq
> depending on the IRQ type.
Done like so:
> +
On Tue, Feb 05, 2019 at 10:16:22PM +0100, Krzysztof Kozlowski wrote:
> Bisect pointed to commit:
> commit 078a85f2806f0ffd11289009462a6a390f9adb5c
> Author: Charles Keepax
> Date: Thu Jan 31 13:30:18 2019 +
> ASoC: dapm: Only power up active channels from a DAI
>
> as a
On 06/02/2019 06:33:39+, oliver.r...@wago.com wrote:
> >> + switch (rs5c->type) {
> >> + case rtc_r2025sd:
> >> + case rtc_r2221tl:
> >> + if (ctrl2 & R2x2x_CTRL2_VDET)
> >> + dev_warn(>dev, "rtc battery voltage drop below
> >> threshold detected.\n");
> >
> >
Define the length of the DBI registers. This makes sure that
the kernel does not access registers beyond that point, avoiding
the following abort on a i.MX 6Quad:
# cat /sys/devices/soc0/soc/1ffc000.pcie/pci\:00/\:00\:00.0/config
[ 100.021433] Unhandled fault: imprecise external abort
Add length to the struct dw_pcie and check that the accessors
dw_pcie_(rd|wr)_conf() do not read/write beyond that point.
Suggested-by: Trent Piepho
Signed-off-by: Stefan Agner
---
Changes in v4:
- Move length check to dw_pcie_rd_conf
Changes in v5:
- Rebased ontop of pci/dwc
On Tue, Feb 5, 2019 at 12:27 PM Rafael J. Wysocki wrote:
>
> On Tuesday, February 5, 2019 9:15:49 AM CET Ulf Hansson wrote:
> > On Mon, 4 Feb 2019 at 12:45, Rafael J. Wysocki wrote:
> > >
> > > On Mon, Feb 4, 2019 at 12:40 PM Rafael J. Wysocki
> > > wrote:
> > > >
> > > > On Fri, Feb 1, 2019
From: Colin Ian King
Shifting a u8 by 24 will cause the value to be promoted to an integer. If
the top bit of the u8 is set then the following conversion to an unsigned
long will sign extend the value causing the upper 32 bits to be set in
the result.
Fix this by casting the u8 value to an
On Tue 05-02-19 09:50:59, Ira Weiny wrote:
> The problem: Once we have pages marked as GUP-pinned how should various
> subsystems work with those markings.
>
> The current work for John Hubbards proposed solutions (part 1 and 2) is
> progressing.[1] But the final part (3) of his solution is also
Hi Krzysztof,
Cc: Charles
On 2/5/19 22:16, Krzysztof Kozlowski wrote:
> Bisect pointed to commit:
> commit 078a85f2806f0ffd11289009462a6a390f9adb5c
> Author: Charles Keepax
> Date: Thu Jan 31 13:30:18 2019 +
> ASoC: dapm: Only power up active channels from a DAI
>
>
On 06.02.2019 10:13, Ludovic Desroches wrote:
> On Thu, Jan 31, 2019 at 05:18:04PM +0100, Claudiu Beznea - M18063 wrote:
>> From: Claudiu Beznea
>>
>> SAM9X60 uses high and low drive strengths. To implement this, in
>> at91_pinctrl_mux_ops::set_drivestrength and
>>
Initial support for watchdog block included in ROHM BD70528
power management IC.
Configurations for low power states are still to be checked.
Signed-off-by: Matti Vaittinen
Acked-by: Guenter Roeck
---
drivers/watchdog/Kconfig | 12 +++
drivers/watchdog/Makefile | 1 +
ROHM BD70528 PMIC includes battery charger block. Support charger
staus queries and doing few basic settings like input current limit
and charging current.
Signed-off-by: Matti Vaittinen
---
drivers/power/supply/Kconfig | 9 +
drivers/power/supply/Makefile | 1 +
Support RTC block in ROHM bd70528 power management IC. Support
getting and setting the time and date as well as arming an alarm
which can also be used to wake the PMIC from standby state.
HW supports wake interrupt only for the next 24 hours (sec, minute
and hour information only) so we limit
ROHM BD70528 PMIC has 4 GPIO pins. Allow them to be
controlled by GPIO framework.
IRQs are handled by regmap-irq and GPIO driver is not
aware of the irq usage.
Signed-off-by: Matti Vaittinen
Reviewed-by: Linus Walleij
---
drivers/gpio/Kconfig| 11 +++
drivers/gpio/Makefile |
Document bindings for regulators (3 bucks, 3 LDOs and 2 LED
drivers) and 4 GPIO pins which can be configured for I/O or
as interrupt sources withe configurable trigger levels.
Signed-off-by: Matti Vaittinen
Reviewed-by: Rob Herring
Acked-by: Linus Walleij
---
ROHM BD70528 is an ultra low power PMIC with similar 32K clk as
bd718x7. Only difference (from clk perspective) is register address.
Add support for controlling BD70528 clk using bd718x7 driver.
Signed-off-by: Matti Vaittinen
---
drivers/clk/Kconfig | 6 +++---
drivers/clk/clk-bd718x7.c
ROHM BD70528MWV is an ultra-low quiescent current general
purpose single-chip power management IC for battery-powered
portable devices.
Add MFD core which enables chip access for following subdevices:
- regulators/LED drivers
- battery-charger
- gpios
- 32.768kHz
Header rohm-bd718x7.h was split to generic and component specific
parts. This changed the struct bd718x7. Adapt the regulator driver to
these changes.
Signed-off-by: Matti Vaittinen
Acked-by: Mark Brown
---
Please note that I kept the Acked-by from Mark as the change
from
struct
Header rohm-bd718x7.h was split to generic and component specific
parts. This changed the struct bd718x7. Adapt the clk driver to
these changes.
Signed-off-by: Matti Vaittinen
---
drivers/clk/clk-bd718x7.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
Hi Brian!
On Fri, Jan 25, 2019 at 5:23 PM Brian Masney wrote:
> The probing of this driver calls platform_irq_count, which will
> setup all of the IRQs that are configured in device tree. In
> preparation for converting this driver to be a hierarchical IRQ
> chip, hardcode the IRQ count based
Hi Miquel,
On mar., janv. 08 2019, Miquel Raynal wrote:
> Fix the SATA IP memory area which is only 0x178 bytes long (from
> Marvell A3700 specification). Actually, starting from the offset
> 0xe0178, there is an area dedicated to the COMPHY driver.
>
> Suggested-by: Grzegorz Jaszczyk
>
Split the bd718x7.h to ROHM common and bd718x7 specific parts
so that we do not need to add same things in every new ROHM
PMIC header. Please note that this change requires changes also
in bd718x7 sub-device drivers for regulators and clk.
Signed-off-by: Matti Vaittinen
---
Patch series introducing support for ROHM BD70528 PMIC
Please note that patch 1 breaks compilation without patches 2 and 3
Knowing the bd718x7 driver is already in upstream, it might be good
if this change went through single tree, right?
ROHM BD70528 is a programmable Power Management IC for
On 06/02/2019 08:59, Julien Thierry wrote:
> Hi Torsten,
>
> On 18/01/2019 16:39, Torsten Duwe wrote:
>> Once gcc8 adds 2 NOPs at the beginning of each function, replace the
>> first NOP thus generated with a quick LR saver (move it to scratch reg
>> x9), so the 2nd replacement insn, the call
Hi Bjorn,
Am Dienstag, den 05.02.2019, 17:31 -0600 schrieb Bjorn Helgaas:
> [+cc Richard, Lucas]
>
> On Tue, Feb 05, 2019 at 01:04:28PM -0800, Thinh Nguyen wrote:
> > The Synopsys HAPS USB controller has a VID PID (16c3,abcd) that
> > matches
> > to an existing PCIe controller. This quirk is
On 05/02/2019 18:23, Christoph Hellwig wrote:
On Tue, Feb 05, 2019 at 03:09:28PM +, John Garry wrote:
For SCSI devices, unfortunately not all IO sent to the HW originates from
blk-mq or any other single entity.
Where else would SCSI I/O originate from?
Please note that I was referring
On Tue, Feb 05, 2019 at 09:44:02PM +0800, Chen-Yu Tsai wrote:
> On Tue, Feb 5, 2019 at 5:45 PM Maxime Ripard
> wrote:
> >
> > On Sat, Feb 02, 2019 at 05:52:09PM +0200, Priit Laes wrote:
> > > Recent patch of improving MP clock rate calculations by taking
> > > into account whether adjusting
Hi,
On Tue, Feb 05, 2019 at 02:15:59PM -0800, Yizhuo wrote:
> In function sun8i_dwmac_set_syscon(), local variable "val" could
> be uninitialized if function regmap_read() returns -EINVAL.
> However, it will be used directly in the if statement, which
> is potentially unsafe.
>
> Signed-off-by:
On 10/01/19 11:55 AM, Jiri Olsa wrote:
> On Wed, Jan 09, 2019 at 11:18:29AM +0200, Adrian Hunter wrote:
>> Hi
>>
>> Here are some patches to improve the exported call graph, primarily to deal
>> with x86 retpolines.
>>
>>
>> Adrian Hunter (6):
>> perf tools: Fix split_kallsyms_for_kcore for
Hi Torsten,
On 18/01/2019 16:39, Torsten Duwe wrote:
> Once gcc8 adds 2 NOPs at the beginning of each function, replace the
> first NOP thus generated with a quick LR saver (move it to scratch reg
> x9), so the 2nd replacement insn, the call to ftrace, does not clobber
> the value. Ftrace will
Hi Kishon,
Miquel Raynal wrote on Tue, 8 Jan 2019
17:31:17 +0100:
> Hello,
>
> This series adds a new driver to support Armada 3700 COMPHY IP.
> The series has been tested on an ESPRESSObin with SATA, PCIe
> and USB3 host. For this purpose, patch 1 enumerates the SATA PHY
> mode. The SGMII
On Thu, Jan 31, 2019 at 05:18:00PM +0100, Claudiu Beznea - M18063 wrote:
> From: Claudiu Beznea
Minor comment for patch 1.
Acked-by: Ludovic Desroches for the
whole series.
>
> This series adds drive strenght and slew rate support for SAMX60's pin
> controller. For drive strenght we could
On Wed, Feb 06, 2019 at 11:52:03AM +0300, Cyrill Gorcunov wrote:
...
> >
> > - if ((flags & ~TFD_SETTIME_FLAGS) ||
> > -!itimerspec64_valid(new))
> > - return -EINVAL;
>
> Please don't defer this early test of a @flags value. Otherwise
> if @flags is invalid you continue
On Wed, Feb 06, 2019 at 09:42:48AM +0100, Fabrice Gasnier wrote:
> If you agree with the current approach, I can send a V2 with Tomasz's
> suggestion to remove the ifdefs and use __maybe_unused instead.
I think the suspend callback should have something like:
if (is_still_enabled) {
On Wed, Feb 06, 2019 at 12:10:39AM +, Dmitry Safonov wrote:
> From: Andrei Vagin
>
> Make timerfd respect timens offsets.
> Provide two helpers timens_clock_to_host() timens_clock_from_host() that
> are useful to wire up timens to different kernel subsystems.
> Following patches will use
On Tue, Feb 05, 2019 at 10:47:32PM -0500, Qian Cai wrote:
> The commit c68d77911c23 ("mm, compaction: be selective about what
> pageblocks to clear skip hints") introduced an infinite loop if a pfn is
> invalid, it will loop again without increasing page counters. It can be
> reproduced by running
> On 5 Feb 2019, at 23:36, Jason Gunthorpe wrote:
>
> On Thu, Jan 31, 2019 at 06:09:51PM +0100, Håkon Bugge wrote:
>> Using CX-3 virtual functions, either from a bare-metal machine or
>> pass-through from a VM, MAD packets are proxied through the PF driver.
>>
>> Since the VMs have separate
On 2/5/19 11:25 PM, Thierry Reding wrote:
> On Tue, Feb 05, 2019 at 09:47:32PM +0100, Uwe Kleine-König wrote:
>> Hello,
>>
>> On Tue, Feb 05, 2019 at 01:40:27PM +0100, Fabrice Gasnier wrote:
>>> Add suspend/resume PM sleep ops. When going to low power, disable
>>> active PWM channel. Active PWM
On 2/5/19 7:30 PM, Tomasz Duszynski wrote:
> On Tue, Feb 05, 2019 at 01:40:27PM +0100, Fabrice Gasnier wrote:
>> Add suspend/resume PM sleep ops. When going to low power, disable
>> active PWM channel. Active PWM channel is resumed, by calling
>> pwm_apply_state(). This is inspired by Thierry's
Hi Wen
On 2/3/19 4:52 AM, wen yang wrote:
> The call to of_find_node_by_name returns a node pointer with refcount
> incremented thus it must be explicitly decremented here after the last
> usage.
> The of_find_device_by_node() takes a reference to the underlying device
> structure, we also should
On Wed, Feb 6, 2019 at 3:44 PM Michael Ellerman wrote:
>
> Balbir Singh writes:
> > On Tue, Feb 5, 2019 at 10:24 PM Michael Ellerman
> > wrote:
> >> Balbir Singh writes:
> >> > On Sat, Feb 2, 2019 at 12:14 PM Balbir Singh
> >> > wrote:
> >> >> On Tue, Jan 22, 2019 at 10:57:21AM -0500, Joe
On 1/29/2019 6:58 PM, jgli...@redhat.com wrote:
> Convert ODP to use HMM so that we can build on common infrastructure
> for different class of devices that want to mirror a process address
> space into a device. There is no functional changes.
Thanks for sending this patch. I think in general
Hi Martin,
On Tue, 5 Feb 2019 16:52:51 +0100
Martin Kepplinger wrote:
> Disable BCH soft reset according to MX23 erratum #2847 ("BCH soft
> reset may cause bus master lock up") for MX28 too. It has the same
> problem.
>
> Observed problem: once per 100,000+ MX28 reboots NAND read failed on
>
Hi,
On 21/01/19 16:02, Jochen Sprickerhof wrote:
> Note that it only works with USB_XHCI_PLATFORM=y. Also it needs a hard
> reset when coming from an unpatched kernel.
>
> This was included in the original patch in
> https://patchwork.kernel.org/patch/9992809/ but got dropped when
> accepted in
Hi Yizhuo
On 2/6/19 4:30 AM, Yizhuo wrote:
> In function miphy_osc_is_ready(), local variable "val"
> could be uninitalized. if function regmap_read() returns
> -EINVAL. However, this value is used in if statement.
> This is potentially unsafe.
>
> Signed-off-by: Yizhuo
> ---
>
On 2019/1/30 5:29 下午, Geliang Tang wrote:
> This patch uses kmemdup_nul to create a NUL-terminated string from
> dc->sb.label. This is better than open coding it.
>
> With this, we can move env[2] initialization into env[] array to make
> code more elegant.
>
> Signed-off-by: Geliang Tang
Hi
From: Your Name
On Tue, 2019-02-05 at 15:52:51 UTC, Martin Kepplinger wrote:
> Disable BCH soft reset according to MX23 erratum #2847 ("BCH soft
> reset may cause bus master lock up") for MX28 too. It has the same
> problem.
>
> Observed problem: once per 100,000+ MX28 reboots NAND read failed
Hi Bartosz,
On 31/01/19 7:08 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> This field is not used by any board. Remove it as part of the interrupt
> support cleanup.
Can you please make sure the patch description is independently readable
without the subject line being read
Hello Thierry,
On Wed, Feb 06, 2019 at 12:01:26AM +0100, Thierry Reding wrote:
> On Mon, Jan 07, 2019 at 11:10:40PM +0100, Uwe Kleine-König wrote:
> > On Mon, Jan 07, 2019 at 09:30:55AM +, claudiu.bez...@microchip.com
> > wrote:
> > > On 05.01.2019 23:05, Uwe Kleine-König wrote:
> > > > On
On Thu, Jan 31, 2019 at 6:30 PM Bjorn Andersson
wrote:
> The SDC controls live in the south tile, not the north one. Correct this
> so that we program the right registers.
>
> Cc: sta...@vger.kernel.org
> Fixes: 22eb8301dbc1 ("pinctrl: qcom: Add qcs404 pinctrl driver")
> Signed-off-by: Bjorn
On Wed, Feb 6, 2019 at 4:32 AM Chen-Yu Tsai wrote:
> The A80 SoC has configuration registers for I/O bias voltage. Incorrect
> settings would make the affected peripherals inoperable in some cases,
> such as Ethernet RGMII signals biased at 2.5V with the settings still
> at 3.3V. However low
On Thu, Jan 31, 2019 at 05:18:04PM +0100, Claudiu Beznea - M18063 wrote:
> From: Claudiu Beznea
>
> SAM9X60 uses high and low drive strengths. To implement this, in
> at91_pinctrl_mux_ops::set_drivestrength and
> at91_pinctrl_mux_ops::get_drivestrength we need bit numbers of
> drive strengths (1
Hi Linus,
here are some overdue pin control fixes for the v5.0
series. Was too busy to send them until now.
Please pull them in!
Yours,
Linus Walleij
The following changes since commit bfeffd155283772bbe78c6a05dec7c0128ee500c:
Linux 5.0-rc1 (2019-01-06 17:08:20 -0800)
are available in the
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