On 10/8/20 1:44 PM, Hans de Goede wrote:
Hi Maximilian,
On 10/5/20 6:03 PM, Maximilian Luz wrote:
As has come up in the discussion around
[RFC PATCH] Add support for Microsoft Surface System Aggregator Module
it may make sense to add a Microsoft Surface specific platform
subdirectory. Andy
Document the new device-tree bindings for boards
HK10-C1 and HK10-C2 based on ipq8074 SoC.
Signed-off-by: Gokul Sriram Palanisamy
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/arm/qcom.yaml | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/a
Add initial support for IPQ8074 SoC based HK10-C1
and HK10-C2 evaluation boards.
Signed-off-by: Gokul Sriram Palanisamy
---
arch/arm64/boot/dts/qcom/Makefile| 2 +
arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts | 11
arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts | 14 +
arch/a
Enabled MHI device support over PCIe and added memory
reservation required for MHI enabled QCN9000 PCIe card.
Signed-off-by: Gokul Sriram Palanisamy
---
arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 47 ++
1 file changed, 47 insertions(+)
diff --git a/arch/arm64/boot/
On Thu 08-10-20 13:41:59, Vlastimil Babka wrote:
> All per-cpu pagesets for a zone use the same high and batch values, that are
> duplicated there just for performance (locality) reasons. This patch adds the
> same variables also to struct zone as a shared copy.
>
> This will be useful later for m
Some complex dmaengine controllers have capability to program the
peripheral device, so pass on the peripheral configuration as part of
dma_slave_config
Signed-off-by: Vinod Koul
---
include/linux/dmaengine.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/linux/dmaengine.h b/in
Add devicetree binding documentation for GPI DMA controller
implemented on Qualcomm SoCs
Signed-off-by: Vinod Koul
---
.../devicetree/bindings/dma/qcom,gpi.yaml | 86 +++
include/dt-bindings/dma/qcom-gpi.h| 11 +++
2 files changed, 97 insertions(+)
create mode 10
This series adds support for Qcom GSI dma controller found on Qualcomm SoCs.
This controller can program the peripheral configuration so we add
additional parameters in dma_slave_config for configuring the peripherals
like spi and i2c.
Changes in v3:
- Update the i2c tre creation based on testing
On Thu, Oct 08, 2020 at 10:09:09AM +0200, Pavel Machek wrote:
> Hi!
>
> > +int main(void)
> > +{
> > +struct pollfd pfd = { .events = POLLIN };
> > +struct counter_event event_data[2];
> > +
> > +pfd.fd = open("/dev/counter0", O_RDWR)
XFAIL is gone since 9847d24af95c ("selftests/harness: Refactor XFAIL
into SKIP"), use SKIP instead.
Fixes: 9847d24af95c ("selftests/harness: Refactor XFAIL into SKIP")
Signed-off-by: Tommi Rantala
---
tools/testing/selftests/clone3/clone3_cap_checkpoint_restore.c | 2 +-
1 file changed, 1 insert
Skip test if kcmp() is not available, for example if kernel is compiled
without CONFIG_CHECKPOINT_RESTORE=y.
Signed-off-by: Tommi Rantala
---
tools/testing/selftests/pidfd/pidfd_getfd_test.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/tools/testing/selftests/pidfd/pid
Makefile already contains -D_GNU_SOURCE, so we can remove it from the
*.c files.
Signed-off-by: Tommi Rantala
---
tools/testing/selftests/proc/proc-loadavg-001.c | 1 -
tools/testing/selftests/proc/proc-self-syscall.c | 1 -
tools/testing/selftests/proc/proc-uptime-002.c | 1 -
3 files change
kcmp is not used in pidfd_setns_test.c, so do not include
Signed-off-by: Tommi Rantala
---
tools/testing/selftests/pidfd/pidfd_setns_test.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/testing/selftests/pidfd/pidfd_setns_test.c
b/tools/testing/selftests/pidfd/pidfd_setns_test.c
ind
kcmp syscall is used in pidfd_getfd_test.c, so add
CONFIG_CHECKPOINT_RESTORE=y to config to ensure kcmp is available.
Signed-off-by: Tommi Rantala
---
tools/testing/selftests/pidfd/config | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/testing/selftests/pidfd/config
b/tools/testing/se
XFAIL is gone since 9847d24af95c ("selftests/harness: Refactor XFAIL
into SKIP"), use SKIP instead.
Fixes: 9847d24af95c ("selftests/harness: Refactor XFAIL into SKIP")
Signed-off-by: Tommi Rantala
---
tools/testing/selftests/core/close_range_test.c | 8
1 file changed, 4 insertions(+),
Fix multiple definition of sock_name compilation error:
tools/testing/selftests/android/ion/ipcsocket.h:8: multiple definition of
`sock_name'
Signed-off-by: Tommi Rantala
---
tools/testing/selftests/android/ion/ipcsocket.c | 1 +
tools/testing/selftests/android/ion/ipcsocket.h | 2 --
2 file
Commit 9847d24af95c ("selftests/harness: Refactor XFAIL into SKIP")
replaced XFAIL with SKIP in the output. Add one more space to make the
output aligned and pretty again.
Fixes: 9847d24af95c ("selftests/harness: Refactor XFAIL into SKIP")
Signed-off-by: Tommi Rantala
---
tools/testing/selftests
Hi, small fixes to issues I hit with selftests.
Tommi Rantala (13):
selftests: filter kselftest headers from command in lib.mk
selftests: pidfd: fix compilation errors due to wait.h
selftests: add vmaccess to .gitignore
selftests/harness: prettify SKIP message whitespace again
selftests:
XFAIL is gone since 9847d24af95c ("selftests/harness: Refactor XFAIL
into SKIP"), use SKIP instead.
Fixes: 9847d24af95c ("selftests/harness: Refactor XFAIL into SKIP")
Signed-off-by: Tommi Rantala
---
.../selftests/filesystems/binderfs/binderfs_test.c| 8
1 file changed, 4 inser
There's planned tests != run tests in pidfd_test when some test is
skipped:
$ ./pidfd_test
TAP version 13
1..8
[...]
# pidfd_send_signal signal recycled pid test: Skipping test
# Planned tests != run tests (8 != 7)
# Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
Fix by using
Drop unneeded header inclusion to fix pidfd compilation
errors seen in Fedora 32:
In file included from pidfd_open_test.c:9:
../../../../usr/include/linux/wait.h:17:16: error: expected identifier before
numeric constant
17 | #define P_ALL 0
|^
Signed-off-by: Tommi Rant
Commit 1056d3d2c97e ("selftests: enforce local header dependency in
lib.mk") added header dependency to the rule, but as the rule uses $^,
the headers are added to the compiler command line.
This can cause unexpected precompiled header files being generated when
compilation fails:
$ echo { >> o
Commit 2de4e82318c7 ("selftests/ptrace: add test cases for dead-locks")
added vmaccess testcase, add the binary to .gitignore
Fixes: 2de4e82318c7 ("selftests/ptrace: add test cases for dead-locks")
Signed-off-by: Tommi Rantala
---
tools/testing/selftests/ptrace/.gitignore | 1 +
1 file changed,
oN tHU, aug 27, 2020 at 10:35:16AM +1200, Mark Tomlinson wrote:
> This adds i2c bus recovery to the mv64xxx driver.
>
> Implement bus recovery to recover from SCL/SDA stuck low.
>
> This uses the generic recovery function, setting the clock/data lines as
> GPIO pins, and sending 9 clocks to try a
On 8/27/20 12:17 PM, Kajol Jain wrote:
> Commit 2ed6edd33a21 ("perf: Add cond_resched() to task_function_call()")
> added assignment of ret value as -EAGAIN in case function
> call to 'smp_call_function_single' fails.
> For non-zero ret value, it did
> 'ret = !ret ? data.ret : -EAGAIN;', which a
Em Thu, 8 Oct 2020 12:31:27 +0100
Matthew Wilcox escreveu:
> On Thu, Oct 08, 2020 at 08:03:06AM +0200, Mauro Carvalho Chehab wrote:
> > Em Thu, 8 Oct 2020 03:47:06 +0100
> > Matthew Wilcox escreveu:
> >
> > > On Thu, Oct 08, 2020 at 02:15:24AM +, Nícolas F. R. A. Prado wrote:
> > > > >
On Thu, Oct 8, 2020 at 7:58 AM Coiby Xu wrote:
>
> Initialize devlink health dump framework for the dlge driver so the
> coredump could be done via devlink.
>
> Signed-off-by: Coiby Xu
> @@ -4556,6 +4559,13 @@ static int qlge_probe(struct pci_dev *pdev,
> struct ql_adapter *qdev = NULL;
On Thu 08-10-20 13:41:57, Vlastimil Babka wrote:
> We initialize boot-time pagesets with setup_pageset(), which sets high and
> batch values that effectively disable pcplists.
>
> We can remove this wrapper if we just set these values for all pagesets in
> pageset_init(). Non-boot pagesets then su
On Wed, Oct 07, 2020 at 03:01:52PM -0300, Marcelo Tosatti wrote:
> When adding a tick dependency to a task, its necessary to
> wakeup the CPU where the task resides to reevaluate tick
> dependencies on that CPU.
>
> However the current code wakes up all nohz_full CPUs, which
> is unnecessary.
>
On (20/10/08 10:50), Petr Mladek wrote:
> On Wed 2020-10-07 21:30:44, Sergey Senozhatsky wrote:
> > On (20/10/07 09:28), Petr Mladek wrote:
> > >
> > > /*
> > >* Dirty hack to prevent using any console with tty
> > >* binding as a fallback and adding the empty
> >
For older versions of gcc, the array = {0}; will cause warnings:
net/smc/smc_llc.c: In function 'smc_llc_add_link_local':
net/smc/smc_llc.c:1212:9: warning: missing braces around initializer
[-Wmissing-braces]
struct smc_llc_msg_add_link add_llc = {0};
^
net/smc/smc_llc.c:1212:9: warni
On Thu, Oct 08, 2020 at 10:46:05AM +, Caleb Connolly wrote:
> On 2020-10-08 11:03, Wolfram Sang wrote:
> > On Wed, Oct 07, 2020 at 05:49:35PM +, Caleb Connolly wrote:
> >> The OnePlus 6/T has the same issues as the c630 causing a crash when DMA
> >> is used for i2c, so disable it.
> >>
> >>
For older versions of gcc, the array = {0}; will cause warnings:
net/smc/smc_llc.c: In function 'smc_llc_send_link_delete_all':
net/smc/smc_llc.c:1317:9: warning: missing braces around initializer
[-Wmissing-braces]
struct smc_llc_msg_del_link delllc = {0};
^
net/smc/smc_llc.c:1317:9:
syzbot has found a reproducer for the following issue on:
HEAD commit:c85fb28b Merge tag 'arm64-fixes' of git://git.kernel.org/p..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=16b1804f90
kernel config: https://syzkaller.appspot.com/x/.config?x=de7f697
Register to energy model framework with CPU power efficiency table.
This patch depends on Mediatek cpufreq HW driver patch submitted by Hector Yuan.
https://lkml.org/lkml/2020/9/10/13
Hector.Yuan (1):
cpufreq: mediatek-hw: Register EM power table
drivers/cpufreq/mediatek-cpufreq-hw.c | 50
From: "Hector.Yuan"
Register CPU power table to energy model framework
Signed-off-by: Hector.Yuan
---
drivers/cpufreq/mediatek-cpufreq-hw.c | 50 +
1 file changed, 38 insertions(+), 12 deletions(-)
diff --git a/drivers/cpufreq/mediatek-cpufreq-hw.c
b/drivers
On Mon, Sep 28, 2020 at 11:04:34AM -0700, Ira Weiny wrote:
> On Mon, Sep 28, 2020 at 12:33:37AM +0800, Hui Su wrote:
> > As the comments said, if @addr is NULL, no operation
> > is performed, check the addr first in vfree() and
> > vfree_atomic() maybe a better choice.
>
> I don't see how this cha
Gotcha.
>From now on I'm gonna respond with this new email: ultracool...@disroot.org .
Oct 7, 2020, 14:56 by dmur...@ti.com:
> Gabriel
>
> On 10/7/20 7:21 AM, ultracool...@tutanota.com wrote:
>
>> The reason I didn't use git send-mail earlier is because Tutanota doesn't
>> supports SMTP and Pro
Am 08.10.20 um 13:39 schrieb Matthew Wilcox:
On Thu, Oct 08, 2020 at 01:23:39PM +0200, Christian König wrote:
drivers/dma-buf/dma-buf.c | 16 +---
drivers/gpu/drm/etnaviv/etnaviv_gem.c | 4 +---
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 3 +--
drivers/
On Wed, Oct 07 2020 at 13:20, David Woodhouse wrote:
> From: David Woodhouse
>
> This allows the host to indicate that IOAPIC and MSI emulation supports
> 15-bit destination IDs, allowing up to 32768 CPUs without interrupt
> remapping.
>
> cf. https://patchwork.kernel.org/patch/11816693/ for qemu
On (20/10/08 11:01), Petr Mladek wrote:
>
> + it is yet another way to affect the amount of messages
> on console. We already have console_loglevel, ignore_loglevel.
True. Yes, there are "alternative" ways of doing this, but what we
have to face here is - console= has been used for a long t
On Thu, Oct 08 2020 at 13:54, Thomas Gleixner wrote:
> On Wed, Oct 07 2020 at 13:20, David Woodhouse wrote:
>> diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c
>> index 2825e003259c..85206f971284 100644
>> --- a/arch/x86/kernel/apic/msi.c
>> +++ b/arch/x86/kernel/apic/msi.c
>> @
$ devlink health dump show DEVICE reporter coredump -p -j
{
"Core Registers": {
"segment": 1,
"values": [
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
Initialize devlink health dump framework for the dlge driver so the
coredump could be done via devlink.
Signed-off-by: Coiby Xu
---
drivers/staging/qlge/Kconfig| 1 +
drivers/staging/qlge/Makefile | 2 +-
drivers/staging/qlge/qlge.h | 9 +++
drivers/staging/qlge/qlge
devlink health could be used to get coredump. No need to send so much
data to the kernel ring buffer.
Signed-off-by: Coiby Xu
---
drivers/staging/qlge/qlge.h | 3 ---
drivers/staging/qlge/qlge_dbg.c | 11 ---
drivers/staging/qlge/qlge_ethtool.c | 1 -
drivers/staging/qlge/q
Instructions and examples on kernel data structures dumping and coredump.
Signed-off-by: Coiby Xu
---
.../networking/device_drivers/index.rst | 1 +
.../device_drivers/qlogic/index.rst | 18 +++
.../networking/device_drivers/qlogic/qlge.rst | 118 ++
MAINTAINER
With force_coredump module paramter set, devlink health dump will reset
the MPI RISC first which takes 5 secs to be finished.
Signed-off-by: Coiby Xu
---
drivers/staging/qlge/qlge_devlink.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/staging/qlge/qlge_devlink.c
b/drivers/
The debugging code in the following ifdef land
- QL_ALL_DUMP
- QL_REG_DUMP
- QL_DEV_DUMP
- QL_CB_DUMP
- QL_IB_DUMP
- QL_OB_DUMP
becomes unnecessary because,
- Device status and general registers can be obtained by ethtool.
- Coredump can be done via devlink health reporter.
- Structure re
On Wed, Oct 07 2020 at 13:20, David Woodhouse wrote:
>
> + /*
> + * If the hypervisor supports extended destination ID in IOAPIC
> + * and MSI, that increases the maximum APIC ID that can be used
> + * for non-remapped IRQ domains.
> + */
> + if (x86_init.hyper.msi_ext
The sysfw ring configuration message has been extended to include virtid
and asel value for the ring.
Add the ASEL_VALID to TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER as it is required
for DMA rings.
Instead of extending the current .config() ops - which would need same
patch change in the ringacc driver -
The ring_get_cfg (0x message) is not used and it is not supported by
sysfw for a long time.
Signed-off-by: Peter Ujfalusi
Reviewed-by: Grygorii Strashko
---
drivers/firmware/ti_sci.c | 80 --
drivers/firmware/ti_sci.h | 44 --
in
Sysfw added support for a second range in the resource range API to be able
to describe complex allocations mainly for DMA channels.
Update the ti_sci part to consider the second range as well.
Signed-off-by: Peter Ujfalusi
---
drivers/firmware/ti_sci.c | 48 +--
Allocate MSI entries for both first and second range if they are valid
Signed-off-by: Peter Ujfalusi
---
drivers/soc/ti/ti_sci_inta_msi.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/soc/ti/ti_sci_inta_msi.c b/drivers/soc/ti/ti_sci_inta_msi.c
index 0eb9462f609e..a1d9
The ringacc driver has been converted to use the new set_cfg function to
configure the ring, the old config ops can be removed.
Signed-off-by: Peter Ujfalusi
Reviewed-by: Grygorii Strashko
---
drivers/firmware/ti_sci.c | 72 --
include/linux/soc/ti/ti_sci_pr
Sysfw added 'extended_ch_type' to the tx_ch_cfg_req message which should be
used when BCDMA block copy channels are configured:
extended_ch_type = 0 : the channel is split tx channel (tchan)
extended_ch_type = 1 : the channel is block copy channel (bchan)
Signed-off-by: Peter Ujfalusi
---
driver
The system controller's resource manager have support for configuring the
TDTYPE of TCHAN_CFG register on j721e.
With this parameter the teardown completion can be controlled:
TDTYPE == 0: Return without waiting for peer to complete the teardown
TDTYPE == 1: Wait for peer to complete the teardown
In RING mode the ringacc does not access the ring memory. In this access
mode the ringacc coherency does not have meaning.
If the ring is configured in RING mode, then the ringacc itself will not
access to the ring memory. Only the requester (user) of the ring is going
to read/write to the memory.
Switch to the new set_cfg to configure the ring.
Signed-off-by: Peter Ujfalusi
Reviewed-by: Grygorii Strashko
---
drivers/soc/ti/k3-ringacc.c | 79 +++--
1 file changed, 32 insertions(+), 47 deletions(-)
diff --git a/drivers/soc/ti/k3-ringacc.c b/drivers/soc/ti/
It's JTAG PARTNO is 0xBB38.
Signed-off-by: Peter Ujfalusi
---
drivers/soc/ti/k3-socinfo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/ti/k3-socinfo.c b/drivers/soc/ti/k3-socinfo.c
index bbbc2d2b7091..fd91129de6e5 100644
--- a/drivers/soc/ti/k3-socinfo.c
+++ b/drivers/soc/ti/k
On 08/10/2020 12:27, kajoljain wrote:
Hi John,
I am looking into these patches, it seems they are not re-based on top of
latest Arnaldo's perf/core branch. Can you rebase these changes. I think we are
missing
multiple updates.
Thanks,
Kajol Jain
Hi Kajol Jain,
My thought was that since
Hi,
Changes since v1:
- Use AM64X as family name in patch 11
- Added Reviewed-by tag from Grygorii for patch 6-10
The series prepares the ti_sci, ringacc, inta to support the new DMAs introduced
with AM64.
Separate series has been sent for the inta irqchip driver (v2):
https://lore.kernel.org/lk
On Sat, Oct 03, 2020 at 04:02:57AM +, John Stultz wrote:
> This adds a heap that allocates non-contiguous buffers that are
> marked as writecombined, so they are not cached by the CPU.
>
> This is useful, as most graphics buffers are usually not touched
> by the CPU or only written into once b
Use the ti_sci_resource_desc directly and update it's start and num members
directly instead of requiring individual parameters for them.
This will allow easy extension of the RM parameters without changing API.
Signed-off-by: Peter Ujfalusi
---
drivers/firmware/ti_sci.c | 32 +
Dear Joe, dear Dwaipayan,
while maintaining MAINTAINERS, I noticed that the REPEATED_WORD check,
which in general is a great addition to checkpatch.pl, generates a massive
number of warnings due to one specific pattern in the MAINTAINERS file:
$ ./scripts/checkpatch.pl --show-types -f MAINTAINER
On Wed, Oct 07 2020 at 13:20, David Woodhouse wrote:
> From: David Woodhouse
>
> static struct apic apic_x2apic_phys;
> +static u32 x2apic_max_apicid;
__ro_after_init?
Thanks,
tglx
Linus Walleij writes:
> Hi Lars,
>
> a new version of the patch set arrives while I'm reviewing, haha :D
Well, luckily not too much changed per Rob's input.
>
> On Wed, Oct 7, 2020 at 1:12 PM Lars Povlsen
> wrote:
>
>> This adds DT bindings for the Microsemi/Microchip SGPIO controller,
>> bi
Hi Maximilian,
On 10/5/20 6:03 PM, Maximilian Luz wrote:
As has come up in the discussion around
[RFC PATCH] Add support for Microsoft Surface System Aggregator Module
it may make sense to add a Microsoft Surface specific platform
subdirectory. Andy has suggested drivers/platform/surface fo
The updates to pcplists' high and batch valued are handled by multiple
functions that make the calculations hard to follow. Consolidate everything
to pageset_set_high_and_batch() and remove pageset_set_batch() and
pageset_set_high() wrappers.
The only special case using one of the removed wrappers
We currently call pageset_set_high_and_batch() for each possible cpu, which
repeats the same calculations of high and batch values.
Instead call the function just once per zone, and make it apply the calculated
values to all per-cpu pagesets of the zone.
This also allows removing the zone_pageset
Changes since v1 [7]:
- add acks/reviews (thanks David and Michal)
- drop "mm, page_alloc: make per_cpu_pageset accessible only after init" as
that's orthogonal and needs more consideration
- squash "mm, page_alloc: drain all pcplists during memory offline" into the
last patch, and move new zo
Currently, pcplists are drained during set_migratetype_isolate() which means
once per pageblock processed start_isolate_page_range(). This is somewhat
wasteful. Moreover, the callers might need different guarantees, and the
draining is currently prone to races and does not guarantee that no page
fr
We initialize boot-time pagesets with setup_pageset(), which sets high and
batch values that effectively disable pcplists.
We can remove this wrapper if we just set these values for all pagesets in
pageset_init(). Non-boot pagesets then subsequently update them to the proper
values.
No functional
On Wed, Oct 07 2020 at 13:20, David Woodhouse wrote:
> From: David Woodhouse
>
> The IOAPIC Redirection Table Entries contain an 8-bit Extended
> Destination ID field which maps to bits 11-4 of the MSI address.
>
> The lowest bit is used to indicate remappable format, when interrupt
> remapping is
All per-cpu pagesets for a zone use the same high and batch values, that are
duplicated there just for performance (locality) reasons. This patch adds the
same variables also to struct zone as a shared copy.
This will be useful later for making possible to disable pcplists temporarily
by setting h
Memory offline relies on page isolation can race with process freeing pages to
pcplists in a way that a page from isolated pageblock can end up on pcplist.
This can be worked around by repeated draining of pcplists, as done by commit
968318261221 ("mm/memory_hotplug: drain per-cpu pages again durin
pageset_update() attempts to update pcplist's high and batch values in a way
that readers don't observe batch > high. It uses smp_wmb() to order the updates
in a way to achieve this. However, without proper pairing read barriers in
readers this guarantee doesn't hold, and there are no such barriers
On Thu, Oct 08, 2020 at 01:23:39PM +0200, Christian König wrote:
> drivers/dma-buf/dma-buf.c | 16 +---
> drivers/gpu/drm/etnaviv/etnaviv_gem.c | 4 +---
> drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 3 +--
> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 4 ++--
Hi John,
On Sat, Oct 03, 2020 at 04:02:50AM +, John Stultz wrote:
> Hey All,
...
>
> I did add to this series a reworked version of my uncached
> system heap implementation I was submitting a few weeks back.
> Since it duplicated a lot of the now reworked system heap code,
> I realized it w
On Wed, Sep 30, 2020 at 09:12:05AM +0800, Jisheng Zhang wrote:
> Fix two MSI issues. One to skip PCIE_MSI_INTR0* programming if MSI is
> disabled, another to use an address in the driver data for MSI address,
> to fix the MSI page leakage during suspend/resume.
>
> Since v4:
> - fix pci-dra7xx.c
On 14:06-20201008, Tero Kristo wrote:
> On 08/10/2020 12:40, Faiz Abbas wrote:
[...]
> > Thats right. The EPROBE_DEFERs will happen if my patches enabling UHS modes
> > here are merged. I need to repost them for v5.11-rc1:
> > https://lore.kernel.org/linux-arm-kernel/20201001
On Thu, Oct 08, 2020 at 08:03:06AM +0200, Mauro Carvalho Chehab wrote:
> Em Thu, 8 Oct 2020 03:47:06 +0100
> Matthew Wilcox escreveu:
>
> > On Thu, Oct 08, 2020 at 02:15:24AM +, Nícolas F. R. A. Prado wrote:
> > > > I have a feature request ... could you automarkup NULL as being
> > > > :c:ma
Esteem Complement,Tuesday October 6th 2020
Hello, my name is Steve Odonkon, Audit Accounting Officer of Standard Chartered
Bank, Basinghall Ave, London, United Kingdom. I got your information when I was
searching for an oversea partner among other names, I ask for your pardon if my
approach
On Wed, Sep 16, 2020 at 06:57:05PM +0200, Maxime Ripard wrote:
> On Mon, Sep 14, 2020 at 07:14:11PM +0900, Hoegeun Kwon wrote:
> > Hi Maxime,
> >
> > On 9/8/20 9:00 PM, Maxime Ripard wrote:
> > > Hi Hoegeun,
> > >
> > > On Mon, Sep 07, 2020 at 08:49:12PM +0900, Hoegeun Kwon wrote:
> > >> On 9/3/20
On Thu, Oct 08, 2020 at 12:43:17PM +0530, Sanjay R Mehta wrote:
> On 10/7/2020 1:08 AM, Lukas Wunner wrote:
> > On Tue, Oct 06, 2020 at 01:24:28PM -0500, Sanjay R Mehta wrote:
> >> if DL_ACTIVE bit is set it means that there is no need to check
> >> PCI_EXP_LNKSTA_LT bit, as DL_ACTIVE would have se
On 10/8/20 3:45 PM, John Garry wrote:
> Currently event aliasing and metrics for only CPU and uncore PMUs is
> supported. In fact, only uncore PMUs aliasing is supported for when the
> uncore PMUs are fixed for a CPU, which may not always be the case for
> certain architectures.
>
> This series
On Wed, Sep 30, 2020 at 02:36:03PM +0900, Kunihiko Hayashi wrote:
> This moves iATU register mapping in the Keystone driver to common
> framework. And this adds "iatu" property description to the dt-bindings
> for UniPhier PCIe host and endpoint controller.
>
> This series is split from the previo
This is deprecated.
Signed-off-by: Christian König
---
drivers/gpu/drm/radeon/radeon_ttm.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c
b/drivers/gpu/drm/radeon/radeon_ttm.c
index 63e38b05a5bc..4b92cdbcd29b 100644
--- a/drivers
This is deprecated.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 399961035ae6..ac463e706b19 100644
---
Add the new vma_set_file() function to allow changing
vma->vm_file with the necessary refcount dance.
v2: add more users of this.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-buf.c | 16 +---
drivers/gpu/drm/etnaviv/etnaviv_gem.c | 4 +---
drivers/gp
We have reoccurring requests on this so better document that
this approach doesn't work and dma_buf_mmap() needs to be used instead.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_prime.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_prime.
On Wed, Oct 07 2020 at 13:45, Marc Zyngier wrote:
> +/**
> + * irq_domain_trim_hierarchy - Trim the uninitialized part of a irq hierarchy
> + * @virq:IRQ number to trim where the hierarchy is to be trimmed
> + *
> + * Drop the partial irq_data hierarchy from the level where the
> + * irq_data->
Hi,
On 10/8/20 9:29 AM, Lee Jones wrote:
On Wed, 07 Oct 2020, Hans de Goede wrote:
Hi,
On 10/7/20 8:54 AM, Lee Jones wrote:
On Tue, 06 Oct 2020, David E. Box wrote:
On Tue, 2020-10-06 at 19:51 -0500, Bjorn Helgaas wrote:
On Tue, Oct 06, 2020 at 03:45:54PM -0700, David E. Box wrote:
Hi Bj
On Thu, Oct 8, 2020 at 1:36 PM Zulkifli, Muhammad Husaini
wrote:
> >From: Michal Simek
> >Sent: Thursday, October 8, 2020 3:35 PM
> >On 08. 10. 20 4:09, muhammad.husaini.zulki...@intel.com wrote:
> >> From: Muhammad Husaini Zulkifli
...
> >> @@ -1521,6 +1521,7 @@ static int sdhci_arasan_probe(
Warning coming during boot because the boot freq set by bootloader
gets filtered out due to big freq steps while creating freq_table.
Fixing this by setting closest ndiv value from freq_table.
Warning:
cpufreq: cpufreq_online: CPU0: Running at unlisted freq
cpufreq: cpufreq_online: CPU0:
On 08/10/2020 12:40, Faiz Abbas wrote:
Tero,
On 08/10/20 2:49 pm, Tero Kristo wrote:
On 08/10/2020 11:59, Faiz Abbas wrote:
Tero,
On 06/10/20 6:40 pm, Tero Kristo wrote:
On 06/10/2020 16:03, Faiz Abbas wrote:
Hi Tero,
On 06/10/20 5:21 pm, Tero Kristo wrote:
On 02/10/2020 19:45, Faiz Abbas
On Thu, Oct 08, 2020 at 09:34:26PM +1100, Michael Ellerman wrote:
> Jann Horn writes:
> > So while the mprotect() case
> > checks the flags and refuses unknown values, the mmap() code just lets
> > the architecture figure out which bits are actually valid to set (via
> > arch_calc_vm_prot_bits())
From: Qu Wenruo
commit 6b7faadd985c990324b5b5bd18cc4ba5c395eb65 upstream.
[BUG]
When deleting large files (which cross block group boundary) with
discard mount option, we find some btrfs_discard_extent() calls only
trimmed part of its space, not the whole range:
btrfs_discard_extent: type=0x1
On 07-10-20, 13:58, Nicola Mazzucato wrote:
> Hi Viresh,
>
> performance controls is what is exposed by the firmware through a protocol
> that
> is not capable of describing hardware (say SCMI). For example, the firmware
> can
> tell that the platform has N controls, but it can't say to which ha
Jérôme Pouiller writes:
> On Thursday 8 October 2020 09:30:06 CEST Kalle Valo wrote:
> [...]
>> Yes, the driver needs to be reviewed in linux-wireless list. I recommend
>> submitting the whole driver in a patchset with one file per patch, which
>> seems to be the easiest way to review a full driv
This series backports fixes for the xfstests test cases btrfs/199
btrfs/200 btrfs/203 and btrfs/204.
patch 1 is fix for btrfs/200
patch 2 fixes regression in patch 1 and is fix for btrfs/203
patch 3 helps to fix conflicts in patch 4
patch 4 is fix for btrfs/199
patch 5 helps to avoid conflicts in
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