hierry Reding
Acked-by: Adrian Hunter
> ---
> Changes since v1:
> - Added Reviewed-by from Thierry Reding
> - Fix typo in commit log s/know/now/ noticed by Thierry Reding
>
> Note: this patch has only been compiled tested, as I don't have the
> hardware to test it.
&g
;
> Signed-off-by: Thomas Petazzoni
> ---
> Changes since v1:
>
> - As suggested by Adrian Hunter, call the ->get_ro() if it exists
>before falling back to using mmc_gpio_get_ro(). Indeed, if the
>controller-specific code has implemented a ->get_ro() callback, it
&g
On 12/02/19 4:04 AM, Chaotian Jing wrote:
> On Tue, 2019-02-05 at 15:42 +0200, Adrian Hunter wrote:
>> On 5/02/19 3:06 PM, Ulf Hansson wrote:
>>> On Mon, 4 Feb 2019 at 14:42, Adrian Hunter wrote:
>>>>
>>>> On 4/02/19 12:54 PM, Ulf Hansson wrote:
>&g
be 15?
>>> Because if there is a deviation then IP may also define num_slots by
>>> using some reserved registers.
>>> Also in JESD84-B51.pdf, specific slot no. is used extensively for
>>> defining policies(like in case of DCMD & CQCFG), so in that case
>
On 11/02/19 10:18 AM, Alexei Starovoitov wrote:
> On Mon, Feb 11, 2019 at 09:54:01AM +0200, Adrian Hunter wrote:
>>
>> Which is not really a real use-case.
> ..
>>> perf analysis with PT becomes inaccurate and main goal
>>> of retaining accurate instruction
On 9/02/19 1:29 AM, Alexei Starovoitov wrote:
> On Thu, Feb 07, 2019 at 01:19:01PM +0200, Adrian Hunter wrote:
>> Subject to memory pressure and other limits, retain executable code, such
>> as JIT-compiled bpf, in memory instead of freeing it immediately it is no
>> longer
Commit-ID: 16bd4321c2425d37031a902cdbf183e2cd099946
Gitweb: https://git.kernel.org/tip/16bd4321c2425d37031a902cdbf183e2cd099946
Author: Adrian Hunter
AuthorDate: Wed, 6 Feb 2019 12:39:47 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 11:20:32 -0300
perf auxtrace
Commit-ID: 03997612904866abe7cdcc992784ef65cb3a4b81
Gitweb: https://git.kernel.org/tip/03997612904866abe7cdcc992784ef65cb3a4b81
Author: Adrian Hunter
AuthorDate: Wed, 6 Feb 2019 12:39:45 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:27:27 -0300
perf intel-pt
Commit-ID: 26ee2bcdea33c60aa833cc32a1624ef5d49c9c6f
Gitweb: https://git.kernel.org/tip/26ee2bcdea33c60aa833cc32a1624ef5d49c9c6f
Author: Adrian Hunter
AuthorDate: Wed, 6 Feb 2019 12:39:46 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:27:54 -0300
perf intel-pt
Commit-ID: 5a99d99e3310a565b0cf63f785b347be9ee0da45
Gitweb: https://git.kernel.org/tip/5a99d99e3310a565b0cf63f785b347be9ee0da45
Author: Adrian Hunter
AuthorDate: Wed, 6 Feb 2019 12:39:44 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:27:00 -0300
perf intel-pt
Commit-ID: c3fcadf0bb765faf45d6d562246e1d08885466df
Gitweb: https://git.kernel.org/tip/c3fcadf0bb765faf45d6d562246e1d08885466df
Author: Adrian Hunter
AuthorDate: Wed, 6 Feb 2019 12:39:43 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:25:39 -0300
perf auxtrace
Commit-ID: f08046cb3082b313e7b08dc35838cf8bd902c36b
Gitweb: https://git.kernel.org/tip/f08046cb3082b313e7b08dc35838cf8bd902c36b
Author: Adrian Hunter
AuthorDate: Wed, 9 Jan 2019 11:18:33 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf thread
Commit-ID: 90c2cda7056e3a7555d874a27aae12fd46ca802e
Gitweb: https://git.kernel.org/tip/90c2cda7056e3a7555d874a27aae12fd46ca802e
Author: Adrian Hunter
AuthorDate: Wed, 9 Jan 2019 11:18:32 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf thread
Commit-ID: e7a3a055f2b88ebd0bdae8b0aade1e7d80c8a81e
Gitweb: https://git.kernel.org/tip/e7a3a055f2b88ebd0bdae8b0aade1e7d80c8a81e
Author: Adrian Hunter
AuthorDate: Wed, 9 Jan 2019 11:18:31 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf thread
Commit-ID: d6d457451eb94fa747dc202765592eb8885a7352
Gitweb: https://git.kernel.org/tip/d6d457451eb94fa747dc202765592eb8885a7352
Author: Adrian Hunter
AuthorDate: Wed, 9 Jan 2019 11:18:30 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300
perf tools
On 7/02/19 10:02 PM, Peter Zijlstra wrote:
> On Thu, Feb 07, 2019 at 01:19:01PM +0200, Adrian Hunter wrote:
>> Subject to memory pressure and other limits, retain executable code, such
>> as JIT-compiled bpf, in memory instead of freeing it immediately it is no
>> longer
.
This facility could perhaps be extended also to init sections.
Note that this patch is compile tested only and, at present, is missing
the ability to retain symbols.
Signed-off-by: Adrian Hunter
---
arch/x86/Kconfig.cpu | 1 +
include/linux/filter.h | 4 +
include/linux/xc_retain.h
On 6/02/19 2:39 PM, Arnaldo Carvalho de Melo wrote:
> Em Wed, Jan 09, 2019 at 11:18:33AM +0200, Adrian Hunter escreveu:
>> The compiler might optimize a call/ret combination by making it a jmp.
>> However the thread-stack does not presently cater for that, so that such
>>
-by: Adrian Hunter
Cc: sta...@vger.kernel.org
---
tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index ecd25cdc1d3e..a54d6c9a4601 100644
Auxtrace records might have up to 7 bytes of padding appended. Adjust the
overlap accordingly.
Signed-off-by: Adrian Hunter
Cc: sta...@vger.kernel.org
---
.../util/intel-pt-decoder/intel-pt-decoder.c | 36 +--
1 file changed, 34 insertions(+), 2 deletions(-)
diff --git a/tools
Define auxtrace record alignment so that it can be referenced elsewhere.
Note this is preparation for patch "perf intel-pt: Fix overlap calculation
for padding"
Signed-off-by: Adrian Hunter
Cc: sta...@vger.kernel.org
---
tools/perf/util/auxtrace.c | 4 ++--
tools/perf/util/auxt
The timestamp can use useful to find part of a trace that has an error
without outputting all of the trace e.g. using the itrace 's' option to
skip initial number of events.
Signed-off-by: Adrian Hunter
---
tools/perf/util/auxtrace.c| 22 --
tools/perf/util/
Data is copied when the trace is stopped, so packets are never split
between buffers except when processing if the buffer cannot fit in the
address space which can only happen on 32-bit systems. Change the logic to
reflect that.
Signed-off-by: Adrian Hunter
---
tools/perf/util/intel-pt-decoder
Hi
Here are some fixes and a minor improvement for Intel PT. The first 3
patches are cc stable, but the last 2 are not.
Adrian Hunter (5):
perf auxtrace: Define auxtrace record alignment
perf intel-pt: Fix overlap calculation for padding
perf intel-pt: Fix CYC timestamp
On 10/01/19 11:55 AM, Jiri Olsa wrote:
> On Wed, Jan 09, 2019 at 11:18:29AM +0200, Adrian Hunter wrote:
>> Hi
>>
>> Here are some patches to improve the exported call graph, primarily to deal
>> with x86 retpolines.
>>
>>
>> Adrian Hunter (6):
>>
On 5/02/19 3:06 PM, Ulf Hansson wrote:
> On Mon, 4 Feb 2019 at 14:42, Adrian Hunter wrote:
>>
>> On 4/02/19 12:54 PM, Ulf Hansson wrote:
>>> On Mon, 4 Feb 2019 at 10:58, Adrian Hunter wrote:
>>>>
>>>> On 1/02/19 10:10 AM, Ulf Hansson wrote:
On 4/02/19 12:54 PM, Ulf Hansson wrote:
> On Mon, 4 Feb 2019 at 10:58, Adrian Hunter wrote:
>>
>> On 1/02/19 10:10 AM, Ulf Hansson wrote:
>>> On Fri, 1 Feb 2019 at 02:38, Chaotian Jing
>>> wrote:
>>>>
>>>> On Thu, 2019-01-31 at 16:58 +01
On 1/02/19 10:10 AM, Ulf Hansson wrote:
> On Fri, 1 Feb 2019 at 02:38, Chaotian Jing wrote:
>>
>> On Thu, 2019-01-31 at 16:58 +0100, Ulf Hansson wrote:
>>> On Thu, 31 Jan 2019 at 08:53, Chaotian Jing
>>> wrote:
mmc_hs400_to_hs200() begins with the card and host in HS400 mode.
Ther
On 31/01/19 9:24 PM, Thomas Garnier wrote:
> Provide an option to default visibility to hidden except for key
> symbols. This option is disabled by default and will be used by x86_64
> PIE support to remove errors between compilation units.
>
> The default visibility is also enabled for external s
On 31/01/19 12:10 PM, Adrian Hunter wrote:
> On 16/01/19 2:24 AM, Alamy Liu wrote:
>> In the error case:
>>either cq_host->desc_base
>>or cq_host->trans_desc_base
>> might have been granted memory successfully.
>>
>> The value of
On 16/01/19 2:24 AM, Alamy Liu wrote:
> In the error case:
>either cq_host->desc_base
>or cq_host->trans_desc_base
> might have been granted memory successfully.
>
> The value of mmc_host->cqe_enabled stays 'false'.
> Thus, cqhci_disable (mmc_cqe_ops->cqe_disable) won't be called to
>
On 15/01/19 9:13 PM, Alamy Liu wrote:
> CQE_DCMD is not necessary to be enabled when CQE is enabled.
> (Software could halt CQE to send command, or via DCMD)
>
> In the case that CQE_DCMD is not enabled, it still needs to allocate
> space for data transfer. For instance:
> CQE_DCMD is enabled:
On 14/01/19 9:17 PM, Alamy Liu wrote:
> Prevent to use fixed value (DCMD_SLOT) after it had been determined
> and saved in a variable (cq_host->dcmd).
dcmd_slot is always 31 (i.e. DCMD_SLOT) so why not go the other way and get
rid of dcmd_slot and just use DCMD_SLOT?
>
> Signed-off-by: Alamy Liu
On 14/01/19 9:17 PM, Alamy Liu wrote:
> Prevent to use fixed value (NUM_SLOTS) after it had been determined
> and saved in a variable (cq_host->num_slots).
num_slots is always 32 (i.e. NUM_SLOTS) so why not go the other way and get
rid of num_slots and just use NUM_SLOTS?
>
> Signed-off-by: Alam
On 11/01/19 1:08 PM, Faiz Abbas wrote:
> Some controllers might prematurely issue a data timeout during an erase
> command. Add a quirk to disable the interrupt when an erase command is
> issued.
I might have already asked this, but would it be possible to use the
existing SDHCI_QUIRK2_DISABLE_HW_
On 11/01/19 1:08 PM, Faiz Abbas wrote:
> From: Chunyan Zhang
>
> Some standard SD host controllers can support both external dma
> controllers as well as ADMA/SDMA in which the SD host controller
> acts as DMA master. TI's omap controller is the case as an example.
>
> Currently the generic SDHC
fer descriptors.
>
> Host Capabilities register indiactes the supports of ADMA3 DMA.
indiactes -> indicates
>
> Signed-off-by: Sowjanya Komatineni
Acked-by: Adrian Hunter
> ---
> [V10]: Changes are same as V9 except this series has SDHCI core changes
> into sepera
On 21/01/19 12:44 PM, Thierry Reding wrote:
> On Tue, Jan 15, 2019 at 11:03:52AM -0800, Sowjanya Komatineni wrote:
>> This patch adds HW Command Queue for supported Tegra SDMMC
>> controllers.
>>
>> Signed-off-by: Sowjanya Komatineni
>> ---
>> drivers/mmc/host/Kconfig | 1 +
>> drivers/mm
On 15/01/19 6:28 PM, Thomas Petazzoni wrote:
> Even though SDHCI controllers may have a dedicated WP pin that can be
> queried using the SDHCI_PRESENT_STATE register, some platforms may
> chose to use a separate regular GPIO to route the WP signal. Such a
> GPIO is typically represented using the w
nalysis of the pad design.
>
> Signed-off-by: Sowjanya Komatineni
Acked-by: Adrian Hunter
> ---
> drivers/mmc/host/sdhci-tegra.c | 160
> ++---
> 1 file changed, 119 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhc
>
> Fixes by Faiz Abbas :
> 1. Map scatterlists before dmaengine_prep_slave_sg()
> 2. Use dma_async() functions inside of the send_command() path and
> synchronize once at the start of each request.
>
> Signed-off-by: Chunyan Zhang
> Signed-off-by: Faiz Abbas
Acked-by: Adrian Hu
directly. This driver relies on IOSF_MBI and IOSF_MBI depends
> on PCI. For this reason, add a direct dependency to CONFIG_PCI here.
>
> Fixes: 5d32a66541c46 ("PCI/ACPI: Allow ACPI to be built without CONFIG_PCI
> set")
> Signed-off-by: Sinan Kaya
Acked-by: Adrian Hunter
&
rding
> SDR104/HS200 tuning failures (i929)")
> Signed-off-by: Faiz Abbas
Acked-by: Adrian Hunter
> ---
> drivers/mmc/host/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index e
On 4/01/19 12:47 PM, Thierry Reding wrote:
> From: Thierry Reding
>
> The implementation of sdhci_set_dma_mask() is conflating two things: on
> one hand it uses the SDHCI_USE_64_BIT_DMA flag to determine whether or
> not to use the 64-bit addressing capability of the controller and on the
> other
+ Chunyan Zhang the contributor of sdhci-sprd which is the only other v4
mode user at present
On 2/01/19 9:36 PM, Sowjanya Komatineni wrote:
> This patch adds HW Command Queue for supported Tegra SDMMC
> controllers.
>
> As per SD Host 4.20 Spec for Host Control 1 Register, DMA Select
> options s
On 9/01/19 5:38 PM, Jiri Olsa wrote:
> On Wed, Jan 09, 2019 at 11:18:35AM +0200, Adrian Hunter wrote:
>> x86 retpoline functions pollute the call graph by showing up everywhere
>> there is an indirect branch, but they do not really mean anything. Make
>> changes so that
-01-08 13:24:58.794650 Writing records...
2019-01-08 13:24:59.008050 Adding indexes
2019-01-08 13:24:59.015802 Done
$ ~/libexec/perf-core/scripts/python/exported-sql-viewer.py jmp-to-fn.db
Before:
main
-> bar
After:
main
-> foo
-> bar
Signed-off-b
pts/python/exported-sql-viewer.py simple-retpoline.db
Before:
main
-> __x86_indirect_thunk_rax
-> __x86_indirect_thunk_rax
-> foo
-> bar
After:
main
-> foo
-> bar
Signed-off-by
If 'cp' is checked in thread_stack__push_cp() a number of error checks can
be removed, reducing code size and improving readability.
Signed-off-by: Adrian Hunter
---
tools/perf/util/thread-stack.c | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/tools
ned-off-by: Adrian Hunter
---
tools/perf/util/symbol.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c
index 01f2c7385e38..baf6498d1835 100644
--- a/tools/perf/util/symbol.c
+++ b/tools/perf/util/symbol.c
@@ -709,6 +709,8 @@
Hi
Here are some patches to improve the exported call graph, primarily to deal
with x86 retpolines.
Adrian Hunter (6):
perf tools: Fix split_kallsyms_for_kcore for trampoline symbols
perf thread-stack: Tidy thread_stack__push_cp() usage
perf thread-stack: Tidy
Make thread_stack__no_call_return() more readable by adding more local
variables.
Signed-off-by: Adrian Hunter
---
tools/perf/util/thread-stack.c | 35 +-
1 file changed, 17 insertions(+), 18 deletions(-)
diff --git a/tools/perf/util/thread-stack.c b/tools/perf
-> bar
After:
main
-> __x86_indirect_thunk_rax
-> __x86_indirect_thunk_rax
-> foo
-> bar
Signed-off-by: Adrian Hunter
---
tools/perf/util/thread-stack.c | 49 +++---
1 file changed, 46 insertions(+), 3 deletions(-)
On 8/01/19 11:25 AM, Peter Zijlstra wrote:
> On Tue, Jan 08, 2019 at 09:47:18AM +0200, Adrian Hunter wrote:
>> On 7/01/19 6:32 PM, Peter Zijlstra wrote:
>>> On Thu, Jan 03, 2019 at 02:18:15PM -0800, Andi Kleen wrote:
>>>> Nadav Amit writes:
>>>>>
>
On 7/01/19 6:32 PM, Peter Zijlstra wrote:
> On Thu, Jan 03, 2019 at 02:18:15PM -0800, Andi Kleen wrote:
>> Nadav Amit writes:
>>>
>>> - Do we use periodic learning or not? Josh suggested to reconfigure the
>>> branches whenever a new target is found. However, I do not know at
>>> this time how
On 7/01/19 1:17 PM, Rafael J. Wysocki wrote:
> On Sat, Jan 5, 2019 at 11:06 AM Sinan Kaya wrote:
>>
>> After 'commit 5d32a66541c4 ("PCI/ACPI: Allow ACPI to be built without
>> CONFIG_PCI set")' dependencies on CONFIG_PCI that previously were
>> satisfied implicitly through dependencies on CONFIG_A
On 2/01/19 8:10 PM, Sinan Kaya wrote:
> After 'commit 5d32a66541c4 ("PCI/ACPI: Allow ACPI to be built without
> CONFIG_PCI set")' dependencies on CONFIG_PCI that previously were
> satisfied implicitly through dependencies on CONFIG_ACPI have to be
> specified directly. This driver relies on IOSF_MB
Commit-ID: b25756df5b28cd7b6e91200fc5012e7c76e8ec69
Gitweb: https://git.kernel.org/tip/b25756df5b28cd7b6e91200fc5012e7c76e8ec69
Author: Adrian Hunter
AuthorDate: Fri, 21 Dec 2018 14:06:20 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 2 Jan 2019 11:05:06 -0300
perf session
Commit-ID: 256d92bc93fd40411a02be5cdba74a7bf91e6e09
Gitweb: https://git.kernel.org/tip/256d92bc93fd40411a02be5cdba74a7bf91e6e09
Author: Adrian Hunter
AuthorDate: Fri, 21 Dec 2018 14:06:19 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 2 Jan 2019 11:03:17 -0300
perf thread
Commit-ID: 139f42f3b3b495e61bb2cfef40e1dd5e845e3052
Gitweb: https://git.kernel.org/tip/139f42f3b3b495e61bb2cfef40e1dd5e845e3052
Author: Adrian Hunter
AuthorDate: Fri, 21 Dec 2018 14:06:18 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 2 Jan 2019 10:55:55 -0300
perf thread
Commit-ID: 2e9e8688763ff80f032d9a78c3b4b951fb6dd7a4
Gitweb: https://git.kernel.org/tip/2e9e8688763ff80f032d9a78c3b4b951fb6dd7a4
Author: Adrian Hunter
AuthorDate: Fri, 21 Dec 2018 14:06:17 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 2 Jan 2019 10:53:41 -0300
perf thread
Commit-ID: f6060ac60190c625101a0b94c2d96e9ca14a7d73
Gitweb: https://git.kernel.org/tip/f6060ac60190c625101a0b94c2d96e9ca14a7d73
Author: Adrian Hunter
AuthorDate: Fri, 21 Dec 2018 14:06:16 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 2 Jan 2019 10:49:51 -0300
perf thread
Commit-ID: bd8e68ace110941f375f5d566b0cd99fe80634b8
Gitweb: https://git.kernel.org/tip/bd8e68ace110941f375f5d566b0cd99fe80634b8
Author: Adrian Hunter
AuthorDate: Fri, 21 Dec 2018 14:06:15 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 2 Jan 2019 10:48:18 -0300
perf thread
Commit-ID: e0b8951190c11797971864c845e0909561525621
Gitweb: https://git.kernel.org/tip/e0b8951190c11797971864c845e0909561525621
Author: Adrian Hunter
AuthorDate: Fri, 21 Dec 2018 14:06:14 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 2 Jan 2019 10:45:26 -0300
perf thread
Commit-ID: 03b32cb2810814756095dbd91fce0c77617d096b
Gitweb: https://git.kernel.org/tip/03b32cb2810814756095dbd91fce0c77617d096b
Author: Adrian Hunter
AuthorDate: Fri, 21 Dec 2018 14:06:13 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Wed, 2 Jan 2019 10:42:45 -0300
perf thread
On 31/12/18 11:40 AM, Rafael J. Wysocki wrote:
> On Sun, Dec 30, 2018 at 7:57 PM Sinan Kaya wrote:
>>
>> On Wed, Dec 26, 2018 at 12:41 PM Rafael J. Wysocki wrote:
>>>
>>> On Mon, Dec 24, 2018 at 12:26 AM Sinan Kaya wrote:
Select IOSF_MBI only when PCI is set.
Signed-off-by: S
On 27/12/18 11:58 PM, Sowjanya Komatineni wrote:
> This patch adds HW Command Queue for supported Tegra SDMMC
> controllers.
>
> Tegra SDHCI with Quirk SDHCI_QUIRK2_BROKEN_64_BIT_DMA disables the
> use of 64_BIT DMA to disable 64-bit addressing mode access to the
> system memory and sdhci_cqe_enab
On 21/12/18 3:25 AM, Sowjanya Komatineni wrote:
> This patch adds HW Command Queue for supported Tegra SDMMC
> controllers.
>
> Tegra SDHCI with Quirk SDHCI_QUIRK2_BROKEN_64_BIT_DMA disables the
> use of 64_BIT DMA to disable 64-bit addressing mode access to the
> system memory and sdhci_cqe_enabl
On 21/12/18 3:25 AM, Sowjanya Komatineni wrote:
> V4_MODE is Bit-15 of SDHCI_HOST_CONTROL2 register.
> Need to perform word access to this register.
>
> Signed-off-by: Sowjanya Komatineni
This patch has already been applied.
> ---
> drivers/mmc/host/sdhci.c | 4 ++--
> 1 file changed, 2 insert
On 11/12/18 11:12 AM, Chunyan Zhang wrote:
> Some standard SD host controllers can support both external dma
> controllers as well as ADMA/SDMA in which the SD host controller
> acts as DMA master. TI's omap controller is the case as an example.
>
> Currently the generic SDHCI code supports ADMA/S
On 19/12/18 1:26 AM, Andrey Smirnov wrote:
> Variant specific driver data doesn't change at run-time, so mark it as
> const to reflect that.
>
> Signed-off-by: Andrey Smirnov
Acked-by: Adrian Hunter
> ---
> drivers/mmc/host/sdhci-esdhc-imx.c | 16 --
On 18/12/18 1:40 PM, Ernest Zhang(WH) wrote:
> From: "Ernest Zhang"
>
> 1. O2 Host Controller PLL lock status is not in compliance with
> CLOCK_CONTROL register bit 1
> 2. O2 Host Controller card detect function only work when PLL is
> enabled and locked
>
> Signed-off-by: Ernest Zhang
If you
On 18/12/18 1:40 PM, Ernest Zhang(WH) wrote:
> Moving sdhci_o2 into sdhci-pci-o2micro.c
>
> Signed-off-by: Ernest Zhang
It would be more logical to make this the first patch, rather than put the
ops in one file, and then move them to another.
> ---
> Change in V2:
> 1. Moving sdhci_o2 int
In preparation for fixing thread stack processing for the idle task,
simplify some code in thread_stack__process().
Signed-off-by: Adrian Hunter
---
tools/perf/util/thread-stack.c | 18 +++---
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/tools/perf/util/thread
In preparation for fixing thread stack processing for the idle task,
avoid direct reference to the thread's stack. The thread stack will change
to an array of thread stacks, at which point the meaning of the direct
reference will change.
Signed-off-by: Adrian Hunter
---
tools/perf/util/t
Add a comment to perf_session__register_idle_thread() to bring attention to
a pitfall with the idle task thread structure. The pitfall is that there
should really be a 'struct thread' for the idle task of each cpu, but there
is only one that can have pid == tid == 0.
Signed-off-by: Adr
ng
through the cpu number, and in the case of the idle "thread", pick the
thread stack from an array based on the cpu number.
Adrian Hunter (8):
perf thread-stack: Simplify some code in thread_stack__process()
perf thread-stack: Tidy thread_stack__bottom() usage
perf
In preparation for fixing thread stack processing for the idle task,
factor out thread_stack__init().
Signed-off-by: Adrian Hunter
---
tools/perf/util/thread-stack.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/tools/perf/util/thread-stack.c b
In preparation for fixing thread stack processing for the idle task,
allow for a thread stack array.
Signed-off-by: Adrian Hunter
---
tools/perf/util/thread-stack.c | 40 +-
1 file changed, 34 insertions(+), 6 deletions(-)
diff --git a/tools/perf/util/thread
In preparation for fixing thread stack processing for the idle task,
tidy thread_stack__bottom() usage. Specifically, the parameter 'thread' is
not needed.
Signed-off-by: Adrian Hunter
---
tools/perf/util/thread-stack.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
di
In preparation for fixing thread stack processing for the idle task,
allocate an array of thread stacks.
Signed-off-by: Adrian Hunter
---
tools/perf/util/thread-stack.c | 30 ++
1 file changed, 18 insertions(+), 12 deletions(-)
diff --git a/tools/perf/util/thread
On 20/12/18 11:01 PM, Sowjanya Komatineni wrote:
> Hi Adrian,
>
> Thank you for the feedback.
>
>> This doesn't seem to relate to the host controller implementation.
>> "The device" means the eMMC.
>
> Yes, setting block size of 512B before enabling command queue is a device
> specific
> req
Commit-ID: 571766010ea6bf9726b288eb2db1abb59b1841af
Gitweb: https://git.kernel.org/tip/571766010ea6bf9726b288eb2db1abb59b1841af
Author: Adrian Hunter
AuthorDate: Tue, 27 Nov 2018 10:46:34 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Tue, 18 Dec 2018 12:21:44 -0300
perf
Commit-ID: b5c2161cc415babb84d2b49599df8bd03b2b9b69
Gitweb: https://git.kernel.org/tip/b5c2161cc415babb84d2b49599df8bd03b2b9b69
Author: Adrian Hunter
AuthorDate: Tue, 27 Nov 2018 10:46:34 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Tue, 18 Dec 2018 12:21:44 -0300
perf dso
On 20/12/18 1:42 AM, Sowjanya Komatineni wrote:
> eMMC-5.1 JESD84-B51 Spec (Section 6.6.39.1), mentions "Prior to
> enabling command queuing, the block size shall be set to 512 B.
> Device may respond with an error to CMD46/CMD47 if block size
> is not 512 B".
This doesn't seem to relate to the ho
On 14/12/18 8:21 PM, Sowjanya Komatineni wrote:
> eMMC-5.1 JESD85-B51 Spec (Section 6.6.39), mentions DMA selection
There is no JESD85-B51. I presume you mean JESD84-B51, but I can't find any
reference to DMA in 6.6.39. All the host controller relevant material seems
to be in Annex B. Can you c
Commit-ID: 1c6f709b9f96366cc47af23c05ecec9b8c0c392d
Gitweb: https://git.kernel.org/tip/1c6f709b9f96366cc47af23c05ecec9b8c0c392d
Author: Adrian Hunter
AuthorDate: Mon, 26 Nov 2018 14:12:52 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 17 Dec 2018 14:54:51 -0300
perf intel
Commit-ID: 741dad88dde296999da30332157ca47f0543747d
Gitweb: https://git.kernel.org/tip/741dad88dde296999da30332157ca47f0543747d
Author: Adrian Hunter
AuthorDate: Thu, 22 Nov 2018 16:04:56 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 17 Dec 2018 14:54:32 -0300
perf test
Commit-ID: 2aac9f9d5b85da1cc77c51d78aa41012244f7518
Gitweb: https://git.kernel.org/tip/2aac9f9d5b85da1cc77c51d78aa41012244f7518
Author: Adrian Hunter
AuthorDate: Thu, 22 Nov 2018 15:55:45 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 17 Dec 2018 14:54:26 -0300
perf tests
Commit-ID: 0631ca3a6e6edd23a2ca7cab707d1abf291a097d
Gitweb: https://git.kernel.org/tip/0631ca3a6e6edd23a2ca7cab707d1abf291a097d
Author: Adrian Hunter
AuthorDate: Thu, 22 Nov 2018 13:29:37 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 17 Dec 2018 14:54:21 -0300
tools lib
Commit-ID: 692d0e63324d2954a0c63a812a8588e97023a295
Gitweb: https://git.kernel.org/tip/692d0e63324d2954a0c63a812a8588e97023a295
Author: Adrian Hunter
AuthorDate: Tue, 6 Nov 2018 23:07:12 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 17 Dec 2018 14:54:18 -0300
perf script
Commit-ID: 8e80ad9983caeee09c3a0a1a37e05bff93becce4
Gitweb: https://git.kernel.org/tip/8e80ad9983caeee09c3a0a1a37e05bff93becce4
Author: Adrian Hunter
AuthorDate: Tue, 6 Nov 2018 23:07:10 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 17 Dec 2018 14:54:13 -0300
perf thread
Commit-ID: 225f99e0c811e23836c4911a2ff147e167dd1fe8
Gitweb: https://git.kernel.org/tip/225f99e0c811e23836c4911a2ff147e167dd1fe8
Author: Adrian Hunter
AuthorDate: Tue, 6 Nov 2018 23:07:11 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 17 Dec 2018 14:54:16 -0300
perf tools
Commit-ID: ec1891afae740be581ecf5abc8bda74c4549203f
Gitweb: https://git.kernel.org/tip/ec1891afae740be581ecf5abc8bda74c4549203f
Author: Adrian Hunter
AuthorDate: Tue, 6 Nov 2018 23:07:10 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 17 Dec 2018 14:54:07 -0300
perf machine
Commit-ID: 932d0166b1dbc2a631ac718615efc4917412ecf3
Gitweb: https://git.kernel.org/tip/932d0166b1dbc2a631ac718615efc4917412ecf3
Author: Adrian Hunter
AuthorDate: Mon, 26 Nov 2018 14:12:52 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 29 Nov 2018 20:42:49 -0300
perf intel
Commit-ID: 6e33c250a88f8dfc9858819dc6d02a788da9af74
Gitweb: https://git.kernel.org/tip/6e33c250a88f8dfc9858819dc6d02a788da9af74
Author: Adrian Hunter
AuthorDate: Thu, 22 Nov 2018 13:29:37 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 29 Nov 2018 20:42:48 -0300
tools lib
Commit-ID: 3ebeae6efafd92bd21f600a6300a6492c525d39a
Gitweb: https://git.kernel.org/tip/3ebeae6efafd92bd21f600a6300a6492c525d39a
Author: Adrian Hunter
AuthorDate: Thu, 22 Nov 2018 16:04:56 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 29 Nov 2018 20:42:48 -0300
perf test
Commit-ID: 2e9ed1958a8412622b7f45d8a0e2658b4463dcec
Gitweb: https://git.kernel.org/tip/2e9ed1958a8412622b7f45d8a0e2658b4463dcec
Author: Adrian Hunter
AuthorDate: Thu, 22 Nov 2018 15:55:45 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 29 Nov 2018 20:42:48 -0300
perf tests
Commit-ID: 4ea9a7a364b6311b98c4a4e8e3692cdc253015dc
Gitweb: https://git.kernel.org/tip/4ea9a7a364b6311b98c4a4e8e3692cdc253015dc
Author: Adrian Hunter
AuthorDate: Tue, 6 Nov 2018 23:07:12 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 29 Nov 2018 20:42:47 -0300
perf script
Commit-ID: 23abfb26071009e022355c3bcba6502cd7b4dc61
Gitweb: https://git.kernel.org/tip/23abfb26071009e022355c3bcba6502cd7b4dc61
Author: Adrian Hunter
AuthorDate: Tue, 6 Nov 2018 23:07:10 +0200
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 29 Nov 2018 20:42:47 -0300
perf thread
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