[Patch v2 1/1] PCI: pciehp: Add support for handling MRL events

This seems to suggest that the slot should be brought down as soon as MRL is opened. Signed-off-by: Ashok Raj Co-developed-by: Kuppuswamy Sathyanarayanan --- Changes since v1: - Changes suggested by Lucas Wunner https://lore.kernel.org/linux-pci/20201119223749.GA103783@o

[PATCH 1/1] pci: pciehp: Handle MRL interrupts to enable slot for hotplug.

- If there is ATTN button, and an MRL event pending, ignore Presence Detect. Since we want ATTN button to drive the hotplug event. Signed-off-by: Ashok Raj Co-developed-by: Kuppuswamy Sathyanarayanan --- drivers/pci/hotplug/pciehp.h | 1 + drivers/pci/hotplug/pciehp_ctrl.c

[PATCH 1/1] pci: pciehp: Handle MRL interrupts to enable slot for hotplug.

- If there is ATTN button, and an MRL event pending, ignore Presence Detect. Since we want ATTN button to drive the hotplug event. Signed-off-by: Ashok Raj Co-developed-by: Kuppuswamy Sathyanarayanan --- drivers/pci/hotplug/pciehp.h | 1 + drivers/pci/hotplug/pciehp_ctrl.c

[tip: x86/pasid] Documentation/x86: Add documentation for SVA (Shared Virtual Addressing)

The following commit has been merged into the x86/pasid branch of tip: Commit-ID: 4e7b11567d946ebe14a3d10b697b078971a9da89 Gitweb: https://git.kernel.org/tip/4e7b11567d946ebe14a3d10b697b078971a9da89 Author:Ashok Raj AuthorDate:Tue, 15 Sep 2020 09:30:07 -07:00 Committer

[tip: x86/urgent] x86/hotplug: Silence APIC only after all interrupts are migrated

The following commit has been merged into the x86/urgent branch of tip: Commit-ID: 52d6b926aabc47643cd910c85edb262b7f44c168 Gitweb: https://git.kernel.org/tip/52d6b926aabc47643cd910c85edb262b7f44c168 Author:Ashok Raj AuthorDate:Wed, 26 Aug 2020 21:12:10 -07:00 Committer

[PATCH v3] x86/hotplug: Silence APIC only after all irq's are migrated

took that CPU offline. Fixes: 60dcaad5736f ("x86/hotplug: Silence APIC and NMI when CPU is dead") Link: https://lore.kernel.org/lkml/875zdarr4h@nanos.tec.linutronix.de/ Reported-by: Evan Green Tested-by: Mathias Nyman Tested-by: Evan Green Reviewed-by: Evan Green Signed-off-by:

[PATCH v2] x86/hotplug: Silence APIC only after all irq's are migrated

ix.de/ Reported-by: Evan Green Tested-by: Mathias Nyman Tested-by: Evan Green Reviewed-by: Evan Green Signed-off-by: Ashok Raj --- v2: - Typos and fixes suggested by Randy Dunlap To: linux-kernel@vger.kernel.org To: Thomas Gleixner Cc: Sukumar Ghorai Cc: Srikanth Nandamuri Cc: Evan Green

[PATCH] x86/hotplug: Silence APIC only after all irq's are migrated

nix.de/ Signed-off-by: Ashok Raj To: linux-kernel@vger.kernel.org To: Thomas Gleixner Cc: Sukumar Ghorai Cc: Srikanth Nandamuri Cc: Evan Green Cc: Mathias Nyman Cc: Bjorn Helgaas Cc: sta...@vger.kernel.org --- arch/x86/kernel/smpboot.c | 11 +-- 1 file changed, 9 insertions(+), 2

[PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled

("iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS") Signed-off-by: Ashok Raj To: Bjorn Helgaas To: Joerg Roedel To: Lu Baolu Cc: sta...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Ashok Raj Cc: io...@lists.linux-foundation.org ---

[PATCH] PCI/ATS: PASID and PRI are only enumerated in PF devices.

: Lu Baolu Cc: sta...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Ashok Raj Cc: io...@lists.linux-foundation.org --- drivers/iommu/intel/iommu.c | 2 +- drivers/pci/ats.c | 13 + include/linux/pci-ats.h | 4 3 files changed, 18

[PATCH] PCI/ATS: PASID and PRI are only enumerated in PF devices.

@vger.kernel.org Cc: Ashok Raj Cc: io...@lists.linux-foundation.org --- drivers/iommu/intel/iommu.c | 2 +- drivers/pci/ats.c | 14 ++ include/linux/pci-ats.h | 4 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers

[PATCH] PCI/ATS: PASID and PRI are only enumerated in PF devices.

Raj To: Bjorn Helgaas To: Joerg Roedel To: Lu Baolu Cc: sta...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Ashok Raj Cc: io...@lists.linux-foundation.org --- drivers/iommu/intel/iommu.c | 2 +- drivers/pci/ats.c | 14 ++ include

[PATCH] PCI: Relax ACS requirement for Intel RCiEP devices.

P. 00:14.3 Network controller: Intel Corporation Device 9df0 (rev 30) Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00 This permits assigning this device to a guest VM. Fixes: f096c061f552 ("iommu: Rework iommu_group_get_for_pci_dev()") Signed-off-by: Ashok Raj

[PATCH] iommu: Relax ACS requirement for Intel RCiEP devices.

P. 00:14.3 Network controller: Intel Corporation Device 9df0 (rev 30) Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00 This permits assigning this device to a guest VM. Fixes: f096c061f552 ("iommu: Rework iommu_group_get_for_pci_dev()") Signed-off-by: Ashok Raj

[PATCH] iommu: Relax ACS requirement for RCiEP devices.

Complex Integrated Endpoint, MSI 00 This permits assigning this device to a guest VM. Fixes: f096c061f552 ("iommu: Rework iommu_group_get_for_pci_dev()") Signed-off-by: Ashok Raj To: Joerg Roedel To: Bjorn Helgaas Cc: linux-kernel@vger.kernel.org Cc: io...@lists.linux-foundation.org Cc:

[tip: x86/microcode] x86/microcode: Update late microcode in parallel

The following commit has been merged into the x86/microcode branch of tip: Commit-ID: 93946a33b5693a6bbcf917a170198ff4afaa7a31 Gitweb: https://git.kernel.org/tip/93946a33b5693a6bbcf917a170198ff4afaa7a31 Author:Ashok Raj AuthorDate:Thu, 22 Aug 2019 23:43:47 +03:00

[PATCH] x86/microcode: Add an option to reload microcode even if revision is unchanged

ort for AMD - add taint flag - removed global force_ucode_load and parameterized it. Signed-off-by: Ashok Raj Signed-off-by: Mihai Carabas cc: Boris Ostrovsky Cc: Mihai Carabas Cc: "H. Peter Anvin" Cc: Ingo Molnar Cc: Jon Grimm Cc: kanth.ghatr...@oracle.com

[4.15 & 4.14 stable 02/12] x86/CPU: Add a microcode loader callback

From: Borislav Petkov commit 1008c52c09dcb23d93f8e0ea83a6246265d2cce0 upstream Add a callback function which the microcode loader calls when microcode has been updated to a newer revision. Do the callback only when no error was encountered during loading. Tested-by: Ashok Raj Signed-off-by

[4.15 & 4.14 stable 01/12] x86/microcode: Propagate return value from updating functions

From: Borislav Petkov commit 3f1f576a195aa266813cbd4ca70291deb61e0129 upstream ... so that callers can know when microcode was updated and act accordingly. Tested-by: Ashok Raj Signed-off-by: Borislav Petkov Reviewed-by: Ashok Raj Cc: Andy Lutomirski Cc: Arjan van de Ven Cc: Borislav

[4.15 & 4.14 stable 03/12] x86/CPU: Check CPU feature bits after microcode upgrade

visible features. Originally-by: Ashok Raj Tested-by: Ashok Raj Signed-off-by: Borislav Petkov Reviewed-by: Ashok Raj Cc: Andy Lutomirski Cc: Arjan van de Ven Cc: Borislav Petkov Cc: Dan Williams Cc: Dave Hansen Cc: David Woodhouse Cc: Greg Kroah-Hartman Cc: Josh Poimboeuf Cc: Linus

[4.15 & 4.14 stable 11/12] x86/microcode: Attempt late loading only when new microcode is present

-by: Thomas Gleixner Tested-by: Emanuel Czirai Tested-by: Ashok Raj Tested-by: Tom Lendacky Cc: Tom Lendacky Cc: Asit K Mallick Cc: sta...@vger.kernel.org Link: https://lkml.kernel.org/r/20180314183615.17629-1...@alien8.de --- arch/x86/include/asm/microcode.h | 1 + arch/x86/kernel/cpu

[4.15 & 4.14 stable 12/12] x86/microcode: Fix CPU synchronization routine

on, do not do the exit sync if microcode wasn't updated. Reported-by: Emanuel Czirai Signed-off-by: Borislav Petkov Signed-off-by: Thomas Gleixner Tested-by: Emanuel Czirai Tested-by: Ashok Raj Tested-by: Tom Lendacky Cc: Asit K Mallick Cc: sta...@vger.kernel.org Link: https://lk

[4.15 & 4.14 stable 00/12] Series to update microcode loading.

rking on a 4.9 backport, will send those once i get them to work. stop_machine differences seem big enough that i might choose a different approach for the 4.9 backport. Cheers, Ashok Ashok Raj (4): x86/microcode/intel: Check microcode revision before updating sibling threads x86/micro

[4.15 & 4.14 stable 10/12] x86/microcode: Synchronize late microcode loading

Petkov Signed-off-by: Ashok Raj Signed-off-by: Borislav Petkov Signed-off-by: Thomas Gleixner Tested-by: Tom Lendacky Tested-by: Ashok Raj Reviewed-by: Tom Lendacky Cc: Arjan Van De Ven Cc: Asit K Mallick Cc: sta...@vger.kernel.org Link: https://lkml.kernel.org/r/20180228102846.13447-8...@alien8

[4.15 & 4.14 stable 06/12] x86/microcode/intel: Writeback and invalidate caches before updating microcode

. [ Borislav: Massage it and use native_wbinvd() in both cases. ] Signed-off-by: Ashok Raj Signed-off-by: Borislav Petkov Signed-off-by: Thomas Gleixner Tested-by: Tom Lendacky Tested-by: Ashok Raj Cc: Arjan Van De Ven Cc: Tom Lendacky Cc: Asit K Mallick Cc: sta...@vger.kernel.org Link: http

[4.15 & 4.14 stable 05/12] x86/microcode/intel: Check microcode revision before updating sibling threads

CPU before performing a microcode update and thus save us the WRMSR 0x79 because it is a particularly expensive operation. [ Borislav: Massage changelog and coding style. ] Signed-off-by: Ashok Raj Signed-off-by: Borislav Petkov Signed-off-by: Thomas Gleixner Tested-by: Tom Lendacky Tested-by

[4.15 & 4.14 stable 09/12] x86/microcode: Request microcode on the BSP

Tested-by: Tom Lendacky Tested-by: Ashok Raj Reviewed-by: Tom Lendacky Cc: Arjan Van De Ven Cc: Asit K Mallick Cc: sta...@vger.kernel.org Link: https://lkml.kernel.org/r/20180228102846.13447-7...@alien8.de --- arch/x86/kernel/cpu/microcode/core.c | 11 +-- 1 file changed, 5 insertions

[4.15 & 4.14 stable 04/12] x86/microcode: Get rid of struct apply_microcode_ctx

From: Borislav Petkov commit 854857f5944c59a881ff607b37ed9ed41d031a3b upstream It is a useless remnant from earlier times. Use the ucode_state enum directly. No functional change. Signed-off-by: Borislav Petkov Signed-off-by: Thomas Gleixner Tested-by: Tom Lendacky Tested-by: Ashok Raj Cc

[4.15 & 4.14 stable 08/12] x86/microcode/intel: Look into the patch cache first

Gleixner Tested-by: Tom Lendacky Tested-by: Ashok Raj Cc: Arjan Van De Ven Cc: Tom Lendacky Cc: Asit K Mallick Cc: sta...@vger.kernel.org Link: https://lkml.kernel.org/r/20180228102846.13447-6...@alien8.de --- arch/x86/kernel/cpu/microcode/intel.c | 11 +-- 1 file changed, 5 insertions

[4.15 & 4.14 stable 07/12] x86/microcode: Do not upload microcode if CPUs are offline

commit 30ec26da9967d0d785abc24073129a34c3211777 upstream Avoid loading microcode if any of the CPUs are offline, and issue a warning. Having different microcode revisions on the system at any time is outright dangerous. [ Borislav: Massage changelog. ] Signed-off-by: Ashok Raj Signed-off-by

[tip:x86/pti] x86/microcode: Synchronize late microcode loading

Commit-ID: a5321aec6412b20b5ad15db2d6b916c05349dbff Gitweb: https://git.kernel.org/tip/a5321aec6412b20b5ad15db2d6b916c05349dbff Author: Ashok Raj AuthorDate: Wed, 28 Feb 2018 11:28:46 +0100 Committer: Thomas Gleixner CommitDate: Thu, 8 Mar 2018 10:19:26 +0100 x86/microcode

[tip:x86/pti] x86/microcode: Do not upload microcode if CPUs are offline

Commit-ID: 30ec26da9967d0d785abc24073129a34c3211777 Gitweb: https://git.kernel.org/tip/30ec26da9967d0d785abc24073129a34c3211777 Author: Ashok Raj AuthorDate: Wed, 28 Feb 2018 11:28:43 +0100 Committer: Thomas Gleixner CommitDate: Thu, 8 Mar 2018 10:19:26 +0100 x86/microcode: Do not

[tip:x86/pti] x86/microcode/intel: Writeback and invalidate caches before updating microcode

Commit-ID: 91df9fdf51492aec9fed6b4cbd33160886740f47 Gitweb: https://git.kernel.org/tip/91df9fdf51492aec9fed6b4cbd33160886740f47 Author: Ashok Raj AuthorDate: Wed, 28 Feb 2018 11:28:42 +0100 Committer: Thomas Gleixner CommitDate: Thu, 8 Mar 2018 10:19:25 +0100 x86/microcode/intel

[tip:x86/pti] x86/microcode/intel: Check microcode revision before updating sibling threads

Commit-ID: c182d2b7d0ca48e0d6ff16f7d883161238c447ed Gitweb: https://git.kernel.org/tip/c182d2b7d0ca48e0d6ff16f7d883161238c447ed Author: Ashok Raj AuthorDate: Wed, 28 Feb 2018 11:28:41 +0100 Committer: Thomas Gleixner CommitDate: Thu, 8 Mar 2018 10:19:25 +0100 x86/microcode/intel

[v2 0/3] Patches to address some limitations in OS microcode loading.

reload_store() per Boris's comments. What's not done from review: TBD: - Load microcode file only once. Added comments in source for future cleanup. - Removing ucd->errors. (Gives a count of failed loads) Ashok Raj (3): x86/microcode/intel: Check microcode revision before updating siblin

[v2 2/3] x86/microcode/intel: Perform a cache flush before ucode update.

Microcode updates can be safer if the caches are clean. Some of the issues around in certain Broadwell parts can be addressed by doing a full cache flush. Signed-off-by: Ashok Raj Cc: X86 ML Cc: LKML Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Tony Luck Cc: Andi Kleen Cc: Boris Petkov Cc: Tom

[v2 3/3] x86/microcode: Quiesce all threads before a microcode update.

r one of the sibling thread and subsequent sibling would already have the latest copy of the microcode. Signed-off-by: Ashok Raj Cc: X86 ML Cc: LKML Cc: Tom Lendacky Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Tony Luck Cc: Andi Kleen Cc: Boris Petkov Cc: Arjan Van De Ven Changes from V1: - C

[v2 1/3] x86/microcode/intel: Check microcode revision before updating sibling threads

After updating microcode on one of the threads in the core, the thread sibling automatically gets the update since the microcode resources are shared. Check the ucode revision on the CPU before performing a ucode update. Signed-off-by: Ashok Raj Cc: X86 ML Cc: LKML Cc: Thomas Gleixner Cc

[PATCH 2/3] x86/microcode/intel: Perform a cache flush before ucode update.

Microcode updates can be safer if the caches are clean. Some of the issues around in certain Broadwell parts can be addressed by doing a full cache flush. Signed-off-by: Ashok Raj Cc: X86 ML Cc: LKML Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Tony Luck Cc: Andi Kleen Cc: Boris Petkov Cc: Tom

[PATCH 1/3] x86/microcode/intel: Check microcode revision before updating sibling threads

After updating microcode on one of the threads in the core, the thread sibling automatically gets the update since the microcode resources are shared. Check the ucode revision on the CPU before performing a ucode update. Signed-off-by: Ashok Raj Cc: X86 ML Cc: LKML Cc: Thomas Gleixner Cc

[PATCH 3/3] x86/microcode: Quiesce all threads before a microcode update.

n a quiet state during these updates. Such updates are rare events, so we use stop_machine() to ensure the whole system is quiet. Signed-off-by: Ashok Raj Cc: X86 ML Cc: LKML Cc: Tom Lendacky Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Tony Luck Cc: Andi Kleen Cc: Boris Petkov Cc: Arjan Van De

[PATCH 0/3] Patch series to address some limitations in OS microcode loading.

The following set of patches address some limitations on microcode loading. First patch avoids a redundant microcode load on sibling thread if another HT sibling got updated. Ashok Raj (3): x86/microcode/intel: Check microcode revision before updating sibling threads x86/microcode/intel

[PATCH] x86/microcode/intel: Check microcode revision before updating sibling threads

After updating microcode on one of the threads in the core, the thread sibling automatically gets the update since the microcode resources are shared. Check the ucode revision on the cpu before performing a ucode update. Signed-off-by: Ashok Raj Cc: X86 ML Cc: LKML --- arch/x86/kernel/cpu

[PATCH] x86/microcode: Check microcode revision before updating sibling threads

After updating microcode on one of the threads in the core, the thread sibling automatically gets the update since the microcode resources are shared. Check the ucode revision on the cpu before performing a ucode update. Signed-off-by: Ashok Raj Cc: X86 ML Cc: LKML --- arch/x86/kernel/cpu

[PATCH] x86/microcode: Check if any new features are present after a microcode reload.

feature set and warns user to use early microcode load before using the new features. Suggested-by: Andi Kleen Signed-off-by: Ashok Raj Cc: Thomas Gleixner Cc: David Woodhouse Cc: Arjan van de Ven Cc: Dave Hansen Cc: Tony Luck Cc: Tim Chen Cc: Greg Kroah-Hartman Cc: Borislav Petkov

[tip:x86/pti] KVM/x86: Add IBPB support

Commit-ID: 15d45071523d89b3fb7372e2135fbd72f6af9506 Gitweb: https://git.kernel.org/tip/15d45071523d89b3fb7372e2135fbd72f6af9506 Author: Ashok Raj AuthorDate: Thu, 1 Feb 2018 22:59:43 +0100 Committer: Thomas Gleixner CommitDate: Sat, 3 Feb 2018 23:06:51 +0100 KVM/x86: Add IBPB support

[PATCH 2/5] x86/ibrs: Add new helper macros to save/restore MSR_IA32_SPEC_CTRL

- same as spec_ctrl_unprotected_begin spec_ctrl_restriction_on - same as spec_ctrl_unprotected_end Signed-off-by: Ashok Raj --- arch/x86/include/asm/spec_ctrl.h | 12 arch/x86/kernel/cpu/spec_ctrl.c | 11 +++ 2 files changed, 23 insertions(+) diff --git a/arch/x86/include

[PATCH 3/5] x86/ibrs: Add direct access support for MSR_IA32_SPEC_CTRL

Add direct access to MSR_IA32_SPEC_CTRL from a guest. Also save/restore IBRS values during exits and guest resume path. Rebasing based on Tim's patch Signed-off-by: Ashok Raj --- arch/x86/kvm/cpuid.c | 3 ++- arch/x86/kvm/vmx.c | 41 + arch/x8

[PATCH 5/5] x86/feature: Detect the x86 feature Indirect Branch Prediction Barrier

Note this MSR is only writable and does not carry any state. Its a barrier so the code should perform a wrmsr when the barrier is needed. Signed-off-by: Ashok Raj --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/msr-index.h | 3 +++ arch/x86/kernel/cpu/spec_ctrl.c| 7 +++

[PATCH 1/5] x86/ibrs: Introduce native_rdmsrl, and native_wrmsrl

- Remove including microcode.h, and use native macros from asm/msr.h - added license header for spec_ctrl.c Signed-off-by: Ashok Raj --- arch/x86/include/asm/spec_ctrl.h | 17 - arch/x86/kernel/cpu/spec_ctrl.c | 1 + 2 files changed, 17 insertions(+), 1 deletion(-) diff --git

[PATCH 0/5] Add support for IBRS & IBPB KVM support.

much longer for the rebase to be complete in tip/x86/pti. Ashok Raj (4): x86/ibrs: Introduce native_rdmsrl, and native_wrmsrl x86/ibrs: Add new helper macros to save/restore MSR_IA32_SPEC_CTRL x86/ibrs: Add direct access support for MSR_IA32_SPEC_CTRL x86/feature: Detect the x86 feature Ind

[PATCH 4/5] x86/svm: Direct access to MSR_IA32_SPEC_CTRL

y the CPU. [Ashok: Modified to reuse V3 spec-ctrl patches from Tim] Signed-off-by: Paolo Bonzini Signed-off-by: Ashok Raj --- arch/x86/kvm/svm.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 0e68f0b..7c1

Re: [PATCH 3/7] kvm: vmx: pass MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD down to the guest

Hi Paolo Do you assume that host isn't using IBRS and only guest uses it? On Mon, Jan 8, 2018 at 10:08 AM, Paolo Bonzini wrote: > Direct access to MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD is important > for performance. Allow load/store of MSR_IA32_SPEC_CTRL, restore guest > IBRS on VM entry

[PATCH 1/4] iommu/vt-d: IOMMU Page Request needs to check if address is canonical.

io...@lists.linux-foundation.org Cc: David Woodhouse Cc: Jacob Pan Cc: Ashok Raj Signed-off-by: Ashok Raj Reported-by: Sudeep Dutt --- drivers/iommu/intel-svm.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c index f167

[PATCH 2/4] iommu/vt-d: Avoid calling virt_to_phys() on null pointer

New kernels with debug show panic() from __phys_addr() checks. Avoid calling virt_to_phys() when pasid_state_tbl pointer is null To: Joerg Roedel To: linux-kernel@vger.kernel.org> Cc: io...@lists.linux-foundation.org Cc: David Woodhouse Cc: Jacob Pan Cc: Ashok Raj Signed-off-by: Ashok

[PATCH 0/4] Patches to support ring0 SVM and devtlb

Hi Sorry for resending.. iommu list email was mistyped :-( The first 2 patches in the series fix some simple bugs in Intel vt-d driver. The 3rd patch Adds support for kmem notify required to support ring0 SVM. 4th patch uses the hooks to perform device tlb invalidations. Ashok Raj (3): iommu

[PATCH 4/4] iommu/vt-d: Hooks to invalidate iotlb/devtlb when using supervisor PASID's.

ations via mmu_notifier_register() api's. To: linux-kernel@vger.kernel.org To: Joerg Roedel Cc: Ashok Raj Cc: Dave Hansen Cc: Huang Ying Cc: CQ Tang Cc: Thomas Gleixner Cc: Ingo Molnar Cc: H. Peter Anvin Cc: Andy Lutomirski Cc: Rik van Riel Cc: Kees Cook Cc: Andrew Morton Cc: Michal Hoc

[PATCH 3/4] mm: Add kernel MMU notifier to manage remote TLB

flush the device TLBs when necessary. To: linux-kernel@vger.kernel.org To: Joerg Roedel Cc: Ashok Raj Cc: Dave Hansen Cc: CQ Tang Cc: Thomas Gleixner Cc: Ingo Molnar Cc: H. Peter Anvin Cc: Andy Lutomirski Cc: Rik van Riel Cc: Kees Cook Cc: Andrew Morton Cc: "Kirill A. Shutemov" C

[PATCH 2/4] iommu/vt-d: Avoid calling virt_to_phys() on null pointer

New kernels with debug show panic() from __phys_addr() checks. Avoid calling virt_to_phys() when pasid_state_tbl pointer is null To: Joerg Roedel To: linux-kernel@vger.kernel.org> Cc: io...@lists-foundation.org Cc: David Woodhouse Cc: Jacob Pan Cc: Ashok Raj Signed-off-by: Ashok

[PATCH 1/4] iommu/vt-d: IOMMU Page Request needs to check if address is canonical.

io...@lists-foundation.org Cc: David Woodhouse Cc: Jacob Pan Cc: Ashok Raj Signed-off-by: Ashok Raj Reported-by: Sudeep Dutt --- drivers/iommu/intel-svm.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c index f167

[PATCH 0/4] Patches to support ring0 SVM and devtlb

The first 2 patches in the series fix some simple bugs in Intel vt-d driver. The 3rd patch Adds support for kmem notify required to support ring0 SVM. 4th patch uses the hooks to perform device tlb invalidations. Ashok Raj (3): iommu/vt-d: IOMMU Page Request needs to check if address is

[PATCH 4/4] iommu/vt-d: Hooks to invalidate iotlb/devtlb when using supervisor PASID's.

ations via mmu_notifier_register() api's. To: linux-kernel@vger.kernel.org To: Joerg Roedel Cc: Ashok Raj Cc: Dave Hansen Cc: Huang Ying Cc: CQ Tang Cc: Thomas Gleixner Cc: Ingo Molnar Cc: H. Peter Anvin Cc: Andy Lutomirski Cc: Rik van Riel Cc: Kees Cook Cc: Andrew Morton Cc: Michal Hoc

[PATCH 3/4] mm: Add kernel MMU notifier to manage remote TLB

flush the device TLBs when necessary. To: linux-kernel@vger.kernel.org To: Joerg Roedel Cc: Ashok Raj Cc: Dave Hansen Cc: CQ Tang Cc: Thomas Gleixner Cc: Ingo Molnar Cc: H. Peter Anvin Cc: Andy Lutomirski Cc: Rik van Riel Cc: Kees Cook Cc: Andrew Morton Cc: "Kirill A. Shutemov" C

[PATCH 2/2] PCI: Save properties required to handle FLR for replay purposes.

Cc: David Woodhouse Cc: io...@lists.linux-foundation.org Signed-off-by: CQ Tang Signed-off-by: Ashok Raj --- drivers/pci/ats.c | 65 + drivers/pci/pci.c | 3 +++ include/linux/pci-ats.h | 10 include/linux/pci.h | 6

[PATCH 0/2] Save and restore pci properties to support FLR

Resending Jean's patch so it can be included earlier than his large SVM commits. Original patch https://patchwork.kernel.org/patch/9593891 was ack'ed by Bjorn. Let's commit these separately since we need functionality earlier. Resending this series as requested by Jean. CQ Tang (1): PCI: Save p

[PATCH 1/2] PCI: Cache PRI and PASID bits in pci_dev

From: Jean-Philippe Brucker Device drivers need to check if an IOMMU enabled ATS, PRI and PASID in order to know when they can use the SVM API. Cache PRI and PASID bits in the pci_dev structure, similarly to what is currently done for ATS. Signed-off-by: Jean-Philippe Brucker --- drivers/pci/a

[PATCH 2/2] iommu/vt-d: Helper function to query if a pasid has any active users

: David Woodhouse Cc: Jean-Phillipe Brucker Cc: io...@lists.linux-foundation.org Signed-off-by: CQ Tang Signed-off-by: Ashok Raj --- drivers/iommu/intel-svm.c | 30 ++ include/linux/intel-svm.h | 20 2 files changed, 50 insertions(+) diff --git

[PATCH 2/2] iommu/vt-d: Helper function to query if a pasid has any active users

: David Woodhouse Cc: Jean-Phillipe Brucker Cc: io...@lists.linux-foundation.org Signed-off-by: CQ Tang Signed-off-by: Ashok Raj --- drivers/iommu/intel-svm.c | 30 ++ include/linux/intel-svm.h | 20 2 files changed, 50 insertions(+) diff --git

[PATCH 1/2] iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommu

-kernel@vger.kernel.org Cc: sta...@vger.kernel.org Cc: CQ Tang Cc: Ashok Raj Fixes: 2f26e0a9 ("iommu/vt-d: Add basic SVM PASID support") Signed-off-by: CQ Tang Signed-off-by: Ashok Raj Tested-by: CQ Tang --- include/linux/intel-iommu.h | 14 +++--- 1 file changed, 7 insert

[PATCH 2/2] iommu/vt-d: tylersburg isoch identity map check is done too late.

The check to set identity map for tylersburg is done too late. It needs to be done before the check for identity_map domain is done. To: Joerg Roedel To: David Woodhouse Cc: io...@lists.linux-foundation.org Cc: linux-kernel@vger.kernel.org Cc: sta...@vger.kernel.org Cc: Ashok Raj Fixes

[PATCH 2/2] iommu/vt-d: tylersburg isoch identity map check is done too late.

The check to set identity map for tylersburg is done too late. It needs to be done before the check for identity_map domain is done. To: Joerg Roedel To: David Woodhouse Cc: io...@lists.linux-foundation.org Cc: linux-kernel@vger.kernel.org Cc: sta...@vger.kernel.org Cc: Ashok Raj Signed-off

[PATCH 1/2] iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommu

-kernel@vger.kernel.org Cc: sta...@vger.kernel.org Cc: CQ Tang Cc: Ashok Raj Signed-off-by: CQ Tang Signed-off-by: Ashok Raj Tested-by: CQ Tang --- include/linux/intel-iommu.h | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/include/linux/intel-iommu.h b

[PATCH 1/2] iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommu

-kernel@vger.kernel.org Cc: sta...@vger.kernel.org Cc: CQ Tang Cc: Ashok Raj Signed-off-by: CQ Tang Signed-off-by: Ashok Raj Tested-by: CQ Tang --- include/linux/intel-iommu.h | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/include/linux/intel-iommu.h b

[PATCH 2/2] iommu/vt-d: tylersburg isoch identity map check is done too late.

The check to set identity map for tylersburg is done too late. It needs to be done before the check for identity_map domain is done. To: Joerg Roedel To: David Woodhouse Cc: io...@lists.linux-foundation.org Cc: linux-kernel@vger.kernel.org Cc: sta...@vger.kernel.org Cc: Ashok Raj Signed-off

[PATCH] pciehp: Fix race condition handling surprise link-down

g, protected by the p_slot->hotplug_lock. To: Bjorn Helgass Cc: linux-kernel@vger.kernel.org Cc: Keith Busch Signed-off-by: Ashok Raj Reviewed-by: Keith Busch --- drivers/pci/hotplug/pciehp_ctrl.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/pci/ho

[PATCH 2/3] pciehp: Fix led status when enabling already enabled slot.

pciehp_configure_device determines the slot devices already exist. Cc: linux-kernel@vger.kernel.org Cc: sta...@vger.kernel.org Signed-off-by: Ashok Raj Reviewed-by: Keith Busch --- drivers/pci/hotplug/pciehp_ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/hotplug

[PATCH 1/3] pciehp: Prioritize data-link event over presence detect

stream bus, the link change event should take precedence over a present detect event. This patch skips checking the PDC status we handled a link event in the same handler. Cc: linux-kernel@vger.kernel.org Cc: sta...@vger.kernel.org Signed-off-by: Ashok Raj Reviewed-by: Keith Busch --- drivers

[PATCH 0/3] Fix improper handling of pcie hotplug events.

This patch series fixes pciehp for certain special conditions observed during testing. Ashok Raj (3): pciehp: Prioritize data-link event over presence detect pciehp: Fix led status when enabling already enabled slot. pciehp: Fix race condition handling surprise link-down drivers/pci

[PATCH 3/3] pciehp: Fix race condition handling surprise link-down

atch fixes that by setting the slot state only when the work to handle the power event is executing, protected by the hot plug mutex. Cc: linux-kernel@vger.kernel.org Cc: sta...@vger.kernel.org Signed-off-by: Ashok Raj Reviewed-by: Keith Busch --- drivers/pci/hotplug/pciehp_ctrl.c | 4 ++-- 1 fi

[PATCH] iommu/vt-d: Fix IOMMU lookup for VF's

Woodhouse Cc: Joerg Roedel Cc: Ashok Raj Cc: Sainath Grandhi Cc: io...@lists.linux-foundation.org Cc: sta...@vger.kernel.org Signed-off-by: Sainath Grandhi Signed-off-by: Ashok Raj --- drivers/iommu/intel-iommu.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/iommu/int

[tip:x86/urgent] x86/mce: Ensure offline CPUs don' t participate in rendezvous process

Commit-ID: d90167a941f62860f35eb960e1012aa2d30e7e94 Gitweb: http://git.kernel.org/tip/d90167a941f62860f35eb960e1012aa2d30e7e94 Author: Ashok Raj AuthorDate: Thu, 10 Dec 2015 11:12:26 +0100 Committer: Thomas Gleixner CommitDate: Sat, 19 Dec 2015 09:55:31 +0100 x86/mce: Ensure offline

[tip:x86/urgent] x86/mce: Ensure offline CPUs don' t participate in rendezvous process

Commit-ID: 06f337b7c7eb86254c86e8e717273d1e356d5a1b Gitweb: http://git.kernel.org/tip/06f337b7c7eb86254c86e8e717273d1e356d5a1b Author: Ashok Raj AuthorDate: Thu, 10 Dec 2015 11:12:26 +0100 Committer: Ingo Molnar CommitDate: Fri, 11 Dec 2015 08:59:48 +0100 x86/mce: Ensure offline CPUs

[Patch V2 1/2] x86,mce: Basic support to add LMCE support to QEMU

S has opted in to Local delivery. Signed-off-by: Ashok Raj Tested-by: Gong Chen --- Resending with proper commit message for second patch target-i386/cpu.c | 8 target-i386/cpu.h | 8 ++-- target-i386/kvm.c | 38 +++--- 3 files changed, 45 inser

[Patch V2 2/2] x86, mce: Need to translate GPA to HPA to inject error in guest.

From: Gong Chen When we need to test error injection to a specific address using EINJ, there needs to be a way to translate GPA to HPA. This will allow host EINJ to inject error to test how guest behavior is when a bad address is consumed. This permits guest OS to perform its own recovery. Signe

[Patch V0] This patch adds some support required for KVM in order to support LMCE.

: Ashok Raj --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/vmx.c | 26 +- arch/x86/kvm/x86.c | 17 - 3 files changed, 38 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm

[Patch V2] x86, mce: Ensure offline CPU's don't participate in mce rendezvous process.

nt mce_callin, but mce_start would only wait for all online_cpus. So offline cpu's should avoid participating in the rendezvous process. Reviewed-by: Tony Luck Cc: sta...@vger.kernel.org Signed-off-by: Ashok Raj --- arch/x86/kernel/cpu/mcheck/mce.c | 13 + 1 file changed, 13 ins

[Patch V1] x86, mce: Ensure offline CPU's don't participate in mce rendezvous process.

nt mce_callin, but mce_start would only wait for all online_cpus. So offline cpu's should avoid participating in the rendezvous process. Reviewed-by: Tony Luck Cc: sta...@vger.kernel.org Signed-off-by: Ashok Raj --- arch/x86/kernel/cpu/mcheck/mce.c | 15 ++- 1 file changed, 14 i

[Patch V0] x86, mce: Ensure offline CPU's don't participate in mce rendezvous process.

nt mce_callin, but mce_start would wait for all online_cpus. So offline cpu's should avoid participating in the rendezvous process. Reviewed-by: Tony Luck Signed-off-by: Ashok Raj --- arch/x86/kernel/cpu/mcheck/mce.c | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff -

[tip:ras/core] x86/mce: Don' t clear shared banks on Intel when offlining CPUs

Commit-ID: 6e06780a98f149f131d46c1108d4ae27f05a9357 Gitweb: http://git.kernel.org/tip/6e06780a98f149f131d46c1108d4ae27f05a9357 Author: Ashok Raj AuthorDate: Mon, 28 Sep 2015 09:21:43 +0200 Committer: Ingo Molnar CommitDate: Mon, 28 Sep 2015 10:15:26 +0200 x86/mce: Don't clear s

[Patch V1 3/3] x86, mce: Account for offline CPUs during MCE rendezvous.

ster CPU - Collect logs from the offline cpu and report them via rendezvous master. Signed-off-by: Ashok Raj Reviewed-by: Tony Luck --- arch/x86/kernel/cpu/mcheck/mce.c | 32 ++-- 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/mcheck

[Patch V1 2/3] x86, mce: Refactor parts of mce_log() to reuse when logging from offline CPUs

Simply refactoring part of mce_log() to facilitate logging from offline CPUs. Signed-off-by: Ashok Raj Reviewed-by: Tony Luck --- arch/x86/kernel/cpu/mcheck/mce.c | 21 ++--- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch

[Patch V1 1/3] x86, mce: MCE log size not enough for high core parts

with some fudge to grow in future. Signed-off-by: Ashok Raj Suggested-by: Tony Luck --- arch/x86/include/asm/mce.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 2dbc0bf..4293ae7 100644 --- a/arch/x86/include/asm/

[Patch V1] x86, mce: CPU synchronization for broadcast MCE's is surprised by offline CPUs

ing from CPUs logically offlined. - Ensure the offline CPU wil not be choosen as the rendezvous master CPU - Collect logs from the offline cpu and report them via rendezvous master. Signed-off-by: Ashok Raj Reviewed-by: Tony Luck --- arch/x86/kernel/cpu/mcheck/mce

[Patch V1] x86, mce: Don't clear global error reporting banks during cpu_offline

le anymore. - Consolidated some code to use sharing - Minor changes to some prototypes to fit usage. - Left handling same for non-Intel CPU models to avoid any unknown regressions. - Fixed review comments from Boris Signed-off-by: Ashok Raj Reviewed-by: Tony Luck Tested-by: Serge Ayoun --- arch/x86/

[Patch V0] x86, mce: Don't clear global error reporting banks during cpu_offline

ny unknown regressions. Signed-off-by: Ashok Raj Reviewed-by: Tony Luck Tested-by: Serge Ayoun --- arch/x86/kernel/cpu/mcheck/mce.c | 38 -- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/m

[tip:ras/core] x86/mce: Clear Local MCE opt-in before kexec

Commit-ID: 8838eb6c0bf3b6a6494a163947ab3d1700ab45d2 Gitweb: http://git.kernel.org/tip/8838eb6c0bf3b6a6494a163947ab3d1700ab45d2 Author: Ashok Raj AuthorDate: Wed, 12 Aug 2015 18:29:40 +0200 Committer: Ingo Molnar CommitDate: Thu, 13 Aug 2015 10:12:52 +0200 x86/mce: Clear Local MCE opt

[tip:ras/core] x86/mce: Remove unused function declarations

Commit-ID: 4d1d5cdc345d15e09518a2410f7fcd069465ffac Gitweb: http://git.kernel.org/tip/4d1d5cdc345d15e09518a2410f7fcd069465ffac Author: Ashok Raj AuthorDate: Wed, 12 Aug 2015 18:29:39 +0200 Committer: Ingo Molnar CommitDate: Thu, 13 Aug 2015 10:12:52 +0200 x86/mce: Remove unused

[Patch V1 2/2] x86, mce: clear Local MCE opt-in before kexec.

kexec could boot a kernel that could be legacy with no knowledge of LMCE. hence we should make sure we clear LMCE optin before kexec reboot. Signed-off-by: Ashok Raj --- arch/x86/include/asm/mce.h | 4 arch/x86/kernel/cpu/mcheck/mce.c | 30

[Patch V1 1/2] x86, mce: Remove unused declarations

Remove unused references Signed-off-by: Ashok Raj --- arch/x86/include/asm/mce.h | 4 1 file changed, 4 deletions(-) diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 8ba4d7a..b7a3a34 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h

[tip:x86/core] x86/mce: Add infrastructure to support Local MCE

Commit-ID: 88d538672ea26223bca08225bc49f4e65e71683d Gitweb: http://git.kernel.org/tip/88d538672ea26223bca08225bc49f4e65e71683d Author: Ashok Raj AuthorDate: Thu, 4 Jun 2015 18:55:23 +0200 Committer: Ingo Molnar CommitDate: Sun, 7 Jun 2015 15:33:14 +0200 x86/mce: Add infrastructure to

  1   2   >