Commit-ID: 4635fdc696a8e89eead3ea1712ae6ada38538d40
Gitweb: http://git.kernel.org/tip/4635fdc696a8e89eead3ea1712ae6ada38538d40
Author: Bin Gao
AuthorDate: Tue, 15 Nov 2016 12:27:23 -0800
Committer: Thomas Gleixner
CommitDate: Fri, 18 Nov 2016 10:58:30 +0100
x86/tsc: Mark Intel
Commit-ID: f3a02ecebed7df7d5d68898628dea7a3bfcf03e3
Gitweb: http://git.kernel.org/tip/f3a02ecebed7df7d5d68898628dea7a3bfcf03e3
Author: Bin Gao
AuthorDate: Tue, 15 Nov 2016 12:27:24 -0800
Committer: Thomas Gleixner
CommitDate: Fri, 18 Nov 2016 10:58:31 +0100
x86/tsc: Set TSC_KNOWN_FREQ
Commit-ID: 4ca4df0b7eb06df264b2919759957f6d6ea1822e
Gitweb: http://git.kernel.org/tip/4ca4df0b7eb06df264b2919759957f6d6ea1822e
Author: Bin Gao
AuthorDate: Tue, 15 Nov 2016 12:27:22 -0800
Committer: Thomas Gleixner
CommitDate: Fri, 18 Nov 2016 10:58:30 +0100
x86/tsc: Mark TSC frequency
Commit-ID: 47c95a46d0fae07762f0a38aa3709ae63f307048
Gitweb: http://git.kernel.org/tip/47c95a46d0fae07762f0a38aa3709ae63f307048
Author: Bin Gao
AuthorDate: Tue, 15 Nov 2016 12:27:21 -0800
Committer: Thomas Gleixner
CommitDate: Fri, 18 Nov 2016 10:58:30 +0100
x86/tsc: Add
On Intel GOLDMONT Atom SoC TSC is the only reliable clocksource.
We mark TSC reliable to avoid watchdog on it.
Signed-off-by: Bin Gao
---
arch/x86/kernel/tsc.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index f1a7fb5..354b302 100644
alibration is skipped.
Signed-off-by: Bin Gao
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kernel/tsc.c | 11 ---
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/cpufeatures.h
b/arch/x86/include/asm/cpufeatures.h
index a39629
e set both X86_FEATURE_TSC_KNOWN_FREQ and
X86_FEATURE_TSC_RELIABLE flags to make sure the calibration is
skipped and no watchdog on TSC.
Signed-off-by: Bin Gao
---
arch/x86/kernel/tsc_msr.c | 18 ++
arch/x86/platform/intel-mid/mfld.c | 9 +++--
arch/x86/platform/intel-mid/mr
This patch series adds X86_FEATURE_TSC_KNOWN_FREQ flag and modifies
Intel Atom SoC related TSC codes to use the new TSC_KNOWN_FREQ flag
and the existed TSC_RELIABLE flag.
Bin Gao (4):
x86/tsc: add X86_FEATURE_TSC_KNOWN_FREQ flag
x86/tsc: mark TSC frequency determined by CPUID as known
x86
This
makes us believe that we should prefer CPUID determined frequency over
software calibrated frequency.
Signed-off-by: Bin Gao
---
arch/x86/kernel/tsc.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 3ba146e..f1a7fb5 100644
---
On Fri, Nov 11, 2016 at 12:26:40AM +0100, Thomas Gleixner wrote:
> On Thu, 10 Nov 2016, Bin Gao wrote:
> > > > @@ -702,6 +702,15 @@ unsigned long native_calibrate_tsc(void)
> > > > }
> > > > }
> > > >
> > &
> > @@ -702,6 +702,15 @@ unsigned long native_calibrate_tsc(void)
> > }
> > }
> >
> > + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
>
> I can understand the one below, but this one changes existing behaviour w/o
> explaining why this is correct and desired. If at all then
> > --- a/arch/x86/kernel/tsc.c
> > +++ b/arch/x86/kernel/tsc.c
> > @@ -1283,10 +1283,10 @@ static int __init init_tsc_clocksource(void)
> > clocksource_tsc.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP;
> >
> > /*
> > -* Trust the results of the earlier calibration on systems
> > -
stuff should be skipped.
Bin Gao (2):
x86/tsc: add X86_FEATURE_TSC_KNOWN_FREQ flag
x86: use KNOWN_FREQ and RELIABLE TSC flags on certain processors/SoCs
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kernel/tsc.c | 15 ---
arch/x86/kernel/tsc_msr.c
-off-by: Bin Gao
---
arch/x86/kernel/tsc.c | 9 +
arch/x86/kernel/tsc_msr.c | 4
arch/x86/platform/intel-mid/mfld.c | 5 +++--
arch/x86/platform/intel-mid/mrfld.c | 4 ++--
4 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/tsc.c b
alibration is skipped.
Signed-off-by: Bin Gao
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kernel/tsc.c | 6 +++---
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/cpufeatures.h
b/arch/x86/include/asm/cpufeatures.h
index a396292..7f6a
alibration is skipped.
Signed-off-by: Bin Gao
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kernel/tsc.c | 11 ++-
arch/x86/kernel/tsc_msr.c | 6 ++
arch/x86/platform/intel-mid/mfld.c | 7 +--
arch/x86/platform/intel-mid/mrfld.c | 6 -
On Fri, Aug 26, 2016 at 12:14:58PM +0200, Thomas Gleixner wrote:
> On Fri, 26 Aug 2016, Thomas Gleixner wrote:
> > On Thu, 25 Aug 2016, Bin Gao wrote:
> > > On Wed, Aug 24, 2016 at 10:51:20AM +0200, Thomas Gleixner wrote:
> > > > On Tue, 16 Aug 2016, Bin Gao wrote:
On Sat, Aug 27, 2016 at 08:59:12PM +0200, Julia Lawall wrote:
> Make sure (of/i2c/platform)_device_id tables are NULL terminated
> Generated by: scripts/coccinelle/misc/of_table.cocci
>
> CC: Yegnesh S Iyer
> Signed-off-by: Julia Lawall
> Signed-off-by: Fengguang Wu
> ---
>
> Please take the
Signed-off-by: Bin Gao
---
Changes in v5:
- Applied patch Joe Perches and reduced data
segment size
- Applied patch from Julia Lawall and fixed
the platform_device_id to NULL entry terminated error
Changes in v4:
- Fixed copyright year and changed GPL to GPL v2
Changes in v3:
- Moved driver
zone, temp, crossed trip and event details.
Signed-off-by: Yegnesh S Iyer
Signed-off-by: Bin Gao
---
Changes in v4:
- Fixed copyright year and changed GPL to GPL v2
Changes in v3:
- Moved driver data from mfd domain to the driver
- Minor coding style related cleanup
Changes in v2:
- Removed
On Wed, Aug 24, 2016 at 10:51:20AM +0200, Thomas Gleixner wrote:
> On Tue, 16 Aug 2016, Bin Gao wrote:
> > On some newer Intel x86 processors/SoCs the TSC frequency can be directly
> > calculated by factors read from specific MSR registers or from a cpuid
> > leaf (0x15). TSC
because a physically not reliable HPET is acting as timekeeping
watchdog.
Signed-off-by: Bin Gao
---
Changes in v2:
- Set X86_FEATURE_TSC_RELIABLE for cpuid case
- Patch description change
arch/x86/kernel/tsc.c | 1 +
arch/x86/kernel/tsc_msr.c | 2 ++
arch/x86/platform
This patch adds .get_direction method for the gpio_chip structure
of the wcove_gpio driver.
Signed-off-by: Bin Gao
---
drivers/gpio/gpio-wcove.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index f5c88df..e11d6a3
On Wed, Jul 27, 2016 at 11:13:43AM +0300, Felipe Balbi wrote:
>
> Hi,
>
> Bin Gao writes:
> > This patch implements a simple USB Power Delivery sink port state machine.
> > It assumes the hardware only handles PD packet transmitting and receiving
> > over the CC li
On Wed, Jul 27, 2016 at 11:21:13AM +0200, Oliver Neukum wrote:
> On Tue, 2016-07-26 at 11:37 -0700, Bin Gao wrote:
> > +#define MAKE_HEADER(port, header, msg, objs) \
> > +do { \
> > + header->type = msg; \
> > + header->data_role = PD_DATA_ROLE_UF
Signed-off-by: Chandra Sekhar Anagani
Signed-off-by: Pranav Tipnis
Signed-off-by: Bin Gao
Changes in v2:
- Added PD support for cold boot case
---
drivers/usb/typec/typec_wcove.c | 309
1 file changed, 285 insertions(+), 24 deletions(-)
diff --git a
function and it doesn't support source port and port swap yet.
This patch depends on these two patches:
https://lkml.org/lkml/2016/6/29/349
https://lkml.org/lkml/2016/6/29/350
Signed-off-by: Bin Gao
Changes in v2:
- Removed work queue so messages are directly handled in phy driver's
This series introduce a USB PD(Power Delivery) sink port simple state
machine driver and adds USB PD sink port support for Intel BXT Whiskey
Cove PMIC Type-C phy driver.
This series depends on these two patches:
https://lkml.org/lkml/2016/6/29/349
https://lkml.org/lkml/2016/6/29/350
Bin Gao (1
This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
This driver is based on gpio-crystalcove.c.
Signed-off-by: Ajay Thomas
Signed-off-by: Bin Gao
Reviewed-by: Andy Shevchenko
Reviewed-by: Mika Westerberg
---
Changes in v7:
- Fixed various coding style comments from Andy
The Intel Whiskey Cove PMIC includes several function units, e.g.
ADC, thermal, USB Type-C, GPIO, etc. The corresponding device has
to be created in the mfd driver(intel_soc_pmic_bxtwc.c). This change
adds the USB Type-c device.
Signed-off-by: Bin Gao
---
drivers/mfd/intel_soc_pmic_bxtwc.c | 23
On Tue, Jun 28, 2016 at 03:58:49PM +0100, Lee Jones wrote:
> On Mon, 27 Jun 2016, Bin Gao wrote:
>
> > This patch adds the mapping of PMIC ADC channel to thermal zone and
> > USB type-C resources. This mapping is used in the pmic thermal driver
> > to notify the therma
: Yegnesh S Iyer
Signed-off-by: Bin Gao
Changes in v3:
- Moved driver data from mfd domain to the driver
- Minor coding style related cleanup
Changes in v2:
- Removed unnecessary request_threaded_irq() - we should be only
using devm_request_threaded_irq() with virq
---
drivers/thermal
This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
This driver is based on gpio-crystalcove.c.
Signed-off-by: Ajay Thomas
Signed-off-by: Bin Gao
Reviewed-by: Andy Shevchenko
Reviewed-by: Mika Westerberg
---
Changes in v6:
- Removed unnecessary wcove_gpio_remove
On Mon, Jul 18, 2016 at 10:07:24AM +0300, Felipe Balbi wrote:
>
> Hi,
>
> Bin Gao writes:
> >> > +int pd_sink_queue_msg(struct pd_sink_msg *msg)
> >> > +{
> >> > +unsigned long flags;
> >> > +struct pd_sink_port *p
On Sat, Jul 16, 2016 at 08:49:53AM +0900, Greg Kroah-Hartman wrote:
> On Fri, Jul 15, 2016 at 03:41:10PM -0700, Bin Gao wrote:
> > On Fri, Jul 15, 2016 at 02:21:48PM +0300, Felipe Balbi wrote:
> > > Greg Kroah-Hartman writes:
> > > > On Fri, Jul 15, 2016 at 01:38:
On Fri, Jul 15, 2016 at 10:25:36AM +0300, Felipe Balbi wrote:
> Bin Gao writes:
>
> > This patch implements a simple USB Power Delivery sink port state machine.
> > It assumes the hardware only handles PD packet transmitting and receiving
> > over the CC line of the U
On Fri, Jul 15, 2016 at 02:21:48PM +0300, Felipe Balbi wrote:
> Greg Kroah-Hartman writes:
> > On Fri, Jul 15, 2016 at 01:38:12PM +0300, Felipe Balbi wrote:
> >>
> >> Hi,
> >>
> >> Bin Gao writes:
> >> > +static voi
On Fri, Jul 15, 2016 at 08:31:08AM +0200, Oliver Neukum wrote:
> > +static void ack_message(struct pd_sink_port *port, int msg_id)
> > +{
> > + struct pd_msg_header *header = kzalloc(PD_MSG_HEADER_LEN, GFP_KERNEL);
>
> This must be GFP_NOIO. We are in a cycle that can lead to deadlock.
>
> Assu
From: Chandra Sekhar Anagani
This adds PD sink port support for the USB Type-C PHY on Intel WhiskeyCove
PMIC which is available on some of the Intel Broxton SoC based platforms.
This patch depends on these two patches:
https://lkml.org/lkml/2016/6/29/349
https://lkml.org/lkml/2016/6/29/350
Sign
function and it doesn't support source port and port swap yet.
This patch depends on these two patches:
https://lkml.org/lkml/2016/6/29/349
https://lkml.org/lkml/2016/6/29/350
Signed-off-by: Bin Gao
---
drivers/usb/typec/Kconfig | 13 +
drivers/usb/typec/Makefile | 1 +
drivers/usb/
This series introduce a USB PD(Power Delivery) sink port simple state
machine driver and adds USB PD sink port support for Intel BXT Whiskey
Cove PMIC Type-C phy driver.
This series depends on these two patches:
https://lkml.org/lkml/2016/6/29/349
https://lkml.org/lkml/2016/6/29/350
Bin Gao (1
On Wed, Jul 06, 2016 at 10:57:19AM +0200, Linus Walleij wrote:
> > + gpiochip_irqchip_add(&wg->chip, &wcove_irqchip, 0,
> > +handle_simple_irq, IRQ_TYPE_NONE);
>
> Reexamine the use of handle_simple_irq() here. We have two kinds of
> irq hardware: those with one r
This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
This driver is based on gpio-crystalcove.c.
Signed-off-by: Ajay Thomas
Signed-off-by: Bin Gao
---
Changes in v5:
- Revisited the interrupt handler code to iterate until all pending
interrupts are handled. This change
On Wed, Jul 06, 2016 at 01:07:15PM +0300, Mika Westerberg wrote:
> On Wed, Jul 06, 2016 at 10:57:19AM +0200, Linus Walleij wrote:
> > On Tue, Jun 28, 2016 at 1:56 AM, Bin Gao wrote:
> >
> > > This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
>
On Wed, Jul 06, 2016 at 10:57:19AM +0200, Linus Walleij wrote:
> > +static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
> > +{
> > + int pending;
> > + unsigned int p0, p1, virq, gpio;
> > + struct wcove_gpio *wg = data;
> > +
> > + if (regmap_read(wg->regmap, IRQ
This change add support for pmic thermal driver which is intended to
handle the alert interrupts triggered upon thermal trip point cross
and notify the thermal framework appropriately with the zone, temp,
crossed trip and event details.
Signed-off-by: Yegnesh S Iyer
Signed-off-by: Bin Gao
This patch adds Intel Whiskey Cove PMIC thermal driver which is intended
to handle the alert interrupts triggered upon thermal trip point cross
and notify the thermal framework appropriately with the zone, temp,
crossed trip and event details.
Signed-off-by: Yegnesh S Iyer
Signed-off-by: Bin Gao
: struct trip_config_map{},
struct thermal_irq_map {} and struct pmic_thermal_data {} which are
required by changes we did on intel_soc_pmic_bxtwc.c.
Signed-off-by: Yegnesh S Iyer
Signed-off-by: Rohit S Kenchanpura
Signed-off-by: Bin Gao
---
Changes in v4:
- Extended existing regmap reg instead of
This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
This driver is based on gpio-crystalcove.c.
Signed-off-by: Ajay Thomas
Signed-off-by: Bin Gao
---
Changes in v4:
- Converted CTLI_INTCNT_XX macros to less verbose ones INT_DETECT_XX.
- Add comments about why there is no
and write.
Signed-off-by: Felipe Balbi
Signed-off-by: Chandra Sekhar Anagani
Signed-off-by: Bin Gao
---
Changes in v4:
- various fixes to address Aaron's comments.
Changes in v3: none
Changes in v2: none
drivers/acpi/pmic/intel_pmic.c | 74 --
dr
This patch adds operation region driver for Intel BXT WhiskeyCove
PMIC. The register mapping is done as per the BXT WC data sheet.
Signed-off-by: Ajay Thomas
Signed-off-by: Bin Gao
---
Changes in v4:
- Reverted(removed) regs_read() and regs_write() methods
Changes in v3:
- Added regs_read
first approach.
Solution: Modified the policy enable function to take bit field as well.
The use of bit field is left to the pmic specific opregion driver.
Signed-off-by: Yegnesh Iyer
Signed-off-by: Bin Gao
---
Changes in v4: none
Changes in v3: none
Changes in v2:
- Fixed subject line.
drivers
This series modifies the pen function signature to take bit field
and adds a new opregion driver for Intel BXT WhiskeyCove PMIC. It
also adds support for PMIC regs operation region.
Yegnesh Iyer (1):
acpi: pmic: Modifying the pen function signature to take bit field
Ajay Thomas (1):
acpi: pmi
> Well, I'm dropping the old series due to comments from Aaron on the
> second patch.
>
> I will be waiting for an update addressing the Aaron's comments in
> [2/3] and [3/3].
Right, there was no change on [1/3].
I'll address Aaron's comments and re-send all as v4. Thanks.
-Bin
.
Signed-off-by: Chandra Sekhar Anagani
Signed-off-by: Felipe Balbi
Signed-off-by: Bin Gao
---
Changes in v3: none
Changes in v2: none
drivers/acpi/pmic/intel_pmic.c | 74 +-
drivers/acpi/pmic/intel_pmic.h | 5 +++
2 files changed, 71 insertions(+), 8
This patch adds operation region driver for Intel BXT WhiskeyCove
PMIC. The register mapping is done as per the BXT WC data sheet.
Signed-off-by: Ajay Thomas
Signed-off-by: Felipe Balbi
Signed-off-by: Chandra Sekhar Anagani
Signed-off-by: Bin Gao
---
Changes in v3:
- Added regs_read() and
first approach.
Solution: Modified the policy enable function to take bit field as well.
The use of bit field is left to the pmic specific opregion driver.
Signed-off-by: Yegnesh Iyer
Signed-off-by: Bin Gao
---
Changes in v3: no change
Changes in v2:
- Fixed subject line.
drivers/acpi/pmic
This series modifies the pen function signature to take bit field
and adds a new opregion driver for Intel BXT WhiskeyCove PMIC. It
also adds support for PMIC regs operation region.
Yegnesh Iyer (1):
acpi: pmic: Modifying the pen function signature to take bit field
Ajay Thomas (1):
acpi: pmi
: struct trip_config_map{},
struct thermal_irq_map {} and struct pmic_thermal_data {} which are
required by changes we did on intel_soc_pmic_bxtwc.c.
Signed-off-by: Yegnesh S Iyer
Signed-off-by: Rohit S Kenchanpura
Signed-off-by: Bin Gao
---
Changes in v3:
- Added USB type-C resources.
Changes in v2
On Tue, Jun 21, 2016 at 02:19:57AM +0300, Andy Shevchenko wrote:
> My comments below.
Thanks for your review.
> > +config GPIO_WHISKEY_COVE
> > + tristate "GPIO support for Whiskey Cove PMIC"
> > + depends on INTEL_SOC_PMIC
> > + select GPIOLIB_IRQCHIP
> > + help
> > +
On Mon, Jun 20, 2016 at 04:20:26PM -0700, John Stultz wrote:
> On Fri, Jun 17, 2016 at 12:48 AM, Thomas Gleixner wrote:
> > On Thu, 16 Jun 2016, Bin Gao wrote:
> >
> >> Unlike PIT based calibration which counts TSC cycles against another timer,
> >> MSR or CPU
On Mon, Jun 20, 2016 at 09:52:00AM +0100, Lee Jones wrote:
> > > > > +static struct trip_config_map str3_trip_config[] = {
> > > > > + {
> > > > > + .irq_reg = BXTWC_THRM2IRQ,
> > > > > + .irq_mask = 0x10,
> > > > > + .irq_en = BXTWC_MTHRM2IRQ,
> > > > > +
This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
This driver is based on gpio-crystalcove.c.
Signed-off-by: Ajay Thomas
Signed-off-by: Bin Gao
---
Changes in v3:
- Fixed the year in copyright line(2015-->2016).
- Removed DRV_NAME macro.
- Added kernel-doc
On Fri, Jun 17, 2016 at 09:01:59AM +0100, Lee Jones wrote:
> > +static struct trip_config_map str0_trip_config[] = {
> > + {
> > + .irq_reg = BXTWC_THRM0IRQ,
> > + .irq_mask = 0x01,
> > + .irq_en = BXTWC_MTHRM0IRQ,
> > + .irq_en_mask = 0x01,
> > +
>
> Looks good. I have couple of minor comments, see below.
Thanks for review again.
>
> > + * Copyright (C) 2015 Intel Corporation. All rights reserved.
>
> It is 2016 now isn't it? :-)
Will fix this in v3.
> > +#define DRV_NAME "bxt_wcove_gpio"
>
> Drop this.
We have _TWO_ places using DRV_
_msr.c and
replaces set_cpu_cap() with setup_force_cpu_cap() in other files.
Signed-off-by: Bin Gao
---
arch/x86/kernel/tsc_msr.c | 2 ++
arch/x86/platform/intel-mid/mfld.c | 2 +-
arch/x86/platform/intel-mid/mrfl.c | 2 +-
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/x86
{},
struct thermal_irq_map {} and struct pmic_thermal_data {} which are
required by changes we did on intel_soc_pmic_bxtwc.c.
Signed-off-by: Yegnesh S Iyer
Signed-off-by: Bin Gao
---
Changes in v2:
- Fixed subject line.
- Combined two patches into one.
drivers/mfd/intel_soc_pmic_bxtwc.c | 109
This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
This driver is based on gpio-crystalcove.c.
Signed-off-by: Ajay Thomas
Signed-off-by: Bin Gao
---
Changes in v2:
- Typo fix (Whsikey --> Whiskey).
- Included linux/gpio/driver.h instead of linux/gpio.h
- Implemen
On Tue, Jun 14, 2016 at 01:09:31PM +0300, Mika Westerberg wrote:
> On Fri, Jun 10, 2016 at 11:01:51PM -0700, Bin Gao wrote:
> > +static const struct platform_device_id pmic_gpio_id_table[] = {
> > + { "bxt_wcove_gpio", },
> > +};
>
> Do you really n
On Mon, Jun 13, 2016 at 02:43:16PM +0200, Linus Walleij wrote:
> On Sat, Jun 11, 2016 at 8:01 AM, Bin Gao wrote:
>
> > This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
> > This driver is based on gpio-crystalcove.c.
> >
> > Signed-off-by:
On Sun, Jun 12, 2016 at 10:13:33AM +0800, Aaron Lu wrote:
> Last time Paul suggests device_initcall instead of module_init here:
>
> commit 75829dcf10862966f52716f2d67ac1c1b1eb486b
> Author: Paul Gortmaker
> Date: Mon Feb 15 00:27:51 2016 -0500
>
> drivers/acpi: make pmic/intel_pmic_crc.c
This patch adds operation region driver for Intel BXT WhiskeyCove
PMIC. The register mapping is done as per the BXT WC data sheet.
Signed-off-by: Ajay Thomas
Signed-off-by: Bin Gao
---
drivers/acpi/Kconfig | 6 +
drivers/acpi/Makefile| 1 +
drivers/acpi/pmic
first approach.
Solution: Modified the policy enable function to take bit field as well.
The use of bit field is left to the pmic specific opregion driver.
Signed-off-by: Yegnesh Iyer
Signed-off-by: Bin Gao
---
drivers/acpi/pmic/intel_pmic.c | 13 +++--
drivers/acpi/pmic/intel_pmic.h
This series modifies the pen function signature to take bit field
and adds a new opregion driver for Intel BXT WhiskeyCove PMIC.
Changes in v2:
- Replaced module_init() with device_initcall() as the driver is
supposed to be built-in.
Yegnesh Iyer (1):
acpi/pmic: Modifying the pen function s
This changes adds the mapping of Intel BXT WhiskeyCove PMIC ADC channel
to thermal zone. This mapping is used in the pmic thermal driver to
notify the thermal zone with the pmic adc channel alert interrupts.
Signed-off-by: Yegnesh Iyer
Signed-off-by: Bin Gao
---
drivers/mfd
-off-by: Bin Gao
---
drivers/thermal/Kconfig | 10 +++
drivers/thermal/Makefile | 1 +
drivers/thermal/intel_pmic_thermal.c | 159 +++
3 files changed, 170 insertions(+)
create mode 100644 drivers/thermal/intel_pmic_thermal.c
diff --git a
This patch adds three new data structures: struct trip_config_map {},
struct thermal_irq_map {} and struct pmic_thermal_data {} which are
required by some new drivers.
Signed-off-by: ysiyer
Signed-off-by: Bin Gao
---
include/linux/mfd/intel_soc_pmic.h | 21 +
1 file changed
This series adds thermal support for Intel BXT WhiskeyCove PMIC
Yegnesh Iyer (3):
include/linux/mfd/intel_soc_pmic.h: add new data structures
thermal: add Intel BXT WhiskeyCove PMIC thermal driver
mfd/intel_soc_pmic_bxtwc: add Intel BXT WhiskeyCove PMIC ADC thermal
channel-zone mapping
i
This patch adds operation region driver for Intel BXT WhiskeyCove
PMIC. The register mapping is done as per the BXT WC data sheet.
Signed-off-by: Ajay Thomas
Signed-off-by: Bin Gao
---
drivers/acpi/Kconfig | 6 +
drivers/acpi/Makefile| 1 +
drivers/acpi/pmic
first approach.
Solution: Modified the policy enable function to take bit field as well.
The use of bit field is left to the pmic specific opregion driver.
Signed-off-by: Yegnesh Iyer
Signed-off-by: Bin Gao
---
drivers/acpi/pmic/intel_pmic.c | 13 +++--
drivers/acpi/pmic/intel_pmic.h
This series modifies the pen function signature to take bit field
and adds a new opregion driver for Intel BXT WhiskeyCove PMIC.
Yegnesh Iyer (1):
acpi/pmic: Modifying the pen function signature to take bit field
Ajay Thomas (1):
acpi/pmic: Add opregion driver for Intel BXT WhiskeyCove PMIC
This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
This driver is based on gpio-crystalcove.c.
Signed-off-by: Ajay Thomas
Signed-off-by: Bin Gao
---
drivers/gpio/Kconfig | 13 ++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-wcove.c | 402
On Thu, Jul 23, 2015 at 03:21:27PM -0700, Greg Kroah-Hartman wrote:
> > +config PCI_EARLY
> > + bool "Early PCI access"
> > + depends on PCI
> > + default n
>
> Default is always 'n' so this isn't needed here.
Will fix this.
> > diff --git a/drivers/tty/serial/serial_core.c
> > b/drivers/
x27;commit 5140fda16051 ("Specify PCI based UART for earlyprintk")'
is removed. And its equivalent function will be available from
uart8250 early console driver.
Signed-off-by: Bin Gao
---
Changes in v6:
- limited the early parameter 'earlyprintk' in drivers/tty/seri
the following line to the kernel command line
(assume baud rate is 115200):
earlyprintk=uart8250,pci32,0:24.2,115200n8
Signed-off-by: Bin Gao
---
Changes in v6: None
Changes in v5:
- updated Documentation/kernel-parameters.txt.
- moved earlyprintk= to patch 2/2 (requires x86 people's r
On Wed, Jun 03, 2015 at 08:35:29AM -0400, Peter Hurley wrote:
> > +/* x86 uses "earlyprintk=xxx", so we keep the compatibility here */
> > +#ifdef CONFIG_X86
> > +static int __init param_setup_earlycon_x86(char *buf)
> > +{
> > + return param_setup_earlycon(buf);
> > +}
> > +early_param("earlypri
On Wed, Jun 03, 2015 at 12:16:36AM +, Anderson, Stuart R wrote:
> Bin, et al,
>
> What we are losing here is the ability to specify a UART by its bus address
> instead of just supplying the memory or io address. There are some cases
> where this is useful, though I admit it is probably not goi
On Tue, Jun 02, 2015 at 01:37:52PM -0700, Yinghai Lu wrote:
> how about
> earlyprintk=serial,ttyS0
> earlyprintk=ttyS0
>
> Thanks
>
> Yinghai
Yes, both work.
-Bin
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Mor
On Tue, Jun 02, 2015 at 11:07:39PM +0200, Thomas Gleixner wrote:
> What about the memory mapped uarts which have been source of trouble
> in the past?
>
> Thanks,
>
> tglx
Not sure which specific early console you are referring to.
Currently we have serial, ttyS, vga, dbgp, xen, efi and pc
On Tue, Jun 02, 2015 at 11:46:02PM +0200, Ingo Molnar wrote:
> So the format on x86 used to be:
>
> earlyprintk=serial,ttyS0,115200
>
> does that work too?
>
> Thanks,
>
> Ingo
Just tested it, and yes it works.
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On Tue, Jun 02, 2015 at 01:54:33PM +0200, Ingo Molnar wrote:
>
> * Bin Gao wrote:
>
> > The arch independent uart8250 early console driver has good support for
> > memory
> > mapped and io port based 8250 uarts. Since pci is arch independent so it's
> >
x27;commit 5140fda16051 ("Specify PCI based UART for earlyprintk")'
is removed. And its equivalent function will be available from
uart8250 early console driver.
Signed-off-by: Bin Gao
---
Changes in v5:
- moved earlyprintk= (an alias to earlycon=) from patch 1/2 to patch 2/
the following line to the kernel command line
(assume baud rate is 115200):
earlyprintk=uart8250,pci32,0:24.2,115200n8
Signed-off-by: Bin Gao
---
Changes in v5:
- updated Documentation/kernel-parameters.txt.
- moved earlyprintk= to patch 2/2 (requires x86 people's review).
- rolled ba
On Wed, May 27, 2015 at 08:21:21PM -0400, Peter Hurley wrote:
> I meant that the patch hunk below should be moved to patch
> 2/2, and the purpose of patch 2/2 should be to replace x86-specific
> earlyprintk=pciserial with arch-independent earlyprintk=pciserial.
>
> There are 2 reasons for my sugge
On Sun, May 24, 2015 at 12:52:25PM -0700, Greg Kroah-Hartman wrote:
> > Signed-off-by: Bin Gao
> > ---
> > Changes in v4:
> > - moved PCI_EARLY definition from arch/x86/Kconfig to drivers/pci/Kconfig
> > - added 'earlyprintk' for x86 as alias to the ea
Peter Hurley,
First of all, thank you for your reviewing.
Please see my answers below.
On Tue, May 26, 2015 at 01:12:34PM -0400, Peter Hurley wrote:
> Hi Bin,
>
> Please don't drop lists (or other addressees) from patch revisions.
>
> [ +cc linux-serial]
Will fix this.
> Please update Document
x27;commit 5140fda16051 ("Specify PCI based UART for earlyprintk")'
is removed. And its equivalent function will be available from
uart8250 early console driver.
Signed-off-by: Bin Gao
---
arch/x86/kernel/early_printk.c | 180 -
1 file chang
the following line to the kernel command line
(assume baud rate is 115200):
earlyprintk=uart8250,pci32,0:24.2,115200n8
Signed-off-by: Bin Gao
---
Changes in v4:
- moved PCI_EARLY definition from arch/x86/Kconfig to drivers/pci/Kconfig
- added 'earlyprintk' for x86 as alias to the e
On Wed, May 20, 2015 at 09:31:45PM -0700, Greg Kroah-Hartman wrote:
> What changed in this version?
>
> You can't just put "v4" without giving us some hint as to the
> differences here, sorry.
I just resent [PATCH v4 1/2] with "Changes in v4" added.
There is no change for patch 2/2 since the firs
the following line to the kernel command line
(assume baud rate is 115200):
earlyprintk=uart8250,pci32,0:24.2,115200n8
Signed-off-by: Bin Gao
---
Changes in v4:
- moved PCI_EARLY definition from arch/x86/Kconfig to drivers/pci/Kconfig
- added 'earlyprintk' for x86 as alias to the e
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