://lore.kernel.org/lkml/1522665546-10035-1-git-send-email-radh...@xilinx.com
Signed-off-by: Radhey Shyam Pandey
---
drivers/net/ethernet/xilinx/xilinx_axienet.h | 141 +--
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 1050 -
2 files changed, 185 insertions(+), 1006
, remove axidma reg and interrupt properties from the ethernet
node. Just to highlight that these DT changes are not backward compatible
due to major driver restructuring/cleanup done in adopting the dmaengine
framework.
Signed-off-by: Radhey Shyam Pandey
---
.../devicetree/bindings/net
Convert the bindings document for Xilinx AXI Ethernet Subsystem
from txt to yaml. No changes to existing binding description.
Signed-off-by: Radhey Shyam Pandey
---
Pending: Fix below remaining dt_binding_check warning:
ethernet@40c0: 'device_type' does not match any of
the regexes
/kernel/1804.0/00367.html
This series is based on dmaengine tree commit: #a38fd8748464
Radhey Shyam Pandey (3):
dt-bindings: net: xilinx_axienet: convert bindings document to yaml
dt-bindings: net: xilinx_axienet: Introduce dmaengine binding support
net: axienet: Introduce dmaengine support
and merge it with frame completion interrupt.
Since by default interrupt delay timeout is disabled this feature
addition has no functional impact on VDMA and CDMA IP's.
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
- Read irq delay timeout value from DT.
- Merge interrupt processing for frame
Schedule tasklet with high priority to ensure that callback processing
is prioritized. It improves throughput for netdev dma clients.
Signed-off-by: Radhey Shyam Pandey
--
Changes for v2:
- None
---
drivers/dma/xilinx/xilinx_dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Increase AXI DMA transaction segments count to ensure that even in
high load we always get a free segment in prepare descriptor for a
DMA_SLAVE transaction.
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
- None
---
drivers/dma/xilinx/xilinx_dma.c | 2 +-
1 file changed, 1 insertion
-off-by: Radhey Shyam Pandey
---
- Check BD completion bit only for SG mode.
- Modify the logic to have early return path.
---
drivers/dma/xilinx/xilinx_dma.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index
Read DT property to check if AXI DMA is connected to streaming IP
i.e axiethernet. If connected pass AXI4-Stream control words to
dma client using metadata_ops dmaengine API.
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
- Use descriptor metadata API to pass control words to dma client
.
This property is useful when AXI DMA is connected to the streaming IP i.e
axiethernet where inter packet latency is critical while still taking the
benefit of interrupt coalescing.
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
- New patch. Introduce xlnx,irq-delay property for low latency
Shyam Pandey
---
Changes for v2:
- Rename xlnx,axieth-connected to xlnx,axistream-connected to
make it generic.
---
Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
b
irq-delay from DT.
- Remove desc_callback_valid check.
- Addressed RFC v1 comments[2].
- Minor code refactoring.
Comments, suggestions are very welcome!
[1] https://www.spinics.net/lists/dmaengine/msg16583.html
[2] https://www.spinics.net/lists/dmaengine/msg15208.html
Radhey Shyam Pandey (7
> -Original Message-
> From: Paul Thomas
> Sent: Saturday, January 16, 2021 1:00 AM
> To: Radhey Shyam Pandey
> Cc: Dan Williams ; Vinod Koul
> ; Michal Simek ; Matthew Murrian
> ; Romain Perier
> ; Krzysztof Kozlowski ; Marc
> Ferland ; Sebastian von Ohr
&g
> -Original Message-
> From: Paul Thomas
> Sent: Friday, January 8, 2021 9:27 PM
> To: Radhey Shyam Pandey
> Cc: Dan Williams ; Vinod Koul
> ; Michal Simek ; Matthew Murrian
> ; Romain Perier
> ; Krzysztof Kozlowski ; Marc
> Ferland ; Sebastian von Ohr
&g
> -Original Message-
> From: Radhey Shyam Pandey
> Sent: Monday, January 4, 2021 10:50 AM
> To: Paul Thomas ; Dan Williams
> ; Vinod Koul ; Michal Simek
> ; Matthew Murrian ;
> Romain Perier ; Krzysztof Kozlowski
> ; Marc Ferland ; Sebastian von Ohr
> ; dmaeng...
> -Original Message-
> From: Paul Thomas
> Sent: Monday, December 28, 2020 10:14 AM
> To: Dan Williams ; Vinod Koul
> ; Michal Simek ; Radhey Shyam
> Pandey ; Matthew Murrian
> ; Romain Perier
> ; Krzysztof Kozlowski ; Marc
> Ferland ; Sebastian von Ohr
&g
This patch series fix coverity warnings for xilinx_dma driver.
No functional change. These patches are picked from xilinx
linux tree and posted for upstream.
Changes for v2:
- Include fixes tag.
- In 3/3 patch keep typecasting changes in the same line.
Shravya Kumbham (3):
dmaengine:
Signed-off-by: Shravya Kumbham
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
- Include fixes tag.
- Keep typecasting changes in the same line to increase readability.
---
drivers/dma/xilinx/xilinx_dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/xilinx/xi
incompatible_param.
Fixes: 1a9e7a03c761 ("dmaengine: vdma: Add support for mulit-channel dma mode")
Signed-off-by: Shravya Kumbham
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
- Include fixes tag.
---
drivers/dma/xilinx/xilinx_dma.c | 3 ++-
1 file changed, 2 insertions(+),
ccess Engine
driver support")
Signed-off-by: Shravya Kumbham
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
- Include fixes tag.
---
drivers/dma/xilinx/xilinx_dma.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/
> -Original Message-
> From: Denis Kirjanov
> Sent: Tuesday, November 17, 2020 6:43 PM
> To: Radhey Shyam Pandey
> Cc: da...@davemloft.net; net...@vger.kernel.org; k...@kernel.org;
> Michal Simek ; mchehab+sams...@kernel.org;
> gre...@linuxfoundation.org; nicola
From: Shravya Kumbham
Typecast the fls(width -1) with (enum dmaengine_alignment) in
xilinx_dma_chan_probe function to fix the coverity warning.
Addresses-Coverity: Event mixed_enum_type.
Signed-off-by: Shravya Kumbham
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c | 3
incompatible_param.
Signed-off-by: Shravya Kumbham
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index e41435be5b79..cf75e2af6381 100644
From: Shravya Kumbham
dma_async_device_register() can return non-zero error code. Add
condition to check the return value of dma_async_device_register
function and handle the error path.
Addresses-Coverity: Event check_return.
Signed-off-by: Shravya Kumbham
Signed-off-by: Radhey Shyam Pandey
This patch series fix coverity warnings for xilinx_dma driver.
No functional change. These patches are picked from xilinx
linux tree and posted for upstream.
Shravya Kumbham (3):
dmaengine: xilinx_dma: check dma_async_device_register return value
dmaengine: xilinx_dma: fix incompatible param
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
- Change subject_prefix to target net tree.
- Add error handling for mdio_setup and remove phy_read changes.
Error checking of phy_read will be added along with phy_write
in a followup patch. Document the changes in commit description
> -Original Message-
> From: Jakub Kicinski
> Sent: Sunday, November 8, 2020 1:05 AM
> To: Radhey Shyam Pandey
> Cc: da...@davemloft.net; Michal Simek ;
> net...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org; git ; Shravya Kum
t;)
Signed-off-by: Matthew Murrian
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index ade4e6e1a5bd..993297d585c0 100644
--- a/d
ngine driver
support")
Signed-off-by: Matthew Murrian
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c | 29 -
1 file changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_d
of
readl_poll_timeout variant.
Signed-off-by: Marc Ferland
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 5429497d3560
This patchset fixes usage of mcdma tx segment and SG capability.
It also make use of readl_poll_timeout_atomic variant.
Marc Ferland (1):
dmaengine: xilinx_dma: use readl_poll_timeout_atomic variant
Matthew Murrian (2):
dmaengine: xilinx_dma: Fix usage of xilinx_aximcdma_tx_segment
From: Shravya Kumbham
Add ret variable, conditions to check the return value and it's error
path for of_address_to_resource() and phy_read() functions.
Addresses-Coverity: Event check_return value.
Signed-off-by: Shravya Kumbham
Signed-off-by: Radhey Shyam Pandey
---
drivers/net/ethernet
in device reset sequence.
Signed-off-by: Clayton Rayment
Signed-off-by: Radhey Shyam Pandey
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 21 --
drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c | 27 ++-
2 files changed, 25 insertions(+), 23 deletions
as dynamic MDC enable/disable is not supported in hw
we are implementing it in sw. This change doesn't affect any existing
functionality.
Clayton Rayment (1):
net: xilinx: axiethernet: Enable dynamic MDIO MDC
Radhey Shyam Pandey (1):
net: xilinx: axiethernet: Introduce helper functions for MDC
Introduce helper functions to enable/disable MDIO interface clock. This
change serves a preparatory patch for the coming feature to dynamically
control the management bus clock.
Signed-off-by: Radhey Shyam Pandey
---
drivers/net/ethernet/xilinx/xilinx_axienet.h | 2 ++
drivers/net
> -Original Message-
> From: Zhang Changzhong
> Sent: Monday, September 7, 2020 6:32 PM
> To: Radhey Shyam Pandey ; da...@davemloft.net;
> k...@kernel.org; Michal Simek
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: [PATCH net-next] net: xil
> -Original Message-
> From: Jakub Kicinski
> Sent: Tuesday, October 22, 2019 11:00 PM
> To: Michal Simek
> Cc: Radhey Shyam Pandey ; da...@davemloft.net;
> net...@vger.kernel.org; Anirudha Sarangi ; John Linn
> ; mchehab+sams...@kernel.org;
> gre...@linuxfo
with independent configuration.
Signed-off-by: Radhey Shyam Pandey
---
Keep compatible string one per line. Suggested by Rob.
Reuse the existing xlnx,axi-dma-* channel names. Suggested by Rob.
---
.../devicetree/bindings/dma/xilinx/xilinx_dma.txt | 15 +++
1 file changed, 11 insertions(+), 4
Extend dma_config structure to store irq routine handle. It enables runtime
handler selection based on xdma_ip_type and serves as preparatory patch for
adding MCDMA IP support.
Signed-off-by: Radhey Shyam Pandey
Suggested-by: Vinod Koul
---
Changes since RFC:
New patch. It serve
-off-by: Radhey Shyam Pandey
---
Changes since RFC:
New patch.
---
drivers/dma/xilinx/xilinx_dma.c | 155 +++-
1 file changed, 8 insertions(+), 147 deletions(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 41189b6
and receive channels. The driver supports
device_prep_slave_sg slave transfer mode.
Signed-off-by: Radhey Shyam Pandey
---
Changes since RFC:
Mention that xilinx_mcdma_start_transfer is called with lock held.
Remove bogus empty lines.
Fix xilinx_mcdma_prep_slave_sg indentation.
In mcdma slave_sg
is based on next and previous[3] axidma series.
[1]
https://www.xilinx.com/support/documentation/ip_documentation/axi_mcdma/v1_0/pg288-axi-mcdma.pdf
[2] https://spinics.net/lists/devicetree/msg242427.html
[3] https://www.spinics.net/lists/dmaengine/msg19910.html
Radhey Shyam Pandey (6):
dt
Trivial formatting(keep compatible string one per line, caps change etc).
It doesn't modify the content of the binding.
Signed-off-by: Radhey Shyam Pandey
---
Changes since RFC:
New patch. Trivial formatting (compatible string one per line) as
suggested by Rob in MCDMA RFC series
optional properties i.e xlnx,mcdma and dma-channels from
the binding description.
Signed-off-by: Radhey Shyam Pandey
---
Changes since RFC:
New patch.
---
Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 3 ---
1 file changed, 3 deletions(-)
diff --git a/Documentation/devicetree/bindings
xilinx axi_emac driver is supported on ZynqMP UltraScale platform.
So enable ARCH64 in kconfig. It also removes redundant ARCH_ZYNQ
dependency. Basic sanity testing is done on zu+ mpsoc zcu102
evaluation board.
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
Remove redundant ARCH_ZYNQ
xilinx axi_emac driver is supported on ZynqMP UltraScale platform(ARM64).
So enable it in kconfig. Basic sanity testing is done on zu+ mpsoc zcu102
evaluation board.
Signed-off-by: Radhey Shyam Pandey
---
drivers/net/ethernet/xilinx/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3
In descriptor cleanup the call to desc_callback_valid can be safely
removed as both callback pointers i.e callback_result and callback
are anyway checked in invoke(). There is no much benefit in having
redundant checks.
Signed-off-by: Radhey Shyam Pandey
Signed-off-by: Nicholas Graumann
From: Nicholas Graumann
Introduce a function that can calculate residues for IPs that support it:
AXI DMA and CDMA.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
Fix merge failure due to changes in previous patch.
Invoke xilinx_dma_get_residue only
terminating pending transactions
with xilinx_dma_terminate_all() and then submitting new transactions
without releasing and requesting the channel.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
None
---
drivers/dma/xilinx/xilinx_dma.c | 1 +
1 file changed, 1
they are
experiencing issues.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
None
---
drivers/dma/xilinx/xilinx_dma.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 932407a
From: Nicholas Graumann
The dma api provides a single interface to get the appropriate callback
and invoke it directly. Prefer using it.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
None
---
drivers/dma/xilinx/xilinx_dma.c | 5 +
1 file changed
the number of bytes
transferred.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
Invoke xilinx_dma_get_residue only for valid combination.
---
drivers/dma/xilinx/xilinx_dma.c | 26 +-
1 file changed, 25 insertions(+), 1 deletion(-)
diff
There is no use of storing channel data residue field. So clean it up.
In tx_status simply pass calculated residue to dma_set_residue.
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
New patch , derived from 5/7 dmaengine: xilinx_dma: Remove residue
from channel data.
---
drivers/dma
dmaengine: xilinx_dma: Introduce xilinx_dma_get_residue
dmaengine: xilinx_dma: Add callback_result support
dmaengine: xilinx_dma: Print debug message when no free tx segments
dmaengine: xilinx_dma: Clear desc_pendingcount in xilinx_dma_reset
Radhey Shyam Pandey (2):
dmaengine: xilinx_dma
> -Original Message-
> From: Radhey Shyam Pandey
> Sent: Friday, September 27, 2019 10:46 AM
> To: Vinod Koul
> Cc: dan.j.willi...@intel.com; Michal Simek ;
> nick.graum...@gmail.com; andrea.mere...@gmail.com; Appana Durga
> Kedareswara Rao ; mcg...@kernel.org;
> d
> -Original Message-
> From: Nicholas Graumann
> Sent: Friday, September 27, 2019 7:27 PM
> To: Radhey Shyam Pandey
> Cc: Vinod Koul ; dan.j.willi...@intel.com; Michal Simek
> ; andrea.mere...@gmail.com; Appana Durga
> Kedareswara Rao ; mcg...@kernel.org;
> d
> -Original Message-
> From: Vinod Koul
> Sent: Thursday, September 26, 2019 10:51 PM
> To: Radhey Shyam Pandey
> Cc: dan.j.willi...@intel.com; Michal Simek ;
> nick.graum...@gmail.com; andrea.mere...@gmail.com; Appana Durga
> Kedareswara Rao ; mcg...
> -Original Message-
> From: Vinod Koul
> Sent: Thursday, September 26, 2019 10:48 PM
> To: Radhey Shyam Pandey
> Cc: dan.j.willi...@intel.com; Michal Simek ;
> nick.graum...@gmail.com; andrea.mere...@gmail.com; Appana Durga
> Kedareswara Rao ; mcg...
In dma probe, the driver checks for devm_clk_get return and print error
message in the failing case. However for -EPROBE_DEFER this message is
confusing so avoid it.
Signed-off-by: Radhey Shyam Pandey
Signed-off-by: Michal Simek
---
drivers/dma/xilinx/xilinx_dma.c | 19 ++-
1
Replace the chain of platform_get_resource() and devm_ioremap_resource()
with devm_platform_ioremap_resource(). It simplifies the flow and there
is no functional change.
Fixes below cocinelle warning-
WARNING: Use devm_platform_ioremap_resource for xdev -> regs
Signed-off-by: Radhey Shyam Pan
In vdma_channel_set_config clear the delay, frame count and master mask
before updating their new values. It avoids programming incorrect state
when input parameters are different from default.
Signed-off-by: Radhey Shyam Pandey
Acked-by: Appana Durga Kedareswara rao
Signed-off-by: Michal Simek
In AXI DMA simple mode also pass MSB bits of source and destination
address to xilinx_write function. It fixes simple AXI DMA operation
mode using 64-bit addressing.
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions
This patchset fixes axidma simple mode 64-bit transfer.
It clears vdma control registers before update, in probe
use devm_platform API and remove clk_get error in case of
EPROBE_DEFER.
Radhey Shyam Pandey (4):
dmaengine: xilinx_dma: Fix 64-bit simple AXIDMA transfer
dmaengine: xilinx_dma
> -Original Message-
> From: Vinod Koul
> Sent: Thursday, September 26, 2019 2:31 AM
> To: Radhey Shyam Pandey
> Cc: dan.j.willi...@intel.com; Michal Simek ;
> nick.graum...@gmail.com; andrea.mere...@gmail.com; Appana Durga
> Kedareswara Rao ; mcg...
> -Original Message-
> From: Markus Elfring
> Sent: Friday, September 20, 2019 5:01 PM
> To: net...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; David S.
> Miller ; Michal Simek ;
> Radhey Shyam Pandey
> Cc: LKML ; kernel-janit...@vger.kernel.org
> Subj
> -Original Message-
> From: Markus Elfring
> Sent: Wednesday, September 18, 2019 7:01 PM
> To: net...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; David S.
> Miller ; Hans Ulli Kroll ;
> Hauke Mehrtens ; Linus Walleij
> ; Michal Simek ; Radhey
>
terminating pending transactions
with xilinx_dma_terminate_all() and then submitting new transactions
without releasing and requesting the channel.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Nicholas Graumann
When polling for a stopped transfer in AXI DMA mode, in some cases the
status of the channel may indicate IDLE instead of HALTED if the
channel was reset due to an error.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx
they are
experiencing issues.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index bf3fa2e..b5dd62a 100644
In descriptor cleanup the call to desc_callback_valid can be safely
removed as both callback pointers i.e callback_result and callback
are anyway checked in invoke(). There is no much benefit in having
redundant checks.
Signed-off-by: Radhey Shyam Pandey
Signed-off-by: Nicholas Graumann
From: Nicholas Graumann
Now that we track residues for each descriptor, there is no need to keep
track of the residue for each channel.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c | 6 ++
1 file changed, 2 insertions(+), 4
From: Nicholas Graumann
The dma api provides a single interface to get the appropriate callback
and invoke it directly. Prefer using it.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c | 5 +
1 file changed, 1 insertion(+), 4
the number of bytes
transferred.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index
From: Nicholas Graumann
Introduce a function that can calculate residues for IPs that support it:
AXI DMA and CDMA.
Signed-off-by: Nicholas Graumann
Signed-off-by: Radhey Shyam Pandey
---
drivers/dma/xilinx/xilinx_dma.c | 75 ++---
1 file changed, 56
: xilinx_dma: Remove residue from channel data
dmaengine: xilinx_dma: Print debug message when no free tx segments
dmaengine: xilinx_dma: Check for both idle and halted state in axidma
stop_transfer
dmaengine: xilinx_dma: Clear desc_pendingcount in xilinx_dma_reset
Radhey Shyam Pandey (1
I am maintaining xilinx axiethernet driver in xilinx tree and would like
to maintain it in the mainline kernel as well. Hence adding myself as a
maintainer. Also Anirudha and John has moved to new roles, so based on
request removing them from the maintainer list.
Signed-off-by: Radhey Shyam
> -Original Message-
> From: Andrea Merello
> Sent: Friday, November 16, 2018 7:26 PM
> To: vk...@kernel.org; dan.j.willi...@intel.com; dmaeng...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; Radhey Shyam Pandey
> ; Andrea Merello
> Subject: [
> -Original Message-
> From: Andrea Merello
> Sent: Friday, November 16, 2018 7:26 PM
> To: vk...@kernel.org; dan.j.willi...@intel.com; dmaeng...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; Radhey Shyam Pandey
> ; Andrea Merello
> Subject: [
> -Original Message-
> From: Vinod Koul
> Sent: Sunday, November 11, 2018 2:30 AM
> To: Radhey Shyam Pandey
> Cc: dan.j.willi...@intel.com; Michal Simek ; Appana
> Durga Kedareswara Rao ; dmaeng...@vger.kernel.org;
> linux-arm-ker...@lists.infradead.org; linux-k
> -Original Message-
> From: Vinod Koul
> Sent: Sunday, November 11, 2018 2:30 AM
> To: Radhey Shyam Pandey
> Cc: dan.j.willi...@intel.com; Michal Simek ; Appana
> Durga Kedareswara Rao ; dmaeng...@vger.kernel.org;
> linux-arm-ker...@lists.infradead.org; linux-k
Thanks for the review.
> On 31-07-18, 23:16, Radhey Shyam Pandey wrote:
> > struct xilinx_dma_config {
> > @@ -402,6 +470,7 @@ struct xilinx_dma_config {
> > int (*clk_init)(struct platform_device *pdev, struct clk **axi_clk,
> > struct clk **t
Thanks for the review.
> On 31-07-18, 23:16, Radhey Shyam Pandey wrote:
> > struct xilinx_dma_config {
> > @@ -402,6 +470,7 @@ struct xilinx_dma_config {
> > int (*clk_init)(struct platform_device *pdev, struct clk **axi_clk,
> > struct clk **t
In AXI CDMA simple mode also pass MSB bits of source and destination
address to xilinx_write function. This fixes simple CDMA operation
mode using 64-bit addressing.
Signed-off-by: Radhey Shyam Pandey
Signed-off-by: Michal Simek
---
Changes for v2:
Use helper macro for preparing dma_addr_t
In AXI CDMA simple mode also pass MSB bits of source and destination
address to xilinx_write function. This fixes simple CDMA operation
mode using 64-bit addressing.
Signed-off-by: Radhey Shyam Pandey
Signed-off-by: Michal Simek
---
Changes for v2:
Use helper macro for preparing dma_addr_t
.
Radhey Shyam Pandey (4):
dmaengine: xilinx_dma: Refactor axidma channel allocation
dmaengine: xilinx_dma: Refactor axidma channel validation
dmaengine: xilinx_dma: Introduce helper macro for preparing dma
address
dmaengine: xilinx_dma: Fix 64-bit simple CDMA transfer
drivers/dma
In axidma start_transfer, prefer checking channel states before
other params i.e pending_list. No functional change.
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
Modified the commit message to mark it as non-functional change.
---
drivers/dma/xilinx/xilinx_dma.c |4 ++--
1 files
In axidma alloc_chan_resources merge BD and cyclic BD allocation.
Signed-off-by: Radhey Shyam Pandey
Signed-off-by: Michal Simek
---
Changes for v2:
None
---
drivers/dma/xilinx/xilinx_dma.c | 36 ++--
1 files changed, 18 insertions(+), 18 deletions(-)
diff
This patch introduces the xilinx_prep_dma_addr_t macro which prepares
dma_addr_t from hardware buffer descriptor LSB and MSB fields. It will
be used in simple dma 64-bit programming sequence.
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
New patch- Preparatory change for 4/4 fix
.
Radhey Shyam Pandey (4):
dmaengine: xilinx_dma: Refactor axidma channel allocation
dmaengine: xilinx_dma: Refactor axidma channel validation
dmaengine: xilinx_dma: Introduce helper macro for preparing dma
address
dmaengine: xilinx_dma: Fix 64-bit simple CDMA transfer
drivers/dma
In axidma start_transfer, prefer checking channel states before
other params i.e pending_list. No functional change.
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
Modified the commit message to mark it as non-functional change.
---
drivers/dma/xilinx/xilinx_dma.c |4 ++--
1 files
In axidma alloc_chan_resources merge BD and cyclic BD allocation.
Signed-off-by: Radhey Shyam Pandey
Signed-off-by: Michal Simek
---
Changes for v2:
None
---
drivers/dma/xilinx/xilinx_dma.c | 36 ++--
1 files changed, 18 insertions(+), 18 deletions(-)
diff
This patch introduces the xilinx_prep_dma_addr_t macro which prepares
dma_addr_t from hardware buffer descriptor LSB and MSB fields. It will
be used in simple dma 64-bit programming sequence.
Signed-off-by: Radhey Shyam Pandey
---
Changes for v2:
New patch- Preparatory change for 4/4 fix
> > > > Yeah that part was clear but the implementation can be better..
> > I thought over it and it seems having a new interface dma_ctrl_write_64
> > taking lsb and msb bits input looks better and scalable. It will be similar
> > to existing vdma_desc_write_64 impl. I will send v2 if it looks
> > > > Yeah that part was clear but the implementation can be better..
> > I thought over it and it seems having a new interface dma_ctrl_write_64
> > taking lsb and msb bits input looks better and scalable. It will be similar
> > to existing vdma_desc_write_64 impl. I will send v2 if it looks
> > > > > - xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, hw-
> > > > >src_addr);
> > > > > - xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, hw-
> > > > >dest_addr);
> > > > > + xilinx_write(chan, XILINX_CDMA_REG_SRCADDR,
> > > > (dma_addr_t)
> > > > > +
> > > > > - xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, hw-
> > > > >src_addr);
> > > > > - xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, hw-
> > > > >dest_addr);
> > > > > + xilinx_write(chan, XILINX_CDMA_REG_SRCADDR,
> > > > (dma_addr_t)
> > > > > +
> Vinod,
>
> On 2018-08-29 19:22, Vinod wrote:
> + * 2. use dmaengine_desc_attach_metadata() to attach the buffer to
> the
> + * descriptor
> + * 3. submit the transfer
> + * - DMA_DEV_TO_MEM:
> + * 1. prepare the descriptor (dmaengine_prep_*)
> + * 2.
> Vinod,
>
> On 2018-08-29 19:22, Vinod wrote:
> + * 2. use dmaengine_desc_attach_metadata() to attach the buffer to
> the
> + * descriptor
> + * 3. submit the transfer
> + * - DMA_DEV_TO_MEM:
> + * 1. prepare the descriptor (dmaengine_prep_*)
> + * 2.
> -Original Message-
> From: Vinod
> Sent: Wednesday, August 29, 2018 9:31 AM
> To: Radhey Shyam Pandey
> Cc: dan.j.willi...@intel.com; Michal Simek ; Appana
> Durga Kedareswara Rao ; l...@metafoo.de;
> dmaeng...@vger.kernel.org; linux-arm-ker...@lists.infrad
> -Original Message-
> From: Vinod
> Sent: Wednesday, August 29, 2018 9:31 AM
> To: Radhey Shyam Pandey
> Cc: dan.j.willi...@intel.com; Michal Simek ; Appana
> Durga Kedareswara Rao ; l...@metafoo.de;
> dmaeng...@vger.kernel.org; linux-arm-ker...@lists.infrad
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