On Fri, 29 Jan 2021 17:01:35 +0100
Gregory CLEMENT wrote:
> Could you sent me the patch I don't have it in my emails boxes.
https://lore.kernel.org/lkml/20201112032149.21906-1-chris.pack...@alliedtelesis.co.nz/raw
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineer
On Tue, 26 Jan 2021 01:48:23 +
Chris Packham wrote:
> Hi All,
>
> On 12/11/20 9:02 pm, Thomas Petazzoni wrote:
> > On Thu, 12 Nov 2020 16:21:49 +1300
> > Chris Packham wrote:
> >
> >> make coccicheck complains:
> >>
> >>./dri
t for us at Bootlin, it happens pretty regularly to see users
of "legacy" platforms having a need for an updated kernel. From the
above, you can see that even legacy SoCs such as Spear600 and LPC32xx
are still used in products were kernel are being updated.
Best regards,
Thomas
--
Thom
if (cdns_pcie_host_wait_for_link(pcie))
> + return;
Here, shouldn't you return the status of
cdns_pcie_host_wait_for_link(), to propagate whether the PCIe link
indeed came up after the retrain ?
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
except
after your apply your PATCH 2/2. Is this correct ?
If so, this should be explained in this commit log: "Move the function
cdns_pcie_host_wait_for_link() further up in the file, as it's going to
be used by upcoming additional code in the driver."
Best regards,
Thomas
--
Thoma
nice so lets fix it.
>
> Signed-off-by: Chris Packham
Acked-by: Thomas Petazzoni
Thanks!
Thomas
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Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
the
effective value computed in two steps, it was already the case in the
current code:
/* Enable RX, TX, CTS change interrupts */
val = MAX310X_IRQ_RXEMPTY_BIT | MAX310X_IRQ_TXEMPTY_BIT;
max310x_port_write(port, MAX310X_IRQEN_REG, val | MAX310X_IRQ_CTS_BIT);
but granted, that's not
Hello,
On Wed, 28 Oct 2020 18:06:51 +0100
Thomas Petazzoni wrote:
> On my way to send a v3 :-)
Well, in fact the patch is upstream already:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/tty/serial/max310x.c?id=fce3c5c1a2d9cd888f2987662ce17c0c651916b2
[] = {
| ^~
Reported-by: Bjorn Helgaas
Signed-off-by: Thomas Petazzoni
---
drivers/pci/controller/dwc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/Kconfig
b/drivers/pci/controller/dwc/Kconfig
index 044a3761c44f
[] = {
| ^~~
Reported-by: Bjorn Helgaas
Signed-off-by: Thomas Petazzoni
---
drivers/pci/controller/dwc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/Kconfig
b/drivers/pci/controller/dwc/Kconfig
index 96994b715f26
to
receive 4 characters.
On a Microchip SAMA5D3 platform that is receiving 20 bytes every 16ms
over one MAX310X UART, this patch has allowed to reduce the CPU
consumption of the interrupt handler thread from ~25% to 6-7%.
Signed-off-by: Thomas Petazzoni
---
Changes since v1:
- Fix missing space
r & Reset FIFOs*/
> > - val = MAX310X_MODE2_RXEMPTINV_BIT | MAX310X_MODE2_FIFORST_BIT;
> > - max310x_port_write(port, MAX310X_MODE2_REG, val);
> > + /* Reset FIFOs*/
>
> Add a space before the asterisk.
Indeed. Let me know if a v2 is needed, or if this small
to
receive 4 characters.
On a Microchip SAMA5D3 platform that is receiving 20 bytes every 16ms
over one MAX310X UART, this patch has allowed to reduce the CPU
consumption of the interrupt handler thread from ~25% to 6-7%.
Signed-off-by: Thomas Petazzoni
---
drivers/tty/serial/max310x.c | 29
you were OK to switch from a R: to a M: line.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
property
Thanks a lot for this work. For a number of reasons, I'm less involved
in Marvell platform support in Linux, but I reviewed your series and
followed the discussions around it, and I'm happy to give my:
Acked-by: Thomas Petazzoni
for the whole series. The changes all seem sensible, and
al?
Since 5.7 is really close, I would suggest to disable the functionality.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
tlin have
> remained quiet.
Unfortunately, we are no longer actively working on Marvell platform
support at the moment. We might have a look on a best effort basis, but
this is potentially a non-trivial issue, so I'm not sure when we will
have the chance to investigate and fix this.
Best regards,
Thoma
x2-common.dtsi ?
> +// WMBUS (inverted with IO in the latest schematic)
I am not sure C++ comments are common in Device Tree files.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
nventional Reset
>
> Signed-off-by: Remi Pommarel
It is always a bit annoying to add another 100ms in the boot path, but
I don't see an easy alternative solution, so:
Acked-by: Thomas Petazzoni
Thomas
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Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
the timeout will never happen and will also cause
> the cpu to stall.
>
> This decrements a variable and wait instead of using jiffies.
>
> Signed-off-by: Remi Pommarel
Acked-by: Thomas Petazzoni
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
is getting close to the 20us timeout.
Shouldn't PIO_RETRY_CNT be kept at 500, so that we keep using a 1ms
timeout ?
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ding the arm-trusted-firmware fix. I reviewed
the implementation, and tested on my Armada 3720 DB board with a E1000E
NIC, and it all looks good to me.
Acked-by: Thomas Petazzoni
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
> should actually be cleared.
>
> Fixes: 8a3ebd8de328 ("PCI: aardvark: Implement emulated root PCI bridge
> config space")
> Signed-off-by: Remi Pommarel
Sorry for the long delay, but:
Acked-by: Thomas Petazzoni
I did verify that indeed the polarity of the PME interrupt bit
ime = 100800
[2.294690] time = 100800
[2.297405] time = 100800
We're jumping to 100us for every PIO read/write operation. To be
honest, I don't know if this is very important, there are not that many
PIO operations, and they are not used in any performance hot path. But
I thought it was wo
still some specific macros for this architecture in this
driver. Let's remove them.
==
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
of
> declaration [-Wold-style-declaration]
> const static struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
> ^
>
> Signed-off-by: Krzysztof Wilczynski
Acked-by: Thomas Petazzoni
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ic struct
> wiphy_iftype_ext_capab he_iftypes_ext_capa[] = {
> fs/unicode/utf8-selftest.c:const static struct {
> fs/unicode/utf8-selftest.c:const static struct {
>
> Those should probably be fixed, too (but in separate patches since
> other maintainers would take them).
>
> >
91d565550 ("PCI: Fix typos and whitespace errors").
>
> Signed-off-by: Krzysztof Wilczynski
> ---
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 2 +-
> Documentation/devicetree/bindings/pci/pci-armada8k.txt | 2 +-
For pci-armada8k.txt:
Acked-by: Thomas Peta
here's been some changes in how Busybox mdev works in recent times.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
e between
the mvebu and aardvark drivers, but this sharing has required making
the code very different, with lots of subtle differences in behavior in
how registers are emulated.
Unfortunately, I don't have access to one of these complicated PCI
setup with a HW switch on the way, so I couldn't test th
> should actually be cleared.
>
> Fixes: 6302bf3ef78d ("PCI: Init PCIe feature bits for managed host bridge
> alloc")
Are you sure about this Fixes tag ? This commit seems unrelated.
The commit introducing this issue is 8a3ebd8de328301aacbe328650a59253be2ac82c.
B
Armada 7K/8K, each PCIe interface is seen as an
independent root complex, so we have one PCIe I/O aperture and one PCIe
MEM aperture for each.
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
struct nand_onfi_vendor_macronix *mxic = (void *)p->onfi->vendor;
You are dereferencing p->info...
>
> if (!p->onfi)
> return;
... before you check it is NULL. This is wrong.
Please check again the code I sent in my previous e-mail:
struc
->info->vendor;
if ((mxic->reliability_func & MACRONIX_READ_RETRY_BIT) == 0)
return;
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ready at the
third indentation level.
To me, it is also more logical: we exclude the cases we are not
interested in and return early, and then if we are still in the case we
are interested, we handle it.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
; Signed-off-by: YueHaibing
Reviewed-by: Thomas Petazzoni
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
/lore.kernel.org/lkml/20190326044954.18671-1-and...@aj.id.au/
Best regards,
Thomas Petazzoni
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
s.
I'll have a look. In the mean time, I'm fine with the patch being
reverted.
Thanks,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
atch series in-flight for this project, and for several of
them, additional iterations were needed, so I kind of lost track of
this one. Sorry about that.
Thanks again,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
at intentionally does some PCI I/O accesses, that I use as a way to
validate that PCI I/O support is minimally working, but that's it.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
The SDHCI core is now properly checking for the state of a WP GPIO,
so there is no longer any need for the sdhci-omap code to implement
->get_ro() using mmc_gpio_get_ro().
Signed-off-by: Thomas Petazzoni
Reviewed-by: Thierry Reding
Acked-by: Adrian Hunter
---
Changes since v2:
- Added Ac
The SDHCI core is know properly checking for the state of a WP GPIO,
so there is no longer any need for the sdhci-tegra code to implement
->get_ro() using mmc_gpio_get_ro().
Signed-off-by: Thomas Petazzoni
Tested-by: Thierry Reding
Acked-by: Thierry Reding
Acked-by: Adrian Hunter
---
Chan
- Collect Reviewed-by/Tested-by/Acked-by tags.
Best regards,
Thomas
Thomas Petazzoni (3):
mmc: sdhci: use WP GPIO in sdhci_check_ro()
mmc: sdhci-omap: drop ->get_ro() implementation
mmc: sdhci-tegra: drop ->get_ro() implementation
drivers/mmc/host/sdhci-omap.c | 1 -
drivers/mmc/hos
nstead of pushing this to more controller-specific implementations,
let's handle this in the core SDHCI code, just like it is already done
for the CD GPIO in sdhci_get_cd().
The below patch simply changes sdhci_check_ro() to use the value of
the WP GPIO if available.
Signed-off-by: Thomas Petazzoni
---
C
by mdiobus_free()
So, if we were to use device_unregister() in the error path of
mdiobus_register() and in mdiobus_unregister(), it would break how
mdiobus_free() works.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
he ->prepare()
and ->unprepare() hooks. Thanks to this, a gate clock connected to a
GPIO on a GPIO expander can be controlled with the existing driver.
Signed-off-by: Thomas Petazzoni
---
drivers/clk/clk-gpio.c | 39 +--
1 file changed, 37 insertions(+), 2 deleti
The SDHCI core is now properly checking for the state of a WP GPIO,
so there is no longer any need for the sdhci-omap code to implement
->get_ro() using mmc_gpio_get_ro().
Signed-off-by: Thomas Petazzoni
Reviewed-by: Thierry Reding
---
Changes since v1:
- Added Reviewed-by from Thierry Red
- Call the ->get_ro() callback before using the WP GPIO in the core,
as suggested by Adrian Hunter.
- Fix typoes in commit logs.
- Collect Reviewed-by/Tested-by/Acked-by tags.
Best regards,
Thomas
Thomas Petazzoni (3):
mmc: sdhci: use WP GPIO in sdhci_check_ro()
mmc: sdhci-omap: drop
totype of the
function to use a mmc_host* as argument instead of sdhci_host*, since
the mmc_can_gpio_ro() and mmc_gpio_get_ro() helpers take a mmc_host*.
Signed-off-by: Thomas Petazzoni
---
Changes since v1:
- As suggested by Adrian Hunter, call the ->get_ro() if it exists
before falling back
The SDHCI core is know properly checking for the state of a WP GPIO,
so there is no longer any need for the sdhci-tegra code to implement
->get_ro() using mmc_gpio_get_ro().
Signed-off-by: Thomas Petazzoni
Tested-by: Thierry Reding
Acked-by: Thierry Reding
---
Changes since v1:
- Added Tes
remove this e-mail address from the MAINTAINERS file, and
update the status of the driver he was maintaining.
Signed-off-by: Thomas Petazzoni
---
MAINTAINERS | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index aee591104b5f..7bb92924757d 100644
Those hooks implement the exact same behavior as the default hooks by
gpiolib, so there is no point in having a duplicated definition in
gpio-bcm-kona.
Signed-off-by: Thomas Petazzoni
Cc: Ray Jui
Cc: Florian Fainelli
Cc: Scott Branden
Cc: bcm-kernel-feedback-l...@broadcom.com
---
Note
Those hooks implement the exact same behavior as the default hooks by
gpiolib, so there is no point in having a duplicated definition in
gpio-dwapb.
Signed-off-by: Thomas Petazzoni
Cc: Hoan Tran
---
Note: this commit was only build tested.
---
drivers/gpio/gpio-dwapb.c | 27
Those hooks implement the exact same behavior as the default hooks by
gpiolib, so there is no point in having a duplicated definition in
gpio-dwapb.
Signed-off-by: Thomas Petazzoni
---
Note: this commit was only build tested.
---
drivers/gpio/gpio-em.c | 25 -
1 file
patches have only been built-tested. Each is
Cc'ed to the appropriate maintainer, except gpio-em that has no
platform-specific maintainer.
Best regards,
Thomas Petazzoni
Thomas Petazzoni (3):
gpio: bcm-kona: drop ->irq_{request,release}_resources hooks
gpio: dwapb: drop ->irq_{request,r
espectively.
Signed-off-by: Thomas Petazzoni
---
drivers/gpio/gpio-zynq.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
index 3f5fcdd5a429..65c0c29ce851 100644
--- a/drivers/gpio/gpio-zynq.c
+++ b/drivers/gpio/gpio-
As suggested by Linus Walleij, let's use the new gpio_set_config()
helper in gpiod_set_debounce() and gpiod_set_transitory().
Signed-off-by: Thomas Petazzoni
---
drivers/gpio/gpiolib.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio
-up/pull-down, pull-up, pull-down.
Signed-off-by: Thomas Petazzoni
---
Documentation/devicetree/bindings/gpio/gpio.txt | 12
include/dt-bindings/gpio/gpio.h | 6 ++
2 files changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt
b
This commit adds a minimal implementation of the ->set_config() hook,
with support for the PIN_CONFIG_BIAS_PULL_UP and
PIN_CONFIG_BIAS_PULL_DOWN configurations.
Signed-off-by: Thomas Petazzoni
---
drivers/gpio/gpio-pca953x.c | 66 +++--
1 file changed,
,
where it is used to call the gpio_chip ->set_config callback with the
appropriate existing PIN_CONFIG_BIAS_* values.
Signed-off-by: Thomas Petazzoni
---
drivers/gpio/gpiolib-of.c| 5 +
drivers/gpio/gpiolib.c | 18 ++
drivers/gpio/gpiolib.h | 2 ++
incl
gpiod_direction_input().
Signed-off-by: Thomas Petazzoni
---
drivers/gpio/gpiolib.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 361a09c8138a..cf8a4402fef1 100644
--- a/drivers/gpio/gpiolib.c
have not kept your
Acked-by.
Thomas
[1] https://marc.info/?l=linux-gpio=154491873506701=2
Thomas Petazzoni (5):
dt-bindings: gpio: document the new pull-up/pull-down flags
gpio: rename gpio_set_drive_single_ended() to gpio_set_config()
gpio: use new gpio_set_config() helper in more places
e v2 instead, even though I believe it
should be functionally equivalent.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
d
always be called: "Always use put_device() to give up the reference
initialized in this function instead.".
What do you think?
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ehavior that
> > wasn't correct.
>
> Yes I it this makes sense to consider that this was incorrect behavior
> starting from the moment the dt bindings were formalized for the
> driver, which would be commit d7d30c911dd957e274c3da6910d4286862ab1d78.
>
> Do you think that would nake sense?
Up to the maintainer I'd say. I don't have any preference here.
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
* a WP GPIO, and in this case, we want ->get_ro
to take precedence. I'll send a v2 with this, once you let me know your
decision about the previous point.
Thanks,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
>parent, "usb-phy");
ci->usb_phy = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0);
if (IS_ERR(ci->usb_phy))
ci->usb_phy = devm_usb_get_phy(dev->parent, USB_PHY_TYPE_USB2);
?
Does this needs a "Fixes:" tag ? It's not fixing a regression because
nobody complained until now, but it's really fixing a behavior that
wasn't correct.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
device_del() invocation in the
error path.
Fixes: 69226896ad636 ("mdio_bus: Issue GPIO RESET to PHYs")
Signed-off-by: Thomas Petazzoni
---
drivers/net/phy/mdio_bus.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
index 2e59a8419b17..66
00-0020 6 Edge e0101000.sdhci cd
Signed-off-by: Thomas Petazzoni
---
drivers/gpio/gpio-pca953x.c | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 4f91ce497dd1..de52f63863db
;
handle IRQ support
This commit does just this change, reducing by one tab the indentation
level of the IRQ setup code. Thanks to this reduced indentation level,
we are less restricted by the 80-column limit, and we can have more
function arguments on the same line.
Signed-off-by: Thomas Petazzoni
The SDHCI core is know properly checking for the state of a WP GPIO,
so there is no longer any need for the sdhci-omap code to implement
->get_ro() using mmc_gpio_get_ro().
Signed-off-by: Thomas Petazzoni
---
Note: this patch has only been compiled tested, as I don't have the
hardware to t
totype of the
function to use a mmc_host* as argument instead of sdhci_host*, since
the mmc_can_gpio_ro() and mmc_gpio_get_ro() helpers take a mmc_host*.
Signed-off-by: Thomas Petazzoni
---
drivers/mmc/host/sdhci.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/mm
ite certainly indicates that the SDHCI WP
signal is not used, and the WP GPIO should be used instead.
As part of this series, two SDHCI drivers are modified to no longer
implement their custom ->get_ro() hook, since the core SDHCI now does
the right thing with the WP GPIO.
Best regards,
Thomas
The SDHCI core is know properly checking for the state of a WP GPIO,
so there is no longer any need for the sdhci-tegra code to implement
->get_ro() using mmc_gpio_get_ro().
Signed-off-by: Thomas Petazzoni
---
Note: this patch has only been compiled tested, as I don't have the
hardware to t
this in the core in fact :-) Though indeed you said
that the core could provide helpers.
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
it should entirely be the responsibility of
each GPIO controller driver. Having a mixed solution seems very
confusing.
Let me know which direction should be taken so that I can submit a
proper patch to hopefully resolve this issue.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
undefined!
>
> Unless someone complains, I will drop the dependency on COMPILE_TEST in
> Kconfig.
Keep COMPILE_TEST, and add:
depends on HAVE_ARM_SMCCC
perhaps ?
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ng on XDP support in mvneta, and this work
also needs to change parts of the memory allocation strategy in this
driver. I'd suggest to get in touch with those folks. Antoine can give
you the contact details, I don't have them off-hand. Or perhaps they
will see this e-mail :-)
Best regards,
Thomas
-
he SoC level (.dtsi), it should be within the
particular board that uses that pinmux configuration.
This is a rule that we have applied to mvebu platforms in general, and
which I believe is fairly common in many DTs.
Best regards,
Thomas
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Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel
ny
mini-PCIe devices at hand. On Armada XP GP, I verified that an E1000E
NIC was still working as expected. Therefore, it would be useful if
you could test on your ClearFog platform with PCI devices connected.
Thanks a lot and sorry for the delay.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Boot
ny
mini-PCIe devices at hand. On Armada XP GP, I verified that an E1000E
NIC was still working as expected. Therefore, it would be useful if
you could test on your ClearFog platform with PCI devices connected.
Thanks a lot and sorry for the delay.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Boot
bridge->align_resource = mvebu_pcie_align_resource;
bridge->msi = pcie->msi;
- return pci_host_probe(bridge);
+ return mvebu_pci_host_probe(bridge);
}
static const struct of_device_id mvebu_pcie_of_match_table[] = {
If that's what you meant, I'll go ahead
bridge->align_resource = mvebu_pcie_align_resource;
bridge->msi = pcie->msi;
- return pci_host_probe(bridge);
+ return mvebu_pci_host_probe(bridge);
}
static const struct of_device_id mvebu_pcie_of_match_table[] = {
If that's what you meant, I'll go ahead
pci_free_host_bridge(bridge);
+ return ret;
}
static const struct of_device_id mvebu_pcie_of_match_table[] = {
I.e, we simply ignore the failure of pci_host_probe().
To be honest, I really prefer the option of introducing pci_unmap_io().
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
pci_free_host_bridge(bridge);
+ return ret;
}
static const struct of_device_id mvebu_pcie_of_match_table[] = {
I.e, we simply ignore the failure of pci_host_probe().
To be honest, I really prefer the option of introducing pci_unmap_io().
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Bjorn, Lorenzo, what do you prefer ?
If we want to get rid of pci_ioremap_io(), then we need a way to tell
pci_remap_iospace() the memory attributes that should be used for the
mapping, because on Armada 38x, we need to map the I/O space mapped
MT_UNCACHED instead of MT_DEVICE. I'm not sure how to achieve this yet.
Should pgprot_device() be changed to return MT_UNCACHED on a
platform-specific basis ? Any other idea ?
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Bjorn, Lorenzo, what do you prefer ?
If we want to get rid of pci_ioremap_io(), then we need a way to tell
pci_remap_iospace() the memory attributes that should be used for the
mapping, because on Armada 38x, we need to map the I/O space mapped
MT_UNCACHED instead of MT_DEVICE. I'm not sure how to achieve this yet.
Should pgprot_device() be changed to return MT_UNCACHED on a
platform-specific basis ? Any other idea ?
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ou suggest to not
use the new pci_host_probe() API ?
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ou suggest to not
use the new pci_host_probe() API ?
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
but since
it didn't happen so far, I will send a proper patch series, hopefully
today.
Thanks for your reminder!
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
but since
it didn't happen so far, I will send a proper patch series, hopefully
today.
Thanks for your reminder!
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Hello,
On Thu, 13 Sep 2018 10:20:45 +0200, Jan Kundrát wrote:
> On čtvrtek 13. září 2018 9:45:15 CEST, Thomas Petazzoni wrote:
> > What about something like the below. I tested it, including the error
> > case by forcing an -EPROBE_DEFER. The new pci_unmap_io() is mo
Hello,
On Thu, 13 Sep 2018 10:20:45 +0200, Jan Kundrát wrote:
> On čtvrtek 13. září 2018 9:45:15 CEST, Thomas Petazzoni wrote:
> > What about something like the below. I tested it, including the error
> > case by forcing an -EPROBE_DEFER. The new pci_unmap_io() is mo
return pci_host_probe(bridge);
+ ret = pci_host_probe(bridge);
+ if (ret) {
+ mvebu_pcie_unmap_io(pcie);
+ return ret;
+ }
+
+ return 0;
}
static const struct of_device_id mvebu_pcie_of_match_table[] = {
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
return pci_host_probe(bridge);
+ ret = pci_host_probe(bridge);
+ if (ret) {
+ mvebu_pcie_unmap_io(pcie);
+ return ret;
+ }
+
+ return 0;
}
static const struct of_device_id mvebu_pcie_of_match_table[] = {
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
e 'W' taint means that there was a kernel warning before. Which
> warning was that?
>
> I reproduced the same Oops on Clearfog Base without any taint:
Thanks for the report, I'll have a look tomorrow when I have to
ClearFog hardware.
Thanks,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
e 'W' taint means that there was a kernel warning before. Which
> warning was that?
>
> I reproduced the same Oops on Clearfog Base without any taint:
Thanks for the report, I'll have a look tomorrow when I have to
ClearFog hardware.
Thanks,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Even though I did introduce the fbtft code in staging a while ago to
stop seeing this being developed out-of-tree, I don't intend to
maintain it, and I don't use it actively. So be honest and remove
myself from the MAINTAINERS file for this subsystem.
Signed-off-by: Thomas Petazzoni
Even though I did introduce the fbtft code in staging a while ago to
stop seeing this being developed out-of-tree, I don't intend to
maintain it, and I don't use it actively. So be honest and remove
myself from the MAINTAINERS file for this subsystem.
Signed-off-by: Thomas Petazzoni
IO line per
GPIO chip of 32 lines to be used as a PWM. Attempts to use more
return EBUSY.
Andrew, perhaps you could review the patch posted by Aditya, since you
already looked at PWM support on mvebu platforms ?
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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