> That would be a completely new and totally untested modus operandi for a
> large array of x86 CPUs. You should read the Intel manual about the
> recommended way to change MTRRs (Vol. 3A 10-41) - it describes disabling
I did -- that was the base I was working from.
BTW if you had read it clos
* Andi Kleen <[EMAIL PROTECTED]> wrote:
> > > It changes behaviour in some minor ways but I don't think it makes
> > > any difference. PGE only influences TLB flushes (according to its
> > > specification) and all the TLB flushes still run with PGE
> > > disabled.
> >
> > now that i pointed o
On Sat, Feb 09, 2008 at 10:40:37AM +0100, Ingo Molnar wrote:
>
> * Andi Kleen <[EMAIL PROTECTED]> wrote:
>
> > > because it's not just an open-coded __tlb_flush_all(), it _disables PGE
> > > and keeps it so while the MTRR's are changed on all CPUs_.
> >
> > Yes and?
>
> your first patch was o
* Andi Kleen <[EMAIL PROTECTED]> wrote:
> > because it's not just an open-coded __tlb_flush_all(), it _disables PGE
> > and keeps it so while the MTRR's are changed on all CPUs_.
>
> Yes and?
your first patch was outright wrong then you declared the second one a
"cleanup" while it changes be
> because it's not just an open-coded __tlb_flush_all(), it _disables PGE
> and keeps it so while the MTRR's are changed on all CPUs_.
Yes and?
>
> Your patch adds __flush_tlb_all() which re-enables the PGE bit in cr4,
> see asm-x86/tlbflush.h:
>
> /* clear PGE */
> write_cr4
* Andi Kleen <[EMAIL PROTECTED]> wrote:
> On Thu, Feb 07, 2008 at 08:13:37PM +0100, Ingo Molnar wrote:
> >
> > * Andi Kleen <[EMAIL PROTECTED]> wrote:
> >
> > > [probably stable material too]
> > >
> > > Use global TLB flushes in MTRR code
> > >
> > > Obviously kernel mappings should be flush
On Thu, Feb 07, 2008 at 08:13:37PM +0100, Ingo Molnar wrote:
>
> * Andi Kleen <[EMAIL PROTECTED]> wrote:
>
> > [probably stable material too]
> >
> > Use global TLB flushes in MTRR code
> >
> > Obviously kernel mappings should be flushed here too.
>
> no, your patch is not needed:
Yes you're
* Andi Kleen <[EMAIL PROTECTED]> wrote:
> [probably stable material too]
>
> Use global TLB flushes in MTRR code
>
> Obviously kernel mappings should be flushed here too.
no, your patch is not needed:
> /* Flush all TLBs via a mov %cr3, %reg; mov %reg, %cr3 */
> - __flush_tlb();
> +
and old-stable (eg 2.6.22)?
On 2/7/08, Andi Kleen <[EMAIL PROTECTED]> wrote:
> [probably stable material too]
>
> Use global TLB flushes in MTRR code
>
> Obviously kernel mappings should be flushed here too.
>
> Signed-off-by: Andi Kleen <[EMAIL PROTECTED]>
>
> ---
> arch/x86/kernel/cpu/mtrr/gene
[probably stable material too]
Use global TLB flushes in MTRR code
Obviously kernel mappings should be flushed here too.
Signed-off-by: Andi Kleen <[EMAIL PROTECTED]>
---
arch/x86/kernel/cpu/mtrr/generic.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Index: linux/arch/x86/kern
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