On Fri, Sep 28, 2018 at 05:07:04PM +0100, Alan Cox wrote:
> > > SILVERMONT_CLIENT 0x37 Baytrail, Valleyview
>
> There is no such product as Valleyview. Some things talk about
> Valleyview 2 but shouldn't as that is Baytrail.
I couldn't find it either, but it is all over the linux
> > SILVERMONT_CLIENT 0x37 Baytrail, Valleyview
There is no such product as Valleyview. Some things talk about
Valleyview 2 but shouldn't as that is Baytrail.
> /* "Small Core" Processors (Atom) */
>
> #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview
> */
>
On Thu, 27 Sep 2018, Peter Zijlstra wrote:
> On Thu, Sep 27, 2018 at 04:49:18PM +0200, Thomas Gleixner wrote:
> > > Subject: x86/cpu: Sanitize FAM6_ATOM naming
> > > From: Peter Zijlstra
> > > Date: Tue, 7 Aug 2018 10:17:27 -0700
> > >
> > > Going primarily by:
> > >
> > >
> > > https://en.w
On Thu, Sep 27, 2018 at 04:49:18PM +0200, Thomas Gleixner wrote:
> > Subject: x86/cpu: Sanitize FAM6_ATOM naming
> > From: Peter Zijlstra
> > Date: Tue, 7 Aug 2018 10:17:27 -0700
> >
> > Going primarily by:
> >
> >
> > https://en.wikipedia.org/wiki/List_of_Intel_Atom_microprocessors#Silvermon
On 09/27/2018 07:25 AM, Peter Zijlstra wrote:
> #define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */
> #define INTEL_FAM6_ATOM_GOLDMONT_X0x5F /* Denvertor */
> #define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */
s/Denvertor/Denverton/
But, yeah, that list looks consistent and
On Thu, 27 Sep 2018, Peter Zijlstra wrote:
> On Wed, Aug 08, 2018 at 07:14:52AM +0200, Thomas Gleixner wrote:
>
> > We have that for the big cores as well:
> >
> > #define INTEL_FAM6_HASWELL_CORE 0x3C
> > #define INTEL_FAM6_HASWELL_X0x3F
> > #define INTEL_FAM6_HASWELL_ULT
On Wed, Aug 08, 2018 at 07:14:52AM +0200, Thomas Gleixner wrote:
> We have that for the big cores as well:
>
> #define INTEL_FAM6_HASWELL_CORE 0x3C
> #define INTEL_FAM6_HASWELL_X0x3F
> #define INTEL_FAM6_HASWELL_ULT 0x45
> #define INTEL_FAM6_HASWELL_GT3E 0x46
On Wed, Aug 8, 2018 at 7:16 AM Thomas Gleixner wrote:
> On Tue, 7 Aug 2018, Andi Kleen wrote:
> > > It's even worse with Silvermont.
> > >
> > > So no, the interesting information is the UARCH and the variant of that,
> >
> > With Uarch you mean the core uarch? That doesn't really work for
> > so
On Tue, 7 Aug 2018, Andi Kleen wrote:
> > Which simply does not work. Look at Goldmont Fam 6 Model 5C. The SoCs
> > with that Fam/Model combination are:
> >
> > - Apollo Lake
> > - Broxton (has two platforms: Morganfield and Willowtrail)
>
> Right pick one. The others are the same for software
> Which simply does not work. Look at Goldmont Fam 6 Model 5C. The SoCs
> with that Fam/Model combination are:
>
> - Apollo Lake
> - Broxton (has two platforms: Morganfield and Willowtrail)
Right pick one. The others are the same for software purposes
and can be handled in the same way.
>
> I
On Tue, 7 Aug 2018, Andi Kleen wrote:
> On Tue, Aug 07, 2018 at 07:48:51PM +0200, Peter Zijlstra wrote:
> > On Tue, Aug 07, 2018 at 10:35:42AM -0700, Dave Hansen wrote:
> > > On 08/07/2018 10:17 AM, kan.li...@linux.intel.com wrote:
> > > > Denverton and Gemini Lake are platform names and should not
On Tue, Aug 07, 2018 at 11:37:36AM -0700, Andi Kleen wrote:
> On Tue, Aug 07, 2018 at 07:48:51PM +0200, Peter Zijlstra wrote:
> > On Tue, Aug 07, 2018 at 10:35:42AM -0700, Dave Hansen wrote:
> > > On 08/07/2018 10:17 AM, kan.li...@linux.intel.com wrote:
> > > > Denverton and Gemini Lake are platfor
On Tue, Aug 07, 2018 at 07:48:51PM +0200, Peter Zijlstra wrote:
> On Tue, Aug 07, 2018 at 10:35:42AM -0700, Dave Hansen wrote:
> > On 08/07/2018 10:17 AM, kan.li...@linux.intel.com wrote:
> > > Denverton and Gemini Lake are platform names and should not be used for
> > > Processor Family stuff. The
On Tue, Aug 07, 2018 at 10:17:27AM -0700, kan.li...@linux.intel.com wrote:
> From: Kan Liang
>
> Denverton and Gemini Lake are platform names and should not be used for
> Processor Family stuff. The microarchitecture codename should be used.
>
> DENVERTON is Goldmont server SoC. Rename DENVERTON
On 08/07/2018 10:48 AM, Peter Zijlstra wrote:
> On Tue, Aug 07, 2018 at 10:35:42AM -0700, Dave Hansen wrote:
>> On 08/07/2018 10:17 AM, kan.li...@linux.intel.com wrote:
>>> Denverton and Gemini Lake are platform names and should not be used for
>>> Processor Family stuff. The microarchitecture code
On Tue, Aug 07, 2018 at 10:35:42AM -0700, Dave Hansen wrote:
> On 08/07/2018 10:17 AM, kan.li...@linux.intel.com wrote:
> > Denverton and Gemini Lake are platform names and should not be used for
> > Processor Family stuff. The microarchitecture codename should be used.
>
> Why?
>
> Denverton is
On 08/07/2018 10:17 AM, kan.li...@linux.intel.com wrote:
> Denverton and Gemini Lake are platform names and should not be used for
> Processor Family stuff. The microarchitecture codename should be used.
Why?
Denverton is the platform. "Goldmont" is literally the
microarchitecture, and you are s
On Tue, Aug 07, 2018 at 10:17:27AM -0700, kan.li...@linux.intel.com wrote:
> From: Kan Liang
>
> Denverton and Gemini Lake are platform names and should not be used for
> Processor Family stuff. The microarchitecture codename should be used.
>
> DENVERTON is Goldmont server SoC. Rename DENVERTON
From: Kan Liang
Denverton and Gemini Lake are platform names and should not be used for
Processor Family stuff. The microarchitecture codename should be used.
DENVERTON is Goldmont server SoC. Rename DENVERTON to GOLDMONT2, similar
to SILVERMONT2 being the silvermont server SoCs.
Rename GEMINI_
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