Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On Mar 28, 2016, at 4:56 PM, Guenter Roeck wrote: > >> So taken from the timer offset 0x0208A000 I just have a generic counter >> register CPU0_APCS_GPT0_CNT at 0x8 >> >> What doc are you looking at? >> > "Qualcomm Snapdragon 600 Processor APQ8064 Hardware Register

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On Mar 28, 2016, at 4:56 PM, Guenter Roeck wrote: > >> So taken from the timer offset 0x0208A000 I just have a generic counter >> register CPU0_APCS_GPT0_CNT at 0x8 >> >> What doc are you looking at? >> > "Qualcomm Snapdragon 600 Processor APQ8064 Hardware Register Description" > > It is

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On Mon, Mar 28, 2016 at 03:40:58PM -0500, Matthew McClintock wrote: > On Mar 28, 2016, at 1:13 PM, Guenter Roeck wrote: > > > >>> bit 0 is the enable bit, and bit 1 enables interrupts. At address 0x08 (eg > >>> LPASS_QDSP6SS_WDOG_UNMASKED_INT_EN), bit 0 enables interrupts and

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On Mon, Mar 28, 2016 at 03:40:58PM -0500, Matthew McClintock wrote: > On Mar 28, 2016, at 1:13 PM, Guenter Roeck wrote: > > > >>> bit 0 is the enable bit, and bit 1 enables interrupts. At address 0x08 (eg > >>> LPASS_QDSP6SS_WDOG_UNMASKED_INT_EN), bit 0 enables interrupts and bit 1 is > >>>

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On Mar 28, 2016, at 1:13 PM, Guenter Roeck wrote: > >>> bit 0 is the enable bit, and bit 1 enables interrupts. At address 0x08 (eg >>> LPASS_QDSP6SS_WDOG_UNMASKED_INT_EN), bit 0 enables interrupts and bit 1 is >>> undefined. >> >> I honestly don’t see anything at 0x8 for

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On Mar 28, 2016, at 1:13 PM, Guenter Roeck wrote: > >>> bit 0 is the enable bit, and bit 1 enables interrupts. At address 0x08 (eg >>> LPASS_QDSP6SS_WDOG_UNMASKED_INT_EN), bit 0 enables interrupts and bit 1 is >>> undefined. >> >> I honestly don’t see anything at 0x8 for either blocks that

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On Mon, Mar 28, 2016 at 11:55:28AM -0500, Matthew McClintock wrote: > > > On Mar 25, 2016, at 11:23 AM, Guenter Roeck wrote: > > > >> -#define WDT_RST 0x38 > >> -#define WDT_EN0x40 > >> -#define WDT_BITE_TIME 0x5C > >> +enum wdt_reg { > >> +

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On Mon, Mar 28, 2016 at 11:55:28AM -0500, Matthew McClintock wrote: > > > On Mar 25, 2016, at 11:23 AM, Guenter Roeck wrote: > > > >> -#define WDT_RST 0x38 > >> -#define WDT_EN0x40 > >> -#define WDT_BITE_TIME 0x5C > >> +enum wdt_reg { > >> + WDT_RST, > >> + WDT_EN, >

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

> On Mar 25, 2016, at 11:23 AM, Guenter Roeck wrote: > >> -#define WDT_RST 0x38 >> -#define WDT_EN 0x40 >> -#define WDT_BITE_TIME 0x5C >> +enum wdt_reg { >> +WDT_RST, >> +WDT_EN, >> +WDT_BITE_TIME, >> +}; >> + >> +static const u32

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

> On Mar 25, 2016, at 11:23 AM, Guenter Roeck wrote: > >> -#define WDT_RST 0x38 >> -#define WDT_EN 0x40 >> -#define WDT_BITE_TIME 0x5C >> +enum wdt_reg { >> +WDT_RST, >> +WDT_EN, >> +WDT_BITE_TIME, >> +}; >> + >> +static const u32

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On Wed, Mar 23, 2016 at 05:05:02PM -0500, Matthew McClintock wrote: > Commit 0dfd582e026a ("watchdog: qcom: use timer devicetree binding") moved > to use the watchdog as a subset timer register block. Some devices have the > watchdog completely standalone with slightly different register offsets

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On Wed, Mar 23, 2016 at 05:05:02PM -0500, Matthew McClintock wrote: > Commit 0dfd582e026a ("watchdog: qcom: use timer devicetree binding") moved > to use the watchdog as a subset timer register block. Some devices have the > watchdog completely standalone with slightly different register offsets

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On 03/23, Matthew McClintock wrote: > @@ -202,13 +238,6 @@ static int qcom_wdt_remove(struct platform_device *pdev) > return 0; > } > > -static const struct of_device_id qcom_wdt_of_table[] = { > - { .compatible = "qcom,kpss-timer" }, > - { .compatible = "qcom,scss-timer" }, > -

Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On 03/23, Matthew McClintock wrote: > @@ -202,13 +238,6 @@ static int qcom_wdt_remove(struct platform_device *pdev) > return 0; > } > > -static const struct of_device_id qcom_wdt_of_table[] = { > - { .compatible = "qcom,kpss-timer" }, > - { .compatible = "qcom,scss-timer" }, > -

[PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

Commit 0dfd582e026a ("watchdog: qcom: use timer devicetree binding") moved to use the watchdog as a subset timer register block. Some devices have the watchdog completely standalone with slightly different register offsets as well so let's account for the differences here. Signed-off-by: Matthew

[PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

Commit 0dfd582e026a ("watchdog: qcom: use timer devicetree binding") moved to use the watchdog as a subset timer register block. Some devices have the watchdog completely standalone with slightly different register offsets as well so let's account for the differences here. Signed-off-by: Matthew