On Thu, Jan 28, 2021 at 03:57:58PM +0100, Peter Zijlstra wrote:
> On Thu, Jan 28, 2021 at 12:52:22PM +0100, Alexander Sverdlin wrote:
> > Hello Peter,
> >
> > On 28/01/2021 12:33, Peter Zijlstra wrote:
> > > This, from commit 6b07d38aaa52 ("MIPS: Octeon: Use optimized memory
> > > barrier
On Thu, Jan 28, 2021 at 01:09:39PM +0100, Alexander Sverdlin wrote:
> On 28/01/2021 12:33, Peter Zijlstra wrote:
> > On Thu, Jan 28, 2021 at 08:27:29AM +0100, Alexander Sverdlin wrote:
> >
> +#define __smp_store_release(p, v)
> \
> +do {
On Thu, Jan 28, 2021 at 12:52:22PM +0100, Alexander Sverdlin wrote:
> Hello Peter,
>
> On 28/01/2021 12:33, Peter Zijlstra wrote:
> > This, from commit 6b07d38aaa52 ("MIPS: Octeon: Use optimized memory
> > barrier primitives."):
> >
> > #define smp_mb__before_llsc() smp_wmb()
> > #define
Hi!
On 28/01/2021 12:33, Peter Zijlstra wrote:
> On Thu, Jan 28, 2021 at 08:27:29AM +0100, Alexander Sverdlin wrote:
>
+#define __smp_store_release(p, v) \
+do {
\
+
Hello Peter,
On 28/01/2021 12:33, Peter Zijlstra wrote:
> This, from commit 6b07d38aaa52 ("MIPS: Octeon: Use optimized memory
> barrier primitives."):
>
> #define smp_mb__before_llsc() smp_wmb()
> #define __smp_mb__before_llsc() __smp_wmb()
>
> is also dodgy as hell and really wants
On Thu, Jan 28, 2021 at 08:27:29AM +0100, Alexander Sverdlin wrote:
> >> +#define __smp_store_release(p, v) \
> >> +do {
> >> \
> >> + compiletime_assert_atomic_type(*p);
Hello Peter,
On 27/01/2021 23:32, Peter Zijlstra wrote:
>> Link: https://lore.kernel.org/lkml/5644d08d.4080...@caviumnetworks.com/
please, check the discussion pointed by the link above...
>> Signed-off-by: Alexander Sverdlin
>> ---
>> arch/mips/include/asm/barrier.h | 9 +
>> 1 file
On Wed, Jan 27, 2021 at 09:36:22PM +0100, Alexander A Sverdlin wrote:
> From: Alexander Sverdlin
>
> On Octeon smp_mb() translates to SYNC while wmb+rmb translates to SYNCW
> only. This brings around 10% performance on tight uncontended spinlock
> loops.
>
> Refer to commit 500c2e1fdbcc ("MIPS:
From: Alexander Sverdlin
On Octeon smp_mb() translates to SYNC while wmb+rmb translates to SYNCW
only. This brings around 10% performance on tight uncontended spinlock
loops.
Refer to commit 500c2e1fdbcc ("MIPS: Optimize spinlocks.") and the link
below.
On 6-core Octeon machine:
sysbench
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