Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Tue, Jan 05, 2016 at 02:37:48PM -0600, Thor Thayer wrote: > The CONFIG_EDAC_ALTERA_MC is a little confusing because it refers to the > Memory Controller (SDRAM) and uses that in the menu string(Altera SDRAM > Memory Controller EDAC). > > Would it be confusing to rename this CONFIG_EDAC_ALTERA,

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/05/2016 04:58 AM, Borislav Petkov wrote: On Mon, Jan 04, 2016 at 05:42:40PM -0600, Thor Thayer wrote: and then the defines are also used to conditionally include the L2 or OCRAM ECC functions because everything is in one file. So? You don't have to do those funny games in the

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 05:42:40PM -0600, Thor Thayer wrote: > and then the defines are also used to conditionally include the L2 or OCRAM > ECC functions because everything is in one file. So? You don't have to do those funny games in the Makefile. Instead, you have your main

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 05:42:40PM -0600, Thor Thayer wrote: > and then the defines are also used to conditionally include the L2 or OCRAM > ECC functions because everything is in one file. So? You don't have to do those funny games in the Makefile. Instead, you have your main

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Tue, Jan 05, 2016 at 02:37:48PM -0600, Thor Thayer wrote: > The CONFIG_EDAC_ALTERA_MC is a little confusing because it refers to the > Memory Controller (SDRAM) and uses that in the menu string(Altera SDRAM > Memory Controller EDAC). > > Would it be confusing to rename this CONFIG_EDAC_ALTERA,

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/05/2016 04:58 AM, Borislav Petkov wrote: On Mon, Jan 04, 2016 at 05:42:40PM -0600, Thor Thayer wrote: and then the defines are also used to conditionally include the L2 or OCRAM ECC functions because everything is in one file. So? You don't have to do those funny games in the

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/04/2016 04:01 PM, Borislav Petkov wrote: On Mon, Jan 04, 2016 at 03:33:23PM -0600, Thor Thayer wrote: The decision about ECC or non-ECC SDRAM is made before building the Linux image and must be matched to the appropriate bootloader (ECC or non-ECC). If ECC is desired for SDRAM, the

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 03:33:23PM -0600, Thor Thayer wrote: > The decision about ECC or non-ECC SDRAM is made before building the Linux > image and must be matched to the appropriate bootloader (ECC or non-ECC). > > If ECC is desired for SDRAM, the bootloader enables SDRAM ECC and then >

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/04/2016 03:07 PM, Borislav Petkov wrote: On Mon, Jan 04, 2016 at 02:55:43PM -0600, Dinh Nguyen wrote: Right. So for us, if we build in SDRAM ECC unconditionally, there is a requirement with the bootloader to turn on ECC and scrub the memory. Huh, how does a built-in piece of code

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/04/2016 02:59 PM, Borislav Petkov wrote: > On Mon, Jan 04, 2016 at 02:46:26PM -0600, Dinh Nguyen wrote: >> I don't see a way for the xgene to manually build for each configuration >> using Kconfig? For SoCFGPA, we would like to keep the option to build >> for each type of ECC. > > xgene

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 02:55:43PM -0600, Dinh Nguyen wrote: > Right. So for us, if we build in SDRAM ECC unconditionally, there is a > requirement with the bootloader to turn on ECC and scrub the memory. Huh, how does a built-in piece of code cause the bootloader to do something?!? And how

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 02:46:26PM -0600, Dinh Nguyen wrote: > I don't see a way for the xgene to manually build for each configuration > using Kconfig? For SoCFGPA, we would like to keep the option to build > for each type of ECC. xgene builds everything in and unconditionally. --

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/04/2016 02:30 PM, Borislav Petkov wrote: > On Mon, Jan 04, 2016 at 02:04:08PM -0600, Dinh Nguyen wrote: >> altr_edac.c originally added support for SDRAM. Now we're adding support >> for L2 and OCRAM into the same file by using #ifdef >> CONFIG_EDAC_ALTERA_OCRAM and CONFIG_EDAC_ALTERA_L2C.

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 02:04:08PM -0600, Dinh Nguyen wrote: > altr_edac.c originally added support for SDRAM. Now we're adding support > for L2 and OCRAM into the same file by using #ifdef > CONFIG_EDAC_ALTERA_OCRAM and CONFIG_EDAC_ALTERA_L2C. So "clean" was to > move the l2 and ocram

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/04/2016 01:46 PM, Borislav Petkov wrote: > On Mon, Jan 04, 2016 at 11:17:29AM -0600, Dinh Nguyen wrote: >> We tried to jam the L2 and OCRAM EDAC functionality in the same >> altr_edac.c file. It looks like it might be clean if we split out the L2 >> and OCRAM functions into their appropriate

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 11:17:29AM -0600, Dinh Nguyen wrote: > We tried to jam the L2 and OCRAM EDAC functionality in the same > altr_edac.c file. It looks like it might be clean if we split out the L2 > and OCRAM functions into their appropriate files(altr_edac_l2.c and > altr_edac_ocram.c). Do

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 11/19/2015 12:34 PM, Borislav Petkov wrote: > On Tue, Oct 27, 2015 at 03:38:12PM -0500, dingu...@opensource.altera.com > wrote: >> From: Thor Thayer >> >> Adding L2 Cache and On-Chip RAM EDAC support for the >> Altera SoCs using the EDAC device model. The SDRAM >> controller is using the

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 02:55:43PM -0600, Dinh Nguyen wrote: > Right. So for us, if we build in SDRAM ECC unconditionally, there is a > requirement with the bootloader to turn on ECC and scrub the memory. Huh, how does a built-in piece of code cause the bootloader to do something?!? And how

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 02:46:26PM -0600, Dinh Nguyen wrote: > I don't see a way for the xgene to manually build for each configuration > using Kconfig? For SoCFGPA, we would like to keep the option to build > for each type of ECC. xgene builds everything in and unconditionally. --

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/04/2016 02:30 PM, Borislav Petkov wrote: > On Mon, Jan 04, 2016 at 02:04:08PM -0600, Dinh Nguyen wrote: >> altr_edac.c originally added support for SDRAM. Now we're adding support >> for L2 and OCRAM into the same file by using #ifdef >> CONFIG_EDAC_ALTERA_OCRAM and CONFIG_EDAC_ALTERA_L2C.

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/04/2016 02:59 PM, Borislav Petkov wrote: > On Mon, Jan 04, 2016 at 02:46:26PM -0600, Dinh Nguyen wrote: >> I don't see a way for the xgene to manually build for each configuration >> using Kconfig? For SoCFGPA, we would like to keep the option to build >> for each type of ECC. > > xgene

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 02:04:08PM -0600, Dinh Nguyen wrote: > altr_edac.c originally added support for SDRAM. Now we're adding support > for L2 and OCRAM into the same file by using #ifdef > CONFIG_EDAC_ALTERA_OCRAM and CONFIG_EDAC_ALTERA_L2C. So "clean" was to > move the l2 and ocram

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/04/2016 01:46 PM, Borislav Petkov wrote: > On Mon, Jan 04, 2016 at 11:17:29AM -0600, Dinh Nguyen wrote: >> We tried to jam the L2 and OCRAM EDAC functionality in the same >> altr_edac.c file. It looks like it might be clean if we split out the L2 >> and OCRAM functions into their appropriate

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 11:17:29AM -0600, Dinh Nguyen wrote: > We tried to jam the L2 and OCRAM EDAC functionality in the same > altr_edac.c file. It looks like it might be clean if we split out the L2 > and OCRAM functions into their appropriate files(altr_edac_l2.c and > altr_edac_ocram.c). Do

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/04/2016 03:07 PM, Borislav Petkov wrote: On Mon, Jan 04, 2016 at 02:55:43PM -0600, Dinh Nguyen wrote: Right. So for us, if we build in SDRAM ECC unconditionally, there is a requirement with the bootloader to turn on ECC and scrub the memory. Huh, how does a built-in piece of code

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Mon, Jan 04, 2016 at 03:33:23PM -0600, Thor Thayer wrote: > The decision about ECC or non-ECC SDRAM is made before building the Linux > image and must be matched to the appropriate bootloader (ECC or non-ECC). > > If ECC is desired for SDRAM, the bootloader enables SDRAM ECC and then >

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 01/04/2016 04:01 PM, Borislav Petkov wrote: On Mon, Jan 04, 2016 at 03:33:23PM -0600, Thor Thayer wrote: The decision about ECC or non-ECC SDRAM is made before building the Linux image and must be matched to the appropriate bootloader (ECC or non-ECC). If ECC is desired for SDRAM, the

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On 11/19/2015 12:34 PM, Borislav Petkov wrote: > On Tue, Oct 27, 2015 at 03:38:12PM -0500, dingu...@opensource.altera.com > wrote: >> From: Thor Thayer >> >> Adding L2 Cache and On-Chip RAM EDAC support for the >> Altera SoCs using the EDAC device model. The SDRAM

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Tue, Oct 27, 2015 at 03:38:12PM -0500, dingu...@opensource.altera.com wrote: > From: Thor Thayer > > Adding L2 Cache and On-Chip RAM EDAC support for the > Altera SoCs using the EDAC device model. The SDRAM > controller is using the Memory Controller model. > > Each type of ECC is

Re: [PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

On Tue, Oct 27, 2015 at 03:38:12PM -0500, dingu...@opensource.altera.com wrote: > From: Thor Thayer > > Adding L2 Cache and On-Chip RAM EDAC support for the > Altera SoCs using the EDAC device model. The SDRAM > controller is using the Memory Controller model. >

[PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

From: Thor Thayer Adding L2 Cache and On-Chip RAM EDAC support for the Altera SoCs using the EDAC device model. The SDRAM controller is using the Memory Controller model. Each type of ECC is individually configurable. The SDRAM ECC is a separate Kconfig option because: 1) the SDRAM

[PATCHv7] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

From: Thor Thayer Adding L2 Cache and On-Chip RAM EDAC support for the Altera SoCs using the EDAC device model. The SDRAM controller is using the Memory Controller model. Each type of ECC is individually configurable. The SDRAM ECC is a separate Kconfig option