On Fri, Mar 23, 2018 at 6:31 PM, Andy Shevchenko
wrote:
> On Fri, Mar 23, 2018 at 6:21 PM, Stephen Boyd wrote:
>
>>bitmap_zero(chip->valid_mask, max_gpios);
>>for (i = 0; i < len; i++)
>>set_bit(tmp[i], chip->valid_mask);
>
> Looking to this code I just realized it
On Fri, Mar 23, 2018 at 6:21 PM, Stephen Boyd wrote:
>bitmap_zero(chip->valid_mask, max_gpios);
>for (i = 0; i < len; i++)
>set_bit(tmp[i], chip->valid_mask);
Looking to this code I just realized it would be nice to have
{of,device}_property_read_bitmask() where
On 03/23/2018 11:21 AM, Stephen Boyd wrote:
I'll send the updated patches now.
Thanks.
BTW, I just discovered that the static globals in pinctrl-msm are
breaking the ability to support more than one TLMM:
static struct pinctrl_desc msm_pinctrl_desc = {
static struct irq_chip msm_gpio_irq_c
Quoting Andy Shevchenko (2018-03-23 04:36:04)
> On Thu, 2018-03-22 at 19:16 -0500, Timur Tabi wrote:
> > On 03/21/2018 11:58 AM, Stephen Boyd wrote:
> > > +static int msm_gpio_init_valid_mask(struct gpio_chip *chip,
> > > + struct msm_pinctrl *pctrl)
> > > +{
> > > +
On 3/23/18 6:34 AM, Andy Shevchenko wrote:
No, it seems you missed %p vs. %px discussion.
The pointers printed by %p nowadays are hashed values, not the original
ones.
I totally forgot about that, thanks.
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc.
On Thu, 2018-03-22 at 19:16 -0500, Timur Tabi wrote:
> On 03/21/2018 11:58 AM, Stephen Boyd wrote:
> > +static int msm_gpio_init_valid_mask(struct gpio_chip *chip,
> > + struct msm_pinctrl *pctrl)
> > +{
> > + int ret;
> > + unsigned int len, i;
> > + unsigned in
On Thu, 2018-03-22 at 19:59 -0500, Timur Tabi wrote:
> On 03/22/2018 07:23 PM, Timur Tabi wrote:
> >
> > Also, you don't allocate chip->valid_mask anywhere.
>
> So I see now where it's allocated, but something is fishy.
No, it seems you missed %p vs. %px discussion.
The pointers printed by %p n
On 03/22/2018 07:23 PM, Timur Tabi wrote:
Also, you don't allocate chip->valid_mask anywhere.
So I see now where it's allocated, but something is fishy. I have three
TLMMs on my chip:
[ 67.107018] gpiochip_init_valid_mask:351 gpiochip->need_valid_mask=1
[ 67.153747] gpiochip_init_valid
On 03/22/2018 07:16 PM, Timur Tabi wrote:
This needs to be ret <= max_gpios, otherwise it will fail if every GPIO
is available.
And it should print an error message and return an error code if ret >
max_gpios.
Also, you don't allocate chip->valid_mask anywhere.
--
Qualcomm Datacenter Tech
On 03/21/2018 11:58 AM, Stephen Boyd wrote:
+static int msm_gpio_init_valid_mask(struct gpio_chip *chip,
+ struct msm_pinctrl *pctrl)
+{
+ int ret;
+ unsigned int len, i;
+ unsigned int max_gpios = pctrl->soc->ngpios;
+
+ /* The number of
On Wed, 2018-03-21 at 13:04 -0700, Stephen Boyd wrote:
> Quoting Andy Shevchenko (2018-03-21 11:07:09)
> > On Wed, 2018-03-21 at 09:58 -0700, Stephen Boyd wrote:
> > >
> Or ternary?
>
> return gpiochip_line_is_valid(chip, offset) ? 0 : -EINVAL;
Fine with me!
--
Andy Shevchenko
Intel Finlan
Quoting Stephen Boyd (2018-03-21 09:58:48)
> + ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0);
> + if (ret > 0 && ret < max_gpios) {
> + u16 *tmp;
> +
> + len = ret;
> + tmp = kmalloc_array(len, sizeof(tmp[0]), GFP_KERNEL);
>
Quoting Andy Shevchenko (2018-03-21 11:07:09)
> On Wed, 2018-03-21 at 09:58 -0700, Stephen Boyd wrote:
> > +static int msm_pinmux_request(struct pinctrl_dev *pctldev, unsigned
> > offset)
> > +{
> > + struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
> > + struct gpio_chip *chip
On Wed, 2018-03-21 at 09:58 -0700, Stephen Boyd wrote:
> From: Stephen Boyd
>
> Some qcom platforms make some GPIOs or pins unavailable for use
> by non-secure operating systems, and thus reading or writing the
> registers for those pins will cause access control issues and
> reset the device. Wi
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