" property in device-tree, it should be stuck.
If use the reset-names as reset controller for dwmmc controller,
it's more stable than now.
This commit is related with the below commit.
Fixes: d6786fefe816 ("mmc: dw_mmc: add reset support to dwmmc host controller")
Jaehoon Chun
: dw_mmc: add reset support to dwmmc host controller")
Signed-off-by: Jaehoon Chung
---
drivers/mmc/host/dw_mmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1c9ee36..a16c537 100644
--- a/drivers/mmc/host/dw_mm
We could also decide to start deprecate some of the
> existing sdhci bindings, if we think that makes sense.
>
> The downside is that we get a "magic" hex value in the dts. Although,
> people could address this issue by providing some comments about what
> the bits it m
On 10/31/2016 09:34 PM, Adrian Hunter wrote:
> On 31/10/16 13:59, Jaehoon Chung wrote:
>> On 10/28/2016 05:12 PM, Ulf Hansson wrote:
>>> On 25 October 2016 at 21:58, Zach Brown wrote:
>>>> On some systems the sdhci capabilty registers are incorrect for one
>>
If some ops-> callback function are not assigend, then it should do the
unexpect behavior.
To prevent the potential NULL pointer dereference, check the each
callback functions before doing operation.
Signed-off-by: Jaehoon Chung
---
drivers/phy/phy-core.c | 8
1 file changed
On 12/31/2016 12:56 AM, Krzysztof Kozlowski wrote:
> On Wed, Dec 28, 2016 at 07:34:50PM +0900, Jaehoon Chung wrote:
>> This patch is for using PHY generic framework.
>> When Exynos5440 had upstreamed, there was no PHY subsytem.
>> Now the using PHY framework is mandantory.
On 01/04/2017 03:05 AM, Rob Herring wrote:
> On Wed, Dec 28, 2016 at 07:34:52PM +0900, Jaehoon Chung wrote:
>> Adds the exynos-pcie-phy binding for Exynos PCIe PHY.
>> This is for using generic PHY framework.
>>
>> Signed-off-by: Jaehoon Chung
>> ---
>&g
On 01/04/2017 04:51 AM, Rob Herring wrote:
> On Wed, Dec 28, 2016 at 07:34:53PM +0900, Jaehoon Chung wrote:
>> According to using PHY framework, modified the exynos5440-pcie binding.
>> And use "config" property to follow the designware-pcie binding.
>
> You
pcie.
So this driver is based on Exynos5440 PCIe.
In future, will support the Other exynos SoCs likes exynos5433, exynos7.
Signed-off-by: Jaehoon Chung
---
Changelog on V2:
- Not include the codes relevant to pci-exynos.
- Remove the getting child node.
drivers/phy/Kconfig | 9
y, can see "mssing *config* reg space" message.
Because the getting configuration space address from range is old way.
NOTE: When use the "config" property, first name of 'reg-names' must be
set to "elbi". Otherwise driver can't maintain the backward c
This patch is for using PHY generic framework.
To maintain backward compatibility, check whether phy is supported or
not with 'using_phy'.
And if someone use the old dt-file, display the "deprecated" message.
But it's still working fine with it.
Signed-off-by: Jaehoon C
or removing the dependency
- Removes the unnecessary codes
- Change the patch's sequence
- Based on latest PCI git repository.(next branch)
Jaehoon Chung (5):
Documetation: samsung-phy: add the exynos-pcie-phy binding
phy: phy-exynos-pcie: Add support for Exynos PCIe phy
Documetation:
Adds the exynos-pcie-phy binding for Exynos PCIe PHY.
This is for using generic PHY framework.
Signed-off-by: Jaehoon Chung
---
Changelog on V2:
- Remove the child node.
- Add 2nd address to the parent reg prop.
Documentation/devicetree/bindings/phy/samsung-phy.txt | 17 +
1
Add phy-pcie node for using Exynos5440 pcie.
And use the reg-names as "elbi" and "config".
Because the getting configuratioin space address from ranges is old way.
It also is helpful to distinguish more clearly.
Signed-off-by: Jaehoon Chung
---
Changelog on V2:
- Removes th
This patch supports to use Generic Phy framework for Exynos PCIe phy.
When Exynos that supported the pcie want to use the PCIe,
it needs to control the phy resgister.
But it should be more complex to control in their own PCIe device drivers.
Signed-off-by: Jaehoon Chung
---
drivers/phy/Kconfig
Signed-off-by: Jaehoon Chung
---
.../devicetree/bindings/pci/exynos5433-pcie.txt| 36 ++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/exynos5433-pcie.txt
diff --git a/Documentation/devicetree/bindings/pci/exynos5433-pcie.txt
Exynos5433 supports the PCIe.
This patch adds new pci-exynos5433.c file for Exynos ARM64.
Signed-off-by: Jaehoon Chung
---
drivers/pci/host/Kconfig | 9 +
drivers/pci/host/Makefile | 1 +
drivers/pci/host/pci-exynos5433.c | 338 ++
3
1]
[0.968368] pci :00:00.0: bridge window [mem 0x0c20-0x0c7f]
[0.975241] pcieport :00:00.0: of_irq_parse_pci() failed with rc=-22
[0.982124] pcieport :00:00.0: Signaling PME through PCIe PME interrupt
Jaehoon Chung (6):
phy: exynos-pcie: Add support for Exynos P
Adds the exynos-pcie-phy binding for Exynos PCIe PHY.
This is for using generic PHY framework.
Signed-off-by: Jaehoon Chung
---
.../devicetree/bindings/phy/samsung-phy.txt | 21 +
1 file changed, 21 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy
To use the generic PHY framework, adds the pcie_phy node.
Signed-off-by: Jaehoon Chung
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
Add the Exxynos5433 pcie node for TM2.
This pcie device is used for supporting WiFi.
And some gpios are already requested from pinctrl. so it doesn't need to
initialize.
GPJ2-0 is used for supplying to WiFi PCIe chip.
Signed-off-by: Jaehoon Chung
---
arch/arm64/boot/dts/exynos/exyno
or other exynos,
I will rework with PHY generic framework. Then i will resend the my patches as
V2.
One more thing..Does anyone know what the usage of block base is?
Can i use that register as "syscon"?
Best Regards,
Jaehoon Chung
>
> No functional change intended.
>
> Signed-o
On 12/26/2016 06:02 PM, Jaehoon Chung wrote:
> Hi Pankaj,
>
> On 12/23/2016 07:56 PM, Pankaj Dubey wrote:
>> From: Niyas Ahmed S T
>>
>> Currently Exynos PCIe driver is only supported for Exynos5440 SoC.
>> This patch does refactoring of Exynos PCIe driver to e
Dear Alim,
On 12/26/2016 06:46 PM, Alim Akhtar wrote:
> Hello Jaehoon
>
> On 12/26/2016 02:32 PM, Jaehoon Chung wrote:
>> Hi Pankaj,
>>
>> On 12/23/2016 07:56 PM, Pankaj Dubey wrote:
>>> From: Niyas Ahmed S T
>>>
>>> Currently Exynos PCIe
Dear Jingoo,
On 12/26/2016 11:43 PM, Jingoo Han wrote:
> Jaehoon Chung wtote:
>>
>> Hi Pankaj,
>>
>> On 12/23/2016 07:56 PM, Pankaj Dubey wrote:
>>> From: Niyas Ahmed S T
>>>
>>> Currently Exynos PCIe driver is only supported for Exynos54
On 12/26/2016 08:49 PM, Joao Pinto wrote:
>
> Hello Jaehoon,
>
> Às 5:20 AM de 12/26/2016, Jaehoon Chung escreveu:
>> Exynos5433 supports the PCIe.
>> This patch adds new pci-exynos5433.c file for Exynos ARM64.
>>
>> Signed-off-by: Jaehoon Chung
On 12/27/2016 11:12 AM, Alim Akhtar wrote:
>
>
> On 12/27/2016 06:39 AM, Jaehoon Chung wrote:
>> Dear Alim,
>>
>> On 12/26/2016 06:46 PM, Alim Akhtar wrote:
>>> Hello Jaehoon
>>>
>>> On 12/26/2016 02:32 PM, Jaehoon Chung wrote:
>>>&g
On 12/27/2016 05:31 PM, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Thursday 22 December 2016 03:12 PM, Jaehoon Chung wrote:
>> If some ops-> callback function are not assigend, then it should do the
>> unexpect behavior.
>> To prevent the potential NULL point
ant to know maintainer's opinion..we can just touch a little for supporting
All Exynos SoCs.
Best Regards,
Jaehoon Chung
>
>> Maybe..Today or Tomorrow..I will send the patches..At that time, could you
>> also check them?
>> Any comments might be helpful to me! :)
>>
> Will wait for you patches :-)
>
>> Best Regards,
>> Jaehoon Chung
>>
[snip]
On 12/28/2016 01:11 AM, Krzysztof Kozlowski wrote:
> On Mon, Dec 26, 2016 at 02:20:26PM +0900, Jaehoon Chung wrote:
>> To use the generic PHY framework, adds the pcie_phy node.
>>
>> Signed-off-by: Jaehoon Chung
>> ---
>> arch/arm64/boot/dts/exynos/exynos5433.dt
On 12/28/2016 01:19 AM, Krzysztof Kozlowski wrote:
> On Mon, Dec 26, 2016 at 02:20:28PM +0900, Jaehoon Chung wrote:
>> Signed-off-by: Jaehoon Chung
>> ---
>> .../devicetree/bindings/pci/exynos5433-pcie.txt| 36
>> ++
>> 1 file changed,
On 12/28/2016 01:32 AM, Krzysztof Kozlowski wrote:
> On Mon, Dec 26, 2016 at 02:20:29PM +0900, Jaehoon Chung wrote:
>> Add the Exxynos5433 pcie node for TM2.
>> This pcie device is used for supporting WiFi.
>>
>> And some gpios are already requested from pin
Hi Vivek,
On 12/27/2016 02:53 PM, Vivek Gautam wrote:
> Hi Jaehoon,
>
>
> On Mon, Dec 26, 2016 at 10:50 AM, Jaehoon Chung
> wrote:
>> This patch supports to use Generic Phy framework for Exynos PCIe phy.
>> When Exynos that supported the pcie want to use the PCIe,
Hi Pankaj,
On 12/28/2016 12:10 PM, Pankaj Dubey wrote:
> Hi Jaehoon,
>
> On 27 December 2016 at 15:48, Jaehoon Chung wrote:
>> Dear Alim,
>>
>> On 12/27/2016 03:34 PM, Alim Akhtar wrote:
>>> Hi Jaehoon,
>>>
>> [snip]
>>>>
>>
Hi Vivek,
On 12/28/2016 05:58 PM, Vivek Gautam wrote:
> Hi Jaehoon,
>
> On Wed, Dec 28, 2016 at 8:19 AM, Jaehoon Chung wrote:
>> Hi Vivek,
>>
>> On 12/27/2016 02:53 PM, Vivek Gautam wrote:
>>> Hi Jaehoon,
>>>
>>>
>>> On Mon, Dec 2
Add phy-pcie node for using Exynos5440 pcie.
And some properies are changed to generic usage.
Signed-off-by: Jaehoon Chung
---
arch/arm/boot/dts/exynos5440.dtsi | 44 ++-
1 file changed, 34 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts
http://patchwork.ozlabs.org/patch/706998/
http://patchwork.ozlabs.org/patch/706997/
http://patchwork.ozlabs.org/patch/706995/
http://patchwork.ozlabs.org/patch/706994/
- Srinivas's patch
http://patchwork.ozlabs.org/patch/703530/
- Pankaj's patch
http://patchwork.ozlabs.org/patch/708414/
Jaehoon Chung (4)
According to using PHY framework, modified the exynos5440-pcie binding.
And use "config" property to follow the designware-pcie binding.
Signed-off-by: Jaehoon Chung
---
.../bindings/pci/samsung,exynos5440-pcie.txt | 29 +-
1 file changed, 17 inserti
-exynos.c.
Signed-off-by: Jaehoon Chung
---
drivers/pci/host/pci-exynos.c | 198 -
drivers/phy/Kconfig | 9 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-exynos-pcie.c | 289 ++
4 files changed, 321
Adds the exynos-pcie-phy binding for Exynos PCIe PHY.
This is for using generic PHY framework.
Signed-off-by: Jaehoon Chung
---
.../devicetree/bindings/phy/samsung-phy.txt| 23 ++
1 file changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy
en why?
Good way should be that finds the main reason and fixes it.
Not just revert.
Best Regards,
Jaehoon Chung
>
> Signed-off-by: Randy Li
> ---
> drivers/mmc/host/dw_mmc-rockchip.c | 41
> +++---
> 1 file changed, 3 insertions(+), 38 deletion
On 12/29/2016 12:02 PM, Jaehoon Chung wrote:
> Hi Randy,
>
> On 12/29/2016 12:34 AM, Randy Li wrote:
>> This reverts commit f90142683f04bcb0729bf0df67a5e29562b725b9.
>> It is reported that making RK3288 can't boot from eMMC/MMC.
>
> Could you explain in more
efine EXYNOS5433_PIN_DRV_LV4 3
Well, i'm not sure..but you needs to compare the other Exynos5 series.
it's difference bit Offset. Did you check it?
I didn't check pinctrl file..if it doesn't apply any exynos5433 pinctrl for
drv_strength.
it will work wrong..
Be
(slot req
> 10Hz, actual 93750HZ div = 1)
>
> looping here
>
> If I revert that patch, there are still lots of Bus speed messages, but
> finally would enter into system.
>
Plz..Don't put the comment on the top.
Which kernel did you use?
>
> On
On 12/30/2016 12:07 AM, ayaka wrote:
>
>
> On 12/29/2016 10:04 PM, Jaehoon Chung wrote:
>> Hi,
>>
>> On 12/29/2016 09:55 PM, ayaka wrote:
>>> [5.849733] rk_gmac-dwmac ff29.ethernet (unnamed net_device)
>>> (uninitialized): Enable RX Mitig
On 12/30/2016 11:44 AM, Randy Li wrote:
>
>
> On 12/30/2016 10:35 AM, Jaehoon Chung wrote:
>> On 12/30/2016 12:07 AM, ayaka wrote:
>>>
>>>
>>> On 12/29/2016 10:04 PM, Jaehoon Chung wrote:
>>>> Hi,
>>>>
>>>> On 12/29/20
On 12/02/2016 09:14 AM, Sergio Prado wrote:
> Adds the device tree bindings description for Samsung S3C24XX
> MMC/SD/SDIO controller, used as a connectivity interface with external
> MMC, SD and SDIO storage mediums.
>
> Signed-off-by: Sergio Prado
> ---
> .../devicetree/bindings/mmc/samsung,s3c
goal is to apply the pcie-exynos5433 into v4.11.
Jaehoon Chung (4):
PCI: exynos: replace to one register accessor from each accessors
PCI: exynos: Remove the unnecessary variables
PCI: exynos: Use the bitops API to operate the bit shifting
PCI: exynos: remove the duplicated codes
drivers
Just use the bitops api to operate the bit.
Signed-off-by: Jaehoon Chung
---
drivers/pci/host/pci-exynos.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
index d64e8f1..d705bfe 100644
Removed the duplicated codes.
It can use the more simply than now.
Signed-off-by: Jaehoon Chung
---
drivers/pci/host/pci-exynos.c | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
index
There is no reason to maintain *_blk/phy/elbi_* as register accessors.
It can be replaced to one register accessor.
Signed-off-by: Jaehoon Chung
---
drivers/pci/host/pci-exynos.c | 214 +++---
1 file changed, 97 insertions(+), 117 deletions(-)
diff --git a
Remove the unnecessary variables(elbi/phy/block_base).
It needs one resource structure for assigning each resource.
So it replaces with one 'res' variable.
Signed-off-by: Jaehoon Chung
---
drivers/pci/host/pci-exynos.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletion
Remove the unnecessary variables(elbi/phy/block_base).
It needs one resource structure for assigning each resource.
So it replaces with one 'res' variable.
Signed-off-by: Jaehoon Chung
---
drivers/pci/host/pci-exynos.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletion
Just use the bitops api to operate the bit.
Signed-off-by: Jaehoon Chung
---
drivers/pci/host/pci-exynos.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
index d64e8f1..d705bfe 100644
Removed the duplicated codes.
It can use the more simply than now.
Signed-off-by: Jaehoon Chung
---
drivers/pci/host/pci-exynos.c | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
index
goal is to apply the pcie-exynos5433 into v4.11.
Jaehoon Chung (4):
PCI: exynos: replace to one register accessor from each accessors
PCI: exynos: Remove the unnecessary variables
PCI: exynos: Use the bitops API to operate the bit shifting
PCI: exynos: remove the duplicated codes
drivers
There is no reason to maintain *_blk/phy/elbi_* as register accessors.
It can be replaced to one register accessor.
Signed-off-by: Jaehoon Chung
---
drivers/pci/host/pci-exynos.c | 214 +++---
1 file changed, 97 insertions(+), 117 deletions(-)
diff --git a
Add the mshc_2 node for supporting T-flash.
And it needs to add the "mshc*" aliases. Because dwmmc driver should be
assigned to "ctrl_id" after parsing to "mshc".
If there is no aliases for mshc, then it might be set to the wrong
capabilities.
Signed-off-by: Jaeh
using exteranl cd-gpio.)
Fixes: fb1aeedb61ad ("ARM: dts: add mmc detect gpio for exynos5422-odroidxu3")
Signed-off-by: Jaehoon Chung
---
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.d
On 11/22/2016 02:06 AM, Krzysztof Kozlowski wrote:
> On Mon, Nov 21, 2016 at 04:10:32PM +0900, Jaehoon Chung wrote:
>> Odroid-xu3/4 didn't need to use the cd-gpios for detecting card.
>> Because Host controller has the CDETECT register through SDx_CDN line.
>> Host contro
t_init(struct pcie_port *pp)
> +static int dw_plat_pcie_host_init(struct pcie_port *pp)
> {
> + int ret;
> +
> dw_pcie_setup_rc(pp);
> - dw_pcie_wait_for_link(pp);
> + ret = dw_pcie_wait_for_link(pp);
> + if (ret)
> + return ret;
>
&
so unconditional calls to
>>> reset_control_assert, with disabled RESET_CONTROLLER it will cause
>>> unexpected WARNs.
>>> Anyway if you change reset API as above I think you should remove all
>>> warns from reset stubs, because NULL reset is valid, but these warns are
>>> there for reason - contradiction.
>>
>> You are right, I have to let go of those, too.
>
>
> Until fixed, I have dropped the three changes from my next branch
> related to this. Please re-post when fixed.
I missed this patch. If resend the patch, i will check.
Best Regards,
Jaehoon Chung
>
> Kind regards
> Uffe
>
>>
>> regards
>> Philipp
>>
>
>
>
There are same conditions for checking whether supporting clkscaling or
not.
When ufshcd is supporting clkscaling, active_reqs should be decreased by
two.
Signed-off-by: Jaehoon Chung
---
drivers/scsi/ufs/ufshcd.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/scsi/ufs/ufshcd.c b
know ext_csd revision information,
attribute name might be more clearly.
e,g) ext_csd_rev?
It's my preference. :)
Best Regards,
Jaehoon Chung
> MMC_DEV_ATTR(pre_eol_info, "%02x\n", card->ext_csd.pre_eol_info);
> MMC_DEV_ATTR(life_time, "0x%02x 0x%02
Even though using phy framework, it has to get the elbi_base.
Before this patch, elbi_base should be NULL pointer.
Fixes: e7cd7ef58e1f ("PCI: exynos: Support the PHY generic framework")
Signed-off-by: Jaehoon Chung
---
drivers/pci/dwc/pci-exynos.c | 8
1 file changed, 4
When it doesn't get the blk_base's resource, it was returned
the error about phy_base, not blk_base.
This patch is for fixing the wrong error return about blk_base.
Fixes: cf0adb8e281b ("phy: phy-exynos-pcie: Add support for Exynos PCIe PHY")
Signed-off-by: Jaehoon Chung
Make the "samsung" directory and move the Samsung specific files to
there for maintaining the files relevant to Samsung.
Signed-off-by: Jaehoon Chung
---
drivers/phy/Kconfig | 96 +--
drivers/phy/Makefile
Hi All,
On 03/09/2017 09:10 PM, Krzysztof Kozlowski wrote:
> On Thu, Mar 9, 2017 at 1:56 PM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On Thursday 09 March 2017 05:03 PM, Jaehoon Chung wrote:
>>> Make the "samsung" directory and move the Samsung specifi
Hi Vivek,
On 03/12/2017 06:18 PM, Vivek Gautam wrote:
> Hi Kishon,
>
>
> On Thu, Mar 9, 2017 at 5:26 PM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On Thursday 09 March 2017 05:03 PM, Jaehoon Chung wrote:
>>> Make the "samsung" directory and
hen-Yu Tsai
> Cc: Sylwester Nawrocki
> Cc: Krzysztof Kozlowski
> Cc: Jaehoon Chung
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linux-arm-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-o...@vger.kernel.org
> Cc: linux-renesas-...@vger.kernel.org
> Cc
On 03/03/2017 08:38 PM, Sergio Prado wrote:
> On Fri, Mar 03, 2017 at 11:14:29AM +0900, Jaehoon Chung wrote:
>> On 03/02/2017 10:18 AM, Sergio Prado wrote:
>>> Allows configuring Samsung S3C24XX MMC/SD/SDIO controller using a device
>>> tree.
>>
Hi Seung-Woo,
On 06/10/2016 10:29 AM, Seung-Woo Kim wrote:
> Hi Jaehoon,
>
> On 2016년 06월 09일 21:38, Jaehoon Chung wrote:
>> Hi Seung-Woo,
>>
>> On 06/08/2016 01:07 PM, Seung-Woo Kim wrote:
>>> This patch removes following UBSAN warnings in dw_mci_setup_bus().
Hi,
On 11/02/2016 06:56 AM, John Stultz wrote:
> On Sun, Oct 30, 2016 at 7:49 PM, Jaehoon Chung wrote:
>> This patch adds the "reset-names" as reset controller for dwmmc controller.
>> Linaro guys had reported the issue about booting stuck.
>>
>> Some SoCs ar
"supports-highspeed"
- Remove the "clock-freq-min-max" property. Instead, use "max-frequency"
- Minimum clock value is set to 100K by default.
Jaehoon Chung (13):
mmc: dw_mmc: display the real register value on debugfs
mmc: dw_mmc: fix the debug message for checkin
In drivers/mmc/core/host.c, there is "max-frequency" property.
It should be same behavior. So Use the "max-frequency" instead of
"clock-freq-min-max".
Signed-off-by: Jaehoon Chung
---
arch/arm/boot/dts/exynos3250-artik5-eval.dts | 2 +-
arch/arm/boot/dts/exynos325
In drivers/mmc/core/host.c, there is "max-frequency" property.
It should be same behavior. So use the "max-frequency" instead of
"clock-freq-min-max".
Signed-off-by: Jaehoon Chung
---
arch/arm/boot/dts/rk3036.dtsi | 6 +++---
arch/arm/boot/dts/rk322x.dtsi | 2 +-
In drivers/mmc/core/host.c, there is "max-freqeuncy" property.
It should be same behavior, So Use the "max-frequency" instead of
"clock-freq-min-max".
Signed-off-by: Jaehoon Chung
---
arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts | 2 +-
arch/arm64
Remove the unnecessary mmc_data structure.
Instead, cmd->data can be used.
Signed-off-by: Jaehoon Chung
---
drivers/mmc/host/dw_mmc.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index df151c8..bd8c5ea 100
"support-highspeed" was the obsoleted property.
And "broken-cd" is not synopsys specific property.
It can be referred to mmc.txt binding Documentation.
Signed-off-by: Jaehoon Chung
---
Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 5 -
1 file changed,
o 100K until finding correct value.
It's why Minimum value puts 100K by default.
Signed-off-by: Jaehoon Chung
---
Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 3 ---
drivers/mmc/host/dw_mmc.c | 13 -
2 files changed, 4 insertions(+), 12
Developer wants to see the real register value, not register offset.
This patch fixed to display the real value of register.
Signed-off-by: Jaehoon Chung
---
drivers/mmc/host/dw_mmc.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b
If there is no property "clock-freq-min-max", mmc->f_min should be set
to 400K by default. But Some SoC can be used 100K.
When 100K is used, MMC core will try to check from 400K to 100K.
Reported-by: Shawn Lin
Signed-off-by: Jaehoon Chung
---
drivers/mmc/host/dw_mmc.c | 2 +-
1 fi
stop_cmdr should be set to values relevant to stop command.
It migth be assigned to values whatever there is mrq->stop or not.
Then it doesn't need to use dw_mci_prepare_command().
It's enough to use the prep_stop_abort for preparing stop command.
Signed-off-by: Jaehoon Chung
---
It's not for only sdhci controller.
So it can be moved from sdhci.h to mmc.h. And renamed from sdhci_cookie
to mmc_cookie.
Signed-off-by: Jaehoon Chung
---
drivers/mmc/host/sdhci.h | 6 --
include/linux/mmc/core.h | 6 ++
2 files changed, 6 insertions(+), 6 deletions(-)
diff --
This patch removed the meaningless value. Instead, use the cookie's enum
values for executing correctly.
Signed-off-by: Jaehoon Chung
---
drivers/mmc/host/dw_mmc.c | 39 +++
1 file changed, 19 insertions(+), 20 deletions(-)
diff --git a/drivers/mmc
If DW_MMC_CARD_NO_USE_HOLD isn't set, it's usesd by default.
Enve if SDMMC_CMD_USB_HOLD_REG is set in prepare_command(), but it
doesn't set in pre_stop_abort().
To maintain the consistency, add the checking condition for this.
Signed-off-by: Jaehoon Chung
---
drivers/mmc/ho
If display the debug message, this message should be spamming.
If flags is maintained the previous value, didn't display the debug
message.
Signed-off-by: Jaehoon Chung
---
drivers/mmc/host/dw_mmc.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc
Hi Heiko.
On 11/03/2016 05:20 PM, Heiko Stübner wrote:
> Hi Jaehoon,
>
> Am Donnerstag, 3. November 2016, 15:21:31 schrieb Jaehoon Chung:
>> Remove the "clock-freq-min-max" property.
>> There is "max-frequency" property in drivers/mmc/core/host.c
>&g
On 11/04/2016 03:41 AM, Krzysztof Kozlowski wrote:
> On Thu, Nov 03, 2016 at 03:21:32PM +0900, Jaehoon Chung wrote:
>> In drivers/mmc/core/host.c, there is "max-frequency" property.
>> It should be same behavior. So Use the "max-frequency" instead of
>>
On 11/05/2016 12:04 AM, Krzysztof Kozlowski wrote:
> On Fri, Nov 04, 2016 at 12:19:49PM +0100, Heiko Stuebner wrote:
>> Hi Jaehoon,
>>
>> Am Freitag, 4. November 2016, 19:21:30 CET schrieb Jaehoon Chung:
>>> On 11/04/2016 03:41 AM, Krzysztof Kozlowski wrote:
>>&
t s3c2440_compatible;
> +};
I didn't understand why this structure needs.
Before this patch,
host->is2440;
After this patch,
host->variant->s3c2440_compatible;
Just add the one pointer for checking s3c2400 compatible..
Is it really meaningful?
(I didn't read the previous
Board Specific Properties:
> +- pinctrl-0: Should specify pin control groups used for this controller.
> +- pinctrl-names: Should contain only one value - "default".
> +
> +Optional Properties:
> +- bus-width: number of data lines (see mmc.txt)
> +- cd-gpios: gpio for ca
Hi Vivek,
On 02/15/2017 02:24 PM, Vivek Gautam wrote:
>
> On 02/13/2017 01:56 PM, Jaehoon Chung wrote:
>> This patch adds support for Generic PHY framework about Exynos SoCs.
>> Current Exynos PCIe driver doesn't use the PHY framework.
>> It's making a diff
Dear Bjorn,
On 02/16/2017 06:11 AM, Bjorn Helgaas wrote:
> On Mon, Feb 13, 2017 at 05:26:09PM +0900, Jaehoon Chung wrote:
>> This patcheset is for using PHY generic framework.
>> Current pci-exyns doesn't use the phy framework since there haven't been on
>> PHY sub
Switch the pci-exynos driver to generic PHY framework. At the same time
backward compatibility is preserved: Warning will be printed for old
DTB.
Refer to the binding file:
- Documentation/devictree/bindings/pci/samsung,exynos5440-pcie.txt
Signed-off-by: Jaehoon Chung
Acked-by: Krzysztof
PHY Exynos PCIe
driver.
Signed-off-by: Jaehoon Chung
Acked-by: Krzysztof Kozlowski
Reviewed-by: Jingoo Han
Reviewed-by: Pankaj Dubey
---
Changelog on V3:
- Remove the dependency abot PCI_EXYNOS
- Adds a depends on COMPILE_TEST
- Use the readl_poll_timeout() instead of while()
- Fixes const t
Adds the exynos-pcie-phy binding for Exynos PCIe PHY.
This is for using generic PHY framework.
Signed-off-by: Jaehoon Chung
Acked-by: Rob Herring
---
Changelog on V3:
- None
Changelog on V2:
- Remove the child node.
- Add 2nd address to the parent reg prop.
Documentation/devicetree/bindings
y, can see "mssing *config* reg space" message.
Because the getting configuration space address from range is old way.
NOTE: When use the "config" property, first name of 'reg-names' must be
set to "elbi". Otherwise driver can't maintain the backward c
the dependency
- Removes the unnecessary codes
- Change the patch's sequence
- Based on latest PCI git repository.(next branch)
Jaehoon Chung (4):
Documetation: samsung-phy: add the exynos-pcie-phy binding
phy: phy-exynos-pcie: Add support for Exynos PCIe phy
Documetation: binding: modi
uot;, "config".
- Can know the purpose of use with reg-names.
Signed-off-by: Jaehoon Chung
Reviewed-by: Pankaj Dubey
---
Changelog on V3:
- Split from the patches relevant to pcie
- Modify the commit-message
- Keep the original comment in dt-file
- Send this patch after applying the other
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