Hi,
On 2014-01-11 14:42, Ivaylo Dimitrov wrote:
From: Ivaylo Dimitrov freemangor...@abv.bg
commit 7faa92339bbb1e6b9a80983b206642517327eb75 OMAPDSS: DISPC: Handle
synclost errors in OMAP3 introduces limits check to prevent SYNCLOST errors
on OMAP3. However, it misses the logic found in Nokia
On 2014-01-11 11:39, Ivaylo Dimitrov wrote:
The patch does not apply cleanly on top of rc7, however I applied it by
hand. So far it seems it fixes the issue brought by
c37dd677988ca50bc8bc60ab5ab053720583c168, though I didn't test if
mutex_lock/mutex_unlock are complementary in every code
Hi,
On Saturday 11 January 2014 06:12 PM, Ivaylo Dimitrov wrote:
From: Ivaylo Dimitrov freemangor...@abv.bg
commit 7faa92339bbb1e6b9a80983b206642517327eb75 OMAPDSS: DISPC: Handle
synclost errors in OMAP3 introduces limits check to prevent SYNCLOST errors
on OMAP3. However, it misses the logic
On Friday 10 January 2014 11:51 PM, Michael Trimarchi wrote:
Hi
On Fri, Jan 10, 2014 at 6:30 PM, Balaji T K balaj...@ti.com wrote:
In DT case, PBAIS registers are programmed via regulator,
use regulator APIs to control PBIAS.
Signed-off-by: Balaji T K balaj...@ti.com
---
On Fri, Jan 10, 2014 at 05:46:20PM +0530, Sricharan R wrote:
I tested this series on DRA7 with mmc peripheral dma and it looked
fine. Some how dmaengine test cases were not fine. But that may not
have anything to do with this series. I will check more on that and
will come back with that
On Thu, Jan 09, 2014 at 03:24:37PM +, Russell King - ARM Linux wrote:
On Tue, Jan 07, 2014 at 05:21:11PM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [140102 07:11]:
The following patch series moves code to setup the DMA hardware and
service interrupts
From: Victor Kamensky victor.kamen...@linaro.org
If kernel operates in BE mode on device that has LE bootloader/ROM code,
we need to switch CPU to operate in BE mode before it will start to
access BE data. Generic secondary_startup function that is called from
OMAP specific secondary startup code
From: Victor Kamensky victor.kamen...@linaro.org
Assembler functions defined in sleep44xx.S need to byteswap values
after read / before write from h/w register if code compiled in big
endian mode. Simple change to do 'rev x, x' before str instruction
and after ldr instruction that deals with h/w
On 01/13/2014 09:03 AM, Taras Kondratiuk wrote:
From: Victor Kamensky victor.kamen...@linaro.org
Assembler functions defined in sleep44xx.S need to byteswap values
after read / before write from h/w register if code compiled in big
endian mode. Simple change to do 'rev x, x' before str
Few cleanups to reduce code indent,
Add pbias_regulator support and adapt omap_hsmmc to use pbias regulator
to configure required voltage on mmc1 pad(SD card) i/o rails on OMAP SoCs.
Balaji T K (7):
mmc: omap_hsmmc: use devm_regulator API
mmc: omap_hsmmc: handle vcc and vcc_aux independently
Use devm_regulator API, while at it use
devm_regulator_get_optional for optional vmmc_aux supply
Signed-off-by: Balaji T K balaj...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
drivers/mmc/host/omap_hsmmc.c |6 ++
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git
handle vcc and vcc_aux independently to reduce indent.
Signed-off-by: Balaji T K balaj...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
drivers/mmc/host/omap_hsmmc.c | 54 +++--
1 files changed, 25 insertions(+), 29 deletions(-)
diff --git
pbias register controls internal power supply to sd card i/o pads
in most OMAPs (OMAP2-5, DRA7).
Control bits for selecting voltage level and
enabling/disabling are in the same PBIAS register.
Signed-off-by: Balaji T K balaj...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
Acked-by: Mark Brown
In DT case, PBAIS registers are programmed via regulator,
use regulator APIs to control PBIAS.
Signed-off-by: Balaji T K balaj...@ti.com
---
drivers/mmc/host/omap_hsmmc.c | 37 +
1 files changed, 37 insertions(+), 0 deletions(-)
diff --git
Enable REGULATOR_PBIAS needed for SD card on most OMAPs.
Signed-off-by: Balaji T K balaj...@ti.com
---
arch/arm/configs/omap2plus_defconfig |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defconfig
index
Add pbias regulator node as a child of system control
module - syscon.
Signed-off-by: Balaji T K balaj...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/boot/dts/dra7.dtsi | 17 +
arch/arm/boot/dts/omap2430.dtsi | 17 +
remove pbias workaround
Signed-off-by: Balaji T K balaj...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
drivers/mmc/host/omap_hsmmc.c | 20 +---
1 files changed, 1 insertions(+), 19 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
On 01/11/2014 06:35 PM, Joachim Eastwood wrote:
On 9 January 2014 15:00, Tero Kristo t-kri...@ti.com wrote:
Hi,
So, bad luck number release for this, as v12 wasn't sufficient still.
Changes compared to previous version:
- Dropped any changes to generic clock drivers, as it seems impossible
On Fri, Jan 10, 2014 at 11:57:28AM +0200, Tero Kristo wrote:
The move of clock code from mach-omap2 to drivers/clk/ti introduces
a couple of new build errors with AM43XX/DRA7XX only builds. The
following patches address these issues by modifying the Kconfig + Makefile
under mach-omap2.
From: Ivaylo Dimitrov freemangor...@abv.bg
commit 7faa92339bbb1e6b9a80983b206642517327eb75 OMAPDSS: DISPC: Handle
synclost errors in OMAP3 introduces limits check to prevent SYNCLOST errors
on OMAP3. However, it misses the logic found in Nokia kernels that is
needed to correctly calculate whether
Benoit,
On Thursday 19 December 2013 06:03 PM, Sourav Poddar wrote:
Add gpio keys node for am43x gp evm.
Signed-off-by: Sourav Poddarsourav.pod...@ti.com
---
arch/arm/boot/dts/am437x-gp-evm.dts | 21 +
1 file changed, 21 insertions(+)
diff --git
On 01/13/2014 06:24 PM, Felipe Balbi wrote:
On Fri, Jan 10, 2014 at 11:57:28AM +0200, Tero Kristo wrote:
The move of clock code from mach-omap2 to drivers/clk/ti introduces
a couple of new build errors with AM43XX/DRA7XX only builds. The
following patches address these issues by modifying the
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 08:48]:
On Thu, Jan 09, 2014 at 03:24:37PM +, Russell King - ARM Linux wrote:
On Tue, Jan 07, 2014 at 05:21:11PM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [140102 07:11]:
The following patch
On Sun, Jan 12, 2014 at 5:00 PM, Pavel Machek pa...@ucw.cz wrote:
This fixes:
arch/arm/mach-omap2/built-in.o: In function `omap_reserve':
/data/l/linux-n900/arch/arm/mach-omap2/common.c:36: undefined
reference to `omap_fb_reserve_memblock'
Signed-off-by: Pavel Machek pa...@ucw.cz
diff
If CONFIG_OMAP_32K_TIMER isn't enabled, we will
try to use enable_dyn_sleep which wasn't defined
anywhere.
In order to fix the problem, we always define
enable_dyn_sleep as 0 when !CONFIG_OMAP_32K_TIMER.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap1/pm.c | 6 +-
1 file
On Mon, Jan 13, 2014 at 09:37:45AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 08:48]:
Any news on this?
Sorry for the delay, now getting this:
arch/arm/mach-omap1/dma.c: In function ‘omap1_system_dma_init’:
arch/arm/mach-omap1/dma.c:368: error:
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 10:57]:
On Mon, Jan 13, 2014 at 09:37:45AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 08:48]:
Any news on this?
Sorry for the delay, now getting this:
arch/arm/mach-omap1/dma.c: In
On Mon, Jan 13, 2014 at 11:26:31AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 10:57]:
On Mon, Jan 13, 2014 at 09:37:45AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 08:48]:
Any news on this?
Sorry
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 12:36]:
On Mon, Jan 13, 2014 at 11:26:31AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 10:57]:
On Mon, Jan 13, 2014 at 09:37:45AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux
On Mon, Jan 13, 2014 at 01:02:42PM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 12:36]:
On Mon, Jan 13, 2014 at 11:26:31AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 10:57]:
On Mon, Jan 13, 2014 at
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 13:13]:
On Mon, Jan 13, 2014 at 01:02:42PM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 12:36]:
On Mon, Jan 13, 2014 at 11:26:31AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux
On Mon, Jan 13, 2014 at 01:21:18PM -0800, Tony Lindgren wrote:
Yes that's correct, here are all the DMA related lines:
DMA: preallocated 256 KiB pool for atomic coherent allocations
OMAP DMA hardware version 1
DMA capabilities: 000c::01ff:003f:007f
omap-dma-engine
* Russell King - ARM Linux li...@arm.linux.org.uk [140113 13:30]:
On Mon, Jan 13, 2014 at 01:21:18PM -0800, Tony Lindgren wrote:
Yes that's correct, here are all the DMA related lines:
DMA: preallocated 256 KiB pool for atomic coherent allocations
OMAP DMA hardware version 1
DMA
* Russell King rmk+ker...@arm.linux.org.uk [140102 07:17]:
Consolidate the setup of the channel control register. Prepare the
basic value in the preparation of the DMA descriptor, and write it into
the register upon descriptor execution.
FYI, this patch seems to be the one that causes the
DMA
* Russell King rmk+ker...@arm.linux.org.uk [140102 07:14]:
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -570,20 +695,27 @@ static int omap_dma_terminate_all(struct omap_chan *c)
/*
* Stop DMA activity: we assume the callback will not be called
- * after
On Mon 2014-01-13 10:02:58, Olof Johansson wrote:
On Sun, Jan 12, 2014 at 5:00 PM, Pavel Machek pa...@ucw.cz wrote:
This fixes:
arch/arm/mach-omap2/built-in.o: In function `omap_reserve':
/data/l/linux-n900/arch/arm/mach-omap2/common.c:36: undefined
reference to
On Mon, Jan 13, 2014 at 02:14:26PM -0800, Tony Lindgren wrote:
* Russell King rmk+ker...@arm.linux.org.uk [140102 07:17]:
Consolidate the setup of the channel control register. Prepare the
basic value in the preparation of the DMA descriptor, and write it into
the register upon descriptor
This patch adds three new OF helper functions to use/request
locks from a hwspinlock device instantiated through a
device-tree blob.
1. The of_hwspin_lock_get_num_locks() is a common helper
function to read the common 'hwlock-num-locks' property.
2. The of_hwspin_lock_simple_xlate() is a
HwSpinlocks are supported on AM33xx, AM43xx and DRA7xx SoC
device families as well. The IPs are identical to that of
OMAP4/OMAP5, except for the number of locks.
Add a depends on to the above family of SoCs to enable the
build support for OMAP hwspinlock driver for any of the above
SoC configs.
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
base support for parsing the DT nodes, and removes the code
dealing with the traditional platform device instantiation.
Signed-off-by: Suman Anna s-a...@ti.com
[t...@atomide.com:
The number of hwspinlocks are determined based on the value read
from the IP block's SYSSTATUS register. However, the module may
not be enabled and clocked, and the read may result in a bus error.
This particular issue is seen rather easily on AM33XX, since the
module wakeup is software
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
DT bindings information for OMAP hwspinlock module.
Cc: Rob Herring robh...@kernel.org
Signed-off-by: Suman Anna s-a...@ti.com
---
This patch adds the generic common bindings used to represent
a hwlock device and use/request locks in a device-tree build.
All the platform-specific hwlock driver implementations need the
number of locks and associated base id for registering the locks
present within the device with the driver
The hwspinlock_device structure is used for registering a bank of
locks with the driver core. The structure already contains the
necessary members to identify the bank of locks. The core does not
maintain the hwspinlock_devices itself, but maintains only a radix
tree for all the registered locks.
Hi,
This is an updated series mainly addressing Mark Rutland's comments
about hwlock specifier being always one-cell. The series adds the
support for #hwlock-cells property and adds a simple default OF
translate function.
The DTS patches from previous series have already been merged, and
needs
Add the hwspinlock device tree node for AM43xx family
of SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 974d103..81bf21f 100644
---
Add the hwspinlock device tree node for DRA7 SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d0df4c4..672ffec 100644
---
Add a new generic property #hwlock-cells to the hwspinlock
DT nodes on OMAP4, OMAP5 and AM33xx. This common property allows
different platform implementations to define the args specifier
length. OMAP implementations will always use a value of 1.
Signed-off-by: Suman Anna s-a...@ti.com
---
Hi,
This series updates the existing OMAP hwspinlock DT nodes to have a
#hwlock-cells property as suggested by Mark Rutland [1], and adds the
hwspinlock nodes for two other newer SoCs - DRA7xx and AM43xx.
Posting the series separately from the driver DT adapation changes [2]
to avoid maintainer
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