On 01/04/2016 06:37 PM, Tony Lindgren wrote:
* Russell King - ARM Linux <li...@arm.linux.org.uk> [160104 06:43]:
On Mon, Jan 04, 2016 at 03:27:57PM +0200, Tero Kristo wrote:
On 01/04/2016 12:21 PM, Geert Uytterhoeven wrote:
FWIW, there are small loops with just a cpu_relax() in various
On 01/04/2016 12:21 PM, Geert Uytterhoeven wrote:
Hi Tero,
On Mon, Jan 4, 2016 at 8:36 AM, Tero Kristo <t-kri...@ti.com> wrote:
On 01/01/2016 07:48 AM, Michael Turquette wrote:
Quoting Tero Kristo (2015-12-18 05:58:58)
+static int _omap4_hwmod_clk_enable(struct clk_hw *hw)
+{
+
On 01/01/2016 07:48 AM, Michael Turquette wrote:
Hi Tero,
Quoting Tero Kristo (2015-12-18 05:58:58)
Previously, hwmod core has been used for controlling the hwmod level
clocks. This has certain drawbacks, like being unable to share the
clocks for multiple users, missing usecounting
On 12/22/2015 05:53 PM, Tony Lindgren wrote:
These use the standard clock bindings and now we can make some
of the fixed clocks into real clocks.
Cc: Tero Kristo <t-kri...@ti.com>
Signed-off-by: Tony Lindgren <t...@atomide.com>
---
Changes since v1:
- Updated for changed
on "ARM: OMAP2+: Change core_initcall
levels to postcore_initcall".
Also note that this patch does not implement clk_set_rate for the
PLL, that will be posted later on when available.
Cc: Michael Turquette <mturque...@baylibre.com>
Cc: Stephen Boyd <sb...@codeaurora.org>
Hi,
This series adds support for hwmod gate clock type, and changes OMAP4
as an example to use the new clock type, converting the existing
hwmod_data clkctrl definitions to clock nodes under device tree.
Some additional magic is required for handling timer clocks, as the
clock driver assumes it
Add clock nodes for the SoC hwmods. This is done in preparation to remove
hwmod data from kernel, hwmod will use the clock nodes instead for
module level enable / disable logic.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/dts/omap44xx-clocks.dtsi
Replace the usage of prcm->clkstctrl with main_clk:s provided via DT.
This is done in preparation to get rid of hwmod data from kernel.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 339
1 file changed, 95 i
This avoids the need to add clock aliases under drivers/clk/ti/clk-xyz.c
files.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_hwmod.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/ar
clock driver, which will
be used to convert all the existing hwmdo clocks to. This helps to
get rid of the clock related hwmod data from kernel and instead
parsing this from DT.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/clk/ti/Makefile |3 +-
drivers/clk/ti/clkt_mod.c
get_parent and set_parent are going to be required by the support of
module clocks, so export these locally.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/clk/ti/clock.h |3 +++
drivers/clk/ti/mux.c |4 ++--
2 files changed, 5 insertions(+), 2 deletions(-)
diff
Clksel support has been deprecated a while back, so remove these from
the struct also.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
include/linux/clk/ti.h |4
1 file changed, 4 deletions(-)
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index 223be69..ec5613a
The clock data in DT has been updated, and the clock aliases must be
updated to match.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/clk/ti/clk-44xx.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/ti/clk-44xx.c b/drive
This avoids the need to add most of the clock aliases under
drivers/clk/ti/clk-xyz.c files.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_device.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_device.c
b/arch/ar
Document the new TI module clock type, which is intended to replace the
internal clock control handling within omap_hwmod. Module clock is
effectively a gate clock controlling both interface and functional
clocks for a single hardware IP block.
Signed-off-by: Tero Kristo <t-kri...@ti.
by setting the DPLL AUTO_DPLL_MODE=0 or keeping a clock request
active by setting a dependent clock domain in SW_WKUP.
This errata is known to impact OMAP5 and DRA7 chips, but lets enable it
unconditionally to avoid any potential problems with earlier generation
SoCs also.
Signed-off-by: Tero Kristo &l
On 12/03/2015 06:48 PM, Tony Lindgren wrote:
* Tero Kristo <t-kri...@ti.com> [151130 06:44]:
+ /*
+* Errata i810 - DPLL controller can get stuck while transitioning
+* to a power saving state. Software must ensure the DPLL can not
+* transition to a low power
On 12/11/2015 04:26 AM, Tony Lindgren wrote:
On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The
ADPLLs have several dividers and muxes controlled by a shared
control register for each PLL.
Note that for the clocks to work as device drivers for booting on
dm814x, this patch depends on
@codeaurora.org>
Cc: Tero Kristo <t-kri...@ti.com>
Signed-off-by: Tony Lindgren <t...@atomide.com>
Anybody from the clock department care to ack this one?
Sorry been rather busy lately...
I'd like to
get this series into Linux next as it fixes some some issues.
Yeah looks
On 12/08/2015 10:11 PM, Tony Lindgren wrote:
* Tero Kristo <t-kri...@ti.com> [151208 11:25]:
On 12/08/2015 06:57 PM, Tony Lindgren wrote:
Anybody from the clock department care to ack this one?
Sorry been rather busy lately...
I'd like to
get this series into Linux next as it fixe
by setting the DPLL AUTO_DPLL_MODE=0 or keeping a clock request
active by setting a dependent clock domain in SW_WKUP.
This errata impacts OMAP5 and DRA7 chips, so enable the errata for these.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/clock.c |4
drivers/
stead of 5.
Hence, fix it by adding mpu_periphclk ("fixed-factor-clock") and use
it for clocking ARM TWD and Global timer (same way as on OMAP4).
Cc: Tony Lindgren <t...@atomide.com>
Cc: Felipe Balbi <ba...@ti.com>
Cc: Tero Kristo <t-kri...@ti.com>
Fixes:commit 8cbd4c2f
On 11/30/2015 03:49 PM, Grygorii Strashko wrote:
On 11/30/2015 03:32 PM, Tero Kristo wrote:
On 11/30/2015 01:53 PM, Grygorii Strashko wrote:
On 11/30/2015 10:25 AM, Tero Kristo wrote:
On 11/27/2015 09:44 PM, Grygorii Strashko wrote:
ARM TWD and Global timer are clocked by PERIPHCLK which
On 11/30/2015 01:53 PM, Grygorii Strashko wrote:
On 11/30/2015 10:25 AM, Tero Kristo wrote:
On 11/27/2015 09:44 PM, Grygorii Strashko wrote:
ARM TWD and Global timer are clocked by PERIPHCLK which is MPU_CLK/2.
But now they are clocked by dpll_mpu_m2_ck == MPU_CLK and, as result.
Timekeeping
On 10/24/2015 12:10 AM, Grygorii Strashko wrote:
On 10/01/2015 10:20 PM, Grygorii Strashko wrote:
TI's mux and divider clock drivers do not require locking and they do
not initialize internal spinlocks. This code was occasionally
copy-posted from generic mux/divider drivers. So remove it.
Cc:
On 11/04/2015 06:09 AM, Nicolas Pitre wrote:
do_div() is meant to be used with an unsigned dividend.
Signed-off-by: Nicolas Pitre
Fixed Subject locally to format "clk: ti: %s".
Queued for 4.4-rc fixes, thanks.
-Tero
diff --git a/drivers/clk/ti/clkt_dpll.c
Hi Michael, Stephen,
Here are some TI clock driver fixes for 4.4-rc.
-Tero
The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec:
Linux 4.4-rc1 (2015-11-15 17:00:27 -0800)
are available in the git
On 11/04/2015 06:17 AM, Nicolas Pitre wrote:
do_div() is meant to be used with an unsigned dividend.
Signed-off-by: Nicolas Pitre
Fixed Subject locally to format "clk: ti: %s".
Queued for 4.4-rc-fixes, thanks.
-Tero
diff --git a/drivers/clk/ti/fapll.c
On 11/13/2015 06:29 PM, Neil Armstrong wrote:
Add missing clkdev dmtimer related entries for dm816x.
32Khz and ext sources were missing.
Cc: Brian Hutchinson
Acked-by: Tony Lindgren
Signed-off-by: Neil Armstrong
Your own
becomes 0x0a instead of the expected 0x10.
Fix by moving the +1 addition within the bin2bcd call also.
Fixes: 1d1945d261a2 ("drivers/rtc/rtc-ds1307.c: add alarm support for mcp7941x
chips")
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/rtc/rtc-ds1307.c |4 ++--
1
for their functional clock rate being changed on-the-fly), and the whole
framework required for handling this. Thus, there is not much point
to keep carrying the low-level support code either.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
Cc: Tony Lindgren <t...@atomide.com>
Cc: Paul
On 10/12/2015 08:01 PM, Tony Lindgren wrote:
* Tony Lindgren <t...@atomide.com> [150812 03:59]:
* Tony Lindgren <t...@atomide.com> [150812 00:29]:
* Tero Kristo <t-kri...@ti.com> [150716 01:10]:
Remove the OMAP3 core DPLL re-program code, and the associated SRAM
code that
On 10/12/2015 06:22 PM, Rolf Peukert wrote:
The glue code in drivers/usb/musb/am35x.c calls clk_get() to get its
interface and function clocks for the M-USB controller. These calls fail
in the current kernel. This patch adds clock definitions containing the
device ID to the list in clk-3xxx.c,
On 10/12/2015 10:35 PM, Tony Lindgren wrote:
* Tomi Valkeinen [151012 11:08]:
On 12.10.2015 19:00, Tony Lindgren wrote:
* Adam Ford [151010 13:29]:
Tomi and Tony,
I am working on the LogicPD DM3730 Torpedo module. If I try to use the
DSS, I get
On 10/06/2015 03:09 PM, Tony Lindgren wrote:
* Tero Kristo <t-kri...@ti.com> [150814 05:36]:
Basically the question with this set is, whether the DT node layout /
compatible string arrangement looks sane or not. Some of the compatibles
can be squashed together especially at clkdm dat
On 10/05/2015 01:17 PM, Tony Lindgren wrote:
* Ben Dooks <ben.do...@codethink.co.uk> [150929 06:14]:
On 25/09/15 06:42, Tero Kristo wrote:
On 09/23/2015 08:30 PM, Tony Lindgren wrote:
* Ben Dooks <ben.do...@codethink.co.uk> [150923 07:53]:
On the OMAP AM3517 platform the ua
though. As such, we can use the
initial clock conversion commit as a fixes by for this:
commit aafd900cab87d339dc3004c241eebc854005124b
Author: Tero Kristo <t-kri...@ti.com>
Date: Fri Aug 2 14:04:19 2013 +0300
CLK: TI: add omap3 clock init file
I'll add a fixes tag to this and queue i
On 09/30/2015 01:37 AM, Suman Anna wrote:
The default clock enabling functions for TI clocks -
omap2_dflt_clk_enable() and omap2_dflt_clk_disable() perform a
NULL check for the enable_reg field of the clk_hw_omap structure.
This enable_reg field however is merely a combination of the index
of
Hi Stephen, Mike,
A few TI clock driver fixes to pull against 4.3-rc.
-Tero
The following changes since commit 9ffecb10283508260936b96022d4ee43a7798b4c:
Linux 4.3-rc3 (2015-09-27 07:50:08 -0400)
are available in the git repository at:
On 09/30/2015 01:06 PM, Peter Ujfalusi wrote:
Paul,
On 09/27/2015 10:02 AM, Paul Walmsley wrote:
/*
+ * 'mcasp' class
+ *
+ */
+static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
+ .sysc_offs = 0x0004,
+ .sysc_flags = SYSC_HAS_SIDLEMODE,
+ .idlemodes
On 09/25/2015 03:57 PM, Lokesh Vutla wrote:
Hi Tero,
On Thursday 24 September 2015 07:56 PM, Tero Kristo wrote:
Add reset data for pruss, gfx, wkup-m3 and system reset.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/dts/am4372.dtsi | 24
On 09/25/2015 09:59 AM, Peter Ujfalusi wrote:
Tero,
On 09/16/2015 09:42 AM, Tero Kristo wrote:
On 09/14/2015 11:52 AM, Peter Ujfalusi wrote:
Hi Tero,
On 08/24/2015 10:35 AM, Peter Ujfalusi wrote:
The ABE related clocks should be configured via DT and not have it wired
inside of the kernel
Add iva, dsp and system reset control as DT data..
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/dts/omap2420.dtsi | 24
arch/arm/boot/dts/omap2430.dtsi | 17 +
2 files changed, 41 insertions(+)
diff --git a/arch/arm/bo
AMx3xx reset info is now parsed from DT, so the data under hwmod
database can be removed.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
.../mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 30
arch/arm/mach-omap2/omap_hwmod_33xx_data.c |8 --
ar
DT can now be used to provide reset information, so parse this to avoid
the need to have reset info under hwmod data. This patch disables the
support for existing reset data under hwmod data, so shall be applied
only after the DT reset conversion.
Signed-off-by: Tero Kristo <t-kri...@ti.
Add reset data for pruss, gfx, wkup-m3, and system reset.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/dts/am33xx.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index d
PRM driver now supports reset controller for the defined reset lines.
Reset configurations are provided through device tree. Later, functionality
like hwmod and system reboot will be changed to use the generic framework.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach
Copy over the reset data from hwmod database to DT. After this is taken
into use, the data in hwmod database can be removed.
A new node has been also added for ipu to support ipu resets.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/dts/omap4.dtsi
OMAP4+ prcm struct no longer requires the support for the rstctrl / rstst
offsets, as the data is parsed from DT for all platforms. Remove also
the obsolete hardreset support functions from the hwmod code.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_hwmod.c
Copy over the reset data from kernel to DT. Currently, only system reset
has been defined, but rest can be added later once needed.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/dts/dra7.dtsi |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dt
-x15. Reboot
on amx3xx does not seem functional in base 4.3-rc2 so wasn't able to test
this.
Testing branch pushed at:
tree: https://github.com/t-kristo/linux-pm.git
branch: 4.3-rc2-prcm-reset-fwk
Tero Kristo (17):
ARM: OMAP2+: PRM: add support for reset controller
ARM: OMAP2+: hwmod: parse
Previously the code was only parsing ocp hierarchy, which misses mpu and
iva/dsp nodes at least, which still contain hwmod support. Parse also the
soc hierarchy to include these.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_hwmod.c | 15 ---
Copy over the reset data from hwmod database to DT. After this is taken
into use, the data in hwmod database can be removed.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts
Add reset data for pruss, gfx, wkup-m3 and system reset.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/dts/am4372.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 04
Copy over the reset data from hwmod database to DT. After this is taken
into use, the data in hwmod database can be removed.
A new node has been also added for sad2d to support sad2d resets.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/dts/omap3.dtsi
This is provided via DT, and no longer needed in the hwmod database.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 14 --
1 file changed, 14 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
b/arch/arm/mach
This is now handled via the reset controller and the provided information
from DT, so the legacy support code is no longer needed. OMAP3 version
shall be removed once OMAP3 is also DT only.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/prm2xxx.c
System reset mapping used by reboot is now provided through DT data and
a reset controller. Use this instead of the hardcoded PRM API.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/Makefile |6 --
arch/arm/mach-omap2/am33xx-restart.c
This is provided via DT and no longer needed under the hwmod database.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 48 +++-
1 file changed, 5 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach
These are now parsed from DT, so not needed under the hwmod database
anymore.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 13 -
arch/arm/mach-omap2/omap_hwmod_2430_data.c |7 ---
2 files changed, 20 deletions(-)
diff
On 09/23/2015 08:30 PM, Tony Lindgren wrote:
* Ben Dooks [150923 07:53]:
On the OMAP AM3517 platform the uart4_ick gets registered
twice, causing any power managment to /dev/ttyO3 to fail
when trying to wake the device up.
This solves the following oops:
[]
On 09/14/2015 11:52 AM, Peter Ujfalusi wrote:
Hi Tero,
On 08/24/2015 10:35 AM, Peter Ujfalusi wrote:
The ABE related clocks should be configured via DT and not have it wired
inside of the kernel.
can you take a look at this patch? It will not cause any regression since we
do not have audio
of the kernel also.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/Kconfig |1 +
arch/arm/mach-omap2/Makefile |3 +-
arch/arm/mach-omap2/clockdomain.h | 10 +-
arch/arm/mach-omap2/pm-domains.c | 228 +
arch/arm/mach-omap2
Clock and powerdomain data can now be moved partially to DT. Some init
data is still left to the existing data files, to act as templates for
the DT based data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomains44xx_data.c | 327 +++
arch/arm
partition ID through the common PRCM APIs.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm_common.c | 12 +
arch/arm/mach-omap2/prcm-common.h |5
arch/arm/mach-omap2/prm_common.c | 53 +
3 files changed, 70 insertions
All the OMAP4+ boards are DT based only, so the prcm_mpu base address
can be parsed from DT.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/io.c |4
arch/arm/mach-omap2/prm_common.c | 18 ++
2 files changed, 18 insertions(+), 4 deletions
This avoids the need to use memblock_virt_alloc in the code. Done in
preparation of adding generic PM domains to OMAP platform codebase;
generic PM domain registration doesn't work during early_init.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/io.c | 180
PRCM has a local instance directly under the MPU domain, for controlling
local MPU powerdomains and clockdomains. Add a DT node for this for
omap4, omap5 and dra7.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/dra7.dtsi |8
arch/arm/boot/dts/omap4.dtsi |8
Hi,
This series provides DT based support for clock/powerdomain data. Some
parts of the data is retained under the existing *_data.c files to act
as templates. Also, minimal support for generic power domains is added,
but without power_off / power_on support at this point (should be
relatively
Clockdomain / powerdomain nodes with corresponding register addresses
and PRCM hierarchy is added to the DT. This data can be parsed to
create the clock/powerdomain data required by the kernel.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/omap4.dtsi | 32
On 08/12/2015 05:39 PM, Paul Walmsley wrote:
On Mon, 10 Aug 2015, Keerthy wrote:
The patch adds rtc hwmod. This is present on gp and sk evm and not on
epos evm. Hence adding it selectively using a seprate list.
Signed-off-by: Keerthy j-keer...@ti.com
So just to confirm, the RTC IP block has
The following changes since commit bc0195aad0daa2ad5b0d76cce22b167bc3435590:
Linux 4.2-rc2 (2015-07-12 15:10:30 -0700)
are available in the git repository at:
https://github.com/t-kristo/linux-pm.git for-4.3/ti-clk-dt
for you to fetch changes up to
On 07/27/2015 01:27 PM, Roger Quadros wrote:
Hi,
This series cleans up the scm_conf node.
v2:
- split patch. use only core_sma_sw registers for the new scm_conf child.
Series looks ok to me, so:
Acked-by: Tero Kristo t-kri...@ti.com
cheers,
-roger
Roger Quadros (3):
ARM: dts: dra7
On 07/17/2015 04:47 PM, Roger Quadros wrote:
This register is required to be passed to the SATA PHY driver
to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 1 +
1 file changed, 1 insertion(+)
On 07/17/2015 04:47 PM, Roger Quadros wrote:
scm_conf1 maps the control register address space after the
padconf till the end.
Fix the scm_conf and pmx_core resource lengths. We need to add
4 bytes to include the last 32-bit register space.
Remove the redundant dra7_ctrl_core and
On 07/16/2015 04:51 AM, Paul Walmsley wrote:
On Tue, 14 Jul 2015, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [150714 03:34]:
On 07/14/2015 12:54 PM, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [150714 01:56]:
This pull request contains the TI clock driver set to move
for their functional clock rate being changed on-the-fly), and the whole
framework required for handling this. Thus, there is not much point
to keep carrying the low-level support code either.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
On 07/16/2015 03:15 AM, Paul Walmsley wrote:
On Tue, 14 Jul 2015, Tero Kristo wrote:
On 07/14/2015 01:09 PM, Lokesh Vutla wrote:
Hi,
On Wednesday 10 June 2015 02:56 PM, Lokesh Vutla wrote:
Some IP blocks like RTC, needs an additional unlocking mechanism for
writing to its registers
On 07/16/2015 01:13 PM, Paul Walmsley wrote:
On Thu, 16 Jul 2015, Tero Kristo wrote:
On 07/16/2015 03:15 AM, Paul Walmsley wrote:
On Tue, 14 Jul 2015, Tero Kristo wrote:
On 07/14/2015 01:09 PM, Lokesh Vutla wrote:
Hi,
On Wednesday 10 June 2015 02:56 PM, Lokesh Vutla wrote:
Some IP blocks
On 07/14/2015 11:31 PM, Stephen Boyd wrote:
On 07/14/2015 01:09 PM, Tero Kristo wrote:
On 07/14/2015 10:29 PM, Stephen Boyd wrote:
On 07/14/2015 01:54 AM, Tero Kristo wrote:
The following changes since commit
bc0195aad0daa2ad5b0d76cce22b167bc3435590:
Linux 4.2-rc2 (2015-07-12 15:10:30
)
Tero Kristo (27):
ARM: OMAP2+: clock: export driver API to setup/get clock features
clk: ti: move generic OMAP DPLL implementation under drivers/clk
clk: ti: move OMAP4+ DPLL implementation under drivers/clk
clk: ti: move interface clock implementation under drivers/clk
On 07/15/2015 04:47 PM, Roger Quadros wrote:
Hi,
On 15/07/15 15:07, Tony Lindgren wrote:
* Kishon Vijay Abraham I kis...@ti.com [150715 04:24]:
Hi Roger,
On Tuesday 02 June 2015 02:40 PM, Roger Quadros wrote:
This register is required to be passed to the SATA PHY driver
to workaround errata
portions of the clock
driver code still remain under mach-omap2 after this, it should be
decided whether this code is now obsolete and should be deleted or
should someone try to fix it.
-Tero
Tero Kristo (27):
ARM: OMAP2
On 07/14/2015 12:54 PM, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [150714 01:56]:
This pull request contains the TI clock driver set to move the clock
implementations under clock driver. Some small portions of the clock driver
code still remain under mach-omap2 after this, it should
(-)
Tested-by: Mugunthan V N mugunthan...@ti.com
Thanks Mugunthan.
A gentle ping on this series.
Tero, care to review this series?
Acked-by: Tero Kristo t-kri...@ti.com
I guess this should go through your tree as this is mostly dts changes?
-Tero
Regards,
Tony
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On 07/14/2015 01:09 PM, Lokesh Vutla wrote:
Hi,
On Wednesday 10 June 2015 02:56 PM, Lokesh Vutla wrote:
Some IP blocks like RTC, needs an additional unlocking mechanism for
writing to its registers. This patch adds optional lock and unlock
function pointers to the IP block's hwmod data which
On 07/14/2015 10:29 PM, Stephen Boyd wrote:
On 07/14/2015 01:54 AM, Tero Kristo wrote:
The following changes since commit
bc0195aad0daa2ad5b0d76cce22b167bc3435590:
Linux 4.2-rc2 (2015-07-12 15:10:30 -0700)
Why did this get rebased onto v4.2-rc2? I thought it was all ready to go
based
On 05/21/2015 07:26 PM, Nuno Gonçalves wrote:
Currently the processor PLLs and Dividers are configured according to
SYSBOOT levels during boot [1][2].
In the case of boards with expansion capabitliy, like the Beaglebone,
the expansion board might touch this SYSBOOT pins a provide a wrong
clock
Lindgren t...@atomide.com
CC: Ralf Baechle r...@linux-mips.org
CC: Emilio López emi...@elopez.com.ar
CC: Maxime Ripard maxime.rip...@free-electrons.com
CC: Tero Kristo t-kri...@ti.com
CC: Peter De Schrijver pdeschrij...@nvidia.com
CC: Prashant Gaikwad pgaik...@nvidia.com
CC: Stephen Warren swar
On 06/04/2015 02:11 AM, Michael Turquette wrote:
Quoting Tero Kristo (2015-06-03 05:33:46)
On 05/28/2015 02:15 AM, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [150527 11:32]:
On 05/26/2015 07:39 PM, Felipe Balbi wrote:
On Tue, May 26, 2015 at 09:32:16AM -0700, Tony Lindgren wrote
24), /* WAKEUPENABLE */
.irq_status_mask = (1 25), /* WAKEUPEVENT */
};
Tero, care to take a look at this one and ack if OK?
Looks fine to me.
Acked-by: Tero Kristo t-kri...@ti.com
Regards,
Tony
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On 06/22/2015 09:22 AM, Keerthy wrote:
The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded.
This makes it difficult to reuse the code for single core SoCs like AM437x.
Single core vs. having two sets of IRQENABLE / IRQSTATUS registers do
not have any relation to each
, not going to try to review patch 5 as I
have no clue about PWM driver itself. So, for 1-4:
Acked-by: Tero Kristo t-kri...@ti.com
Some of the patches cause trivial merge conflicts with 4.2-rc1 though.
-Tero
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the body
On 06/22/2015 09:22 AM, Keerthy wrote:
Add the PRM IRQ register offsets.
This patch doesn't apply cleanly to 4.2-rc1.
-Tero
Signed-off-by: Keerthy j-keer...@ti.com
---
arch/arm/mach-omap2/prcm43xx.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-omap2/prcm43xx.h
.
-Tero
Cc: Paul Walmsley p...@pwsan.com mailto:p...@pwsan.com
Cc: Tero Kristo t-kri...@ti.com mailto:t-kri...@ti.com
Cc: Tony Lindgren t...@atomide.com mailto:t...@atomide.com
Signed-off-by: Brian Hutchinson b.hutch...@gmail.com
mailto:b.hutch...@gmail.commailto:t...@atomide.com
--- arch/arm
please. Or use a mailer that doesn't convert tabs to
spaces. This patch seems to have something else that is strange also.
Cc: Paul Walmsley p...@pwsan.com mailto:p...@pwsan.com
Cc: Tero Kristo t-kri...@ti.com mailto:t-kri...@ti.com
Cc: Tony Lindgren t...@atomide.com mailto:t...@atomide.com
Signed
On 05/28/2015 02:15 AM, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [150527 11:32]:
On 05/26/2015 07:39 PM, Felipe Balbi wrote:
On Tue, May 26, 2015 at 09:32:16AM -0700, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [150526 09:08]:
* Tero Kristo t-kri...@ti.com [150525 08:01
On 06/04/2015 02:11 AM, Michael Turquette wrote:
Quoting Tero Kristo (2015-06-03 05:33:46)
On 05/28/2015 02:15 AM, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [150527 11:32]:
On 05/26/2015 07:39 PM, Felipe Balbi wrote:
On Tue, May 26, 2015 at 09:32:16AM -0700, Tony Lindgren wrote
of the clock rate
to propagate to the PLL.
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
Cc: devicet...@vger.kernel.org
Acked-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi
b
On 06/01/2015 09:23 AM, Tomi Valkeinen wrote:
Add a new Linux clock for DRA7 based SoCs to control DESHDCP clock.
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
Acked-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 5 +
arch/arm/boot/dts/dra7xx
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