The MTD device is now directly embedded in the nand_chip struct. Update the
mtdnand documentation to mention this aspect and fix the different
examples.
Signed-off-by: Boris Brezillon
---
Documentation/DocBook/mtdnand.tmpl | 31 +++
Now that all drivers are using the mtd instance embedded in the nand_chip
struct we can safely update the mtd_to_nand() implementation to use
the container_of macro instead of returning the content of mtd->priv.
This will allow us to remove mtd->priv = chip assignments done in all
NAND controller
struct nand_chip now embeds an mtd device. Patch all drivers to make use
of this mtd instance instead of using the instance embedded in their
private struct or dynamically allocated.
Signed-off-by: Boris Brezillon
---
Most of those changes were generated with
mtd_to_nand() now uses the container_of() approach to transform an
mtd_info pointer into a nand_chip one. Drop useless mtd->priv
assignments from NAND controller drivers.
Signed-off-by: Boris Brezillon
---
Patch generated with the following coccinelle script:
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
Create and use mtd_to_nuc900() instead of direct container_of() calls.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/nuc900_nand.c | 25 ++---
1 file changed, 10 insertions(+), 15 deletions(-)
diff --git
Create and use mtd_to_fsmc() to avoid duplication of
container_of(mtd, struct fsmc_nand_data, mtd) calls.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/fsmc_nand.c | 31 ++-
1 file changed, 14 insertions(+), 17 deletions(-)
New helpers have been added to avoid directly accessing chip->field. Use
them where appropriate.
Signed-off-by: Boris Brezillon
---
drivers/staging/mt29f_spinand/mt29f_spinand.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
Add two helpers to access the field reserved for private controller data.
This makes it clearer what this field is reserved for and ease future
refactoring.
Signed-off-by: Boris Brezillon
---
include/linux/mtd/nand.h | 10 ++
1 file changed, 10
New helpers have been added to avoid directly accessing chip->field. Use
them where appropriate.
Signed-off-by: Boris Brezillon
---
arch/arm/mach-ixp4xx/ixdp425-setup.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
mtd_to_nand() now uses the container_of() approach to transform an
mtd_info pointer into a nand_chip one. Drop useless mtd->priv
assignments from NAND controller drivers.
Signed-off-by: Boris Brezillon
---
Patch generated with the following coccinelle script:
mtd_to_nand() now uses the container_of() approach to transform an
mtd_info pointer into a nand_chip one. Drop useless mtd->priv
assignments from NAND controller drivers.
Signed-off-by: Boris Brezillon
---
Patch generated with the following coccinelle script:
nand_dt_init() function requires 3 arguments where it actually needs one
(dn and mtd can both be retrieved from chip). Drop these parameters.
Testing for dn != NULL inside nand_dt_init() also helps simplifying the
caller code.
Signed-off-by: Boris Brezillon
Now that the nand_chip struct directly embeds an mtd_info struct we can
get rid of the ->flash_node field and forward set/get_flash_node requests
to the MTD layer.
As a side effect, we no longer need the mtd_set_of_node() call done in
nand_dt_init().
Signed-off-by: Boris Brezillon
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
On Wed, 09 Dec 2015, Linus Walleij wrote:
> The separate struct bgpio_chip has been a pain to handle, both
> by being confusingly similar in name to struct gpio_chip and
> for being contained inside a struct so that struct gpio_chip
> is contained in a struct contained in a struct, making several
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/docg4.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/docg4.c
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: Boris Brezillon
---
Changes generated with the following coccinelle script
--->8---
virtual patch
@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
* Linus Walleij [151210 10:18]:
> On Thu, Dec 3, 2015 at 10:44 PM, Tony Lindgren wrote:
> > * Linus Walleij [151030 12:54]:
> >> Please run posts like this by the maintainers. Tony Lindgren is one
> >> user, Haojian is
The following changes since commit 31ade3b83e1821da5fbb2f11b5b3d4ab2ec39db8:
Linux 4.4-rc3 (2015-11-29 18:58:26 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
tags/omap-for-v4.4/fixes-rc4
for you to fetch changes up to
* Arnd Bergmann [151210 15:46]:
> On Thursday 10 December 2015 15:39:08 Tony Lindgren wrote:
> > Few fixes for omaps for v4.4-rc cycle:
> >
> > - Fix clock source for ARM TWD and global timers on am437x
> >
> > - Always select REGULATOR_FIXED_VOLTAGE for omap2+ instead of
> >
The following changes since commit 29f5b34ca1a191c2cf4f6c8c12f4dec56e8d3bc1:
arm: omap2+: add missing HWMOD_NO_IDLEST in 81xx hwmod data (2015-11-25
10:54:22 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
The following changes since commit 1ec218373b8ebda821aec00bb156a9c94fad9cd4:
Linux 4.4-rc2 (2015-11-22 16:45:59 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
tags/omap-for-v4.5/dt-pt1
for you to fetch changes up to
On Thu, Dec 10, 2015 at 08:59:45AM +0100, Boris Brezillon wrote:
> Unregister the NAND device from the NAND subsystem when removing a denali
> NAND controller, otherwise the MTD attached to the NAND device is still
> exposed by the MTD layer, and accesses to this device will likely crash
> the
On Thursday 10 December 2015 15:39:08 Tony Lindgren wrote:
> Few fixes for omaps for v4.4-rc cycle:
>
> - Fix clock source for ARM TWD and global timers on am437x
>
> - Always select REGULATOR_FIXED_VOLTAGE for omap2+ instead of
> when MACH_OMAP3_PANDORA is selected
>
> - Fix SPI DMA handles
On Wed, Nov 25, 2015 at 7:39 PM, Tony Lindgren wrote:
> Linus,
(...)
>> > OK, I believe he was waiting for yours to pick the series though ;)
>>
>> Yeah probably best to keep this series together if you're OK with that.
>
> Care to ack this one? I'd like to apply this series for
+ Lokesh Vutla
+ linux-omap@vger.kernel.org
On Thu, Dec 10, 2015 at 6:06 PM, Semen Protsenko
wrote:
>
> From: Sam Protsenko
>
> When using DES module the next bug appears:
>
> BUG: scheduling while atomic:
On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The
ADPLLs have several dividers and muxes controlled by a shared
control register for each PLL.
Note that for the clocks to work as device drivers for booting on
dm814x, this patch depends on "ARM: OMAP2+: Change core_initcall
levels to
ti-qspi controller provides mmap port to read data from SPI flashes.
mmap port is enabled in QSPI_SPI_SWITCH_REG. ctrl module register may
also need to be accessed for some SoCs. The QSPI_SPI_SETUP_REGx needs to
be populated with flash specific information like read opcode, read
mode(quad, dual,
Certain spi controllers may provide accelerated interface to read from
m25p80 type flash devices. This interface provides better read
performance than regular SPI interface.
Call spi_flash_read(), if supported, to make use of such interface.
Signed-off-by: Vignesh R
---
v5: No
On 10.12.2015 17:00, Boris Brezillon wrote:
> struct nand_chip now embeds an mtd device. Make use of this mtd instance.
>
> Signed-off-by: Boris Brezillon
> ---
> Changes generated with the following coccinelle script
>
> --->8---
> virtual patch
>
> @fix1@
Changes since v4:
Use syscon to access system control module register in ti-qspi driver.
Changes since v3:
Rework to introduce spi_flash_read_message struct.
Support different opcode/addr/data formats as per Brian's suggestion
here: https://lkml.org/lkml/2015/11/11/454
Changes since v2:
Remove
In addition to providing direct access to SPI bus, some spi controller
hardwares (like ti-qspi) provide special port (like memory mapped port)
that are optimized to improve SPI flash read performance.
This means the controller can automatically send the SPI signals
required to read data from the
Add qspi memory mapped region entries for AM43xx based SoCs. Also,
update the binding documents for the controller to document this change.
Acked-by: Rob Herring
Signed-off-by: Vignesh R
---
v5: No changes.
Documentation/devicetree/bindings/spi/ti_qspi.txt |
Add qspi memory mapped region entries for DRA7xx based SoCs. Also,
update the binding documents for the controller to document this change.
Signed-off-by: Vignesh R
---
v5: use syscon to access scm register.
Documentation/devicetree/bindings/spi/ti_qspi.txt | 17
From: Uwe Kleine-König
To allow supporting displays that need some logic to enable power to the
display add support for a vcc-supply property to drive a regulator.
Signed-off-by: Uwe Kleine-König
---
From: Uwe Kleine-König
The variable gpio is only used to store the return value of
devm_gpiod_get_optional just to assign it to a member of the driver
data.
Get rid of this local variable and assign to driver data directly.
Signed-off-by: Uwe Kleine-König
From: Uwe Kleine-König
gpiod_set_value_cansleep is a noop when the passed descriptor is NULL.
So there is no need to duplicate the check for NULL; just call the
function unconditionally instead.
Signed-off-by: Uwe Kleine-König
---
From: Uwe Kleine-König
This makes .disable operate in reverse order compared to .enable.
Signed-off-by: Uwe Kleine-König
---
drivers/video/fbdev/omap2/displays-new/panel-dpi.c | 6 +++---
1 file changed, 3 insertions(+), 3
From: Uwe Kleine-König
Some displays have a reset input. To assert that the display is
functional the reset gpio must be deasserted.
Teach the driver to get and drive such a gpio accordingly.
Signed-off-by: Uwe Kleine-König
---
Hi,
* Tony Lindgren [151203 08:08]:
> * Tony Lindgren [151202 17:36]:
> > On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The
> > ADPLLs have several dividers and muxes controlled by a shared
> > control register for each PLL.
> >
> > Note that for
On 12/11/2015 04:26 AM, Tony Lindgren wrote:
On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The
ADPLLs have several dividers and muxes controlled by a shared
control register for each PLL.
Note that for the clocks to work as device drivers for booting on
dm814x, this patch depends on
set/get_bypass ops were missing for ldo1/ldo2 regulators which
support bypass mode. Adding the bypass ops for ldo1 and ldo2.
This helps consumers configure ldo1 and ldo2 in bypass mode or
remove bypass mode if need be.
Signed-off-by: Keerthy
Reported-by: Kishon Vijay Abraham I
Add regulator-allow-bypass property for ldo1 and ldo2.
Signed-off-by: Keerthy
---
arch/arm/boot/dts/dra72-evm.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 2388fd8..e5f49da 100644
---
The patch series adds support for enabling/disabling bypass for
ldo1 and ldo2.
Boot tested on DRA72-EVM on top of commit ID:
0bd0f1e6d40aa16c4d507b1fff27163a7e7711f5
Keerthy (2):
regulator: tps65917: Add bypass ops for ldo1 and ldo2 regulators
ARM: dts: DRA72-EVM: Add
Hi Felipe,
On Tuesday 08 December 2015 07:15 PM, Felipe Balbi wrote:
> Sekhar Nori writes:
>> +/*
>> + * A spurious IRQ can result if interrupt that triggered the
>> + * sorting is no longer active during the sorting (10 INTC
>> + * functional clock cycles after
On Wednesday 09 December 2015 10:18:09 Peter Ujfalusi wrote:
> Hi,
>
> Based on the discussion regarding to (convert am33xx to use the new eDMA
> bindings):
> https://www.mail-archive.com/linux-omap@vger.kernel.org/msg122117.html
>
> This two patch will convert the new eDMA binding to not use
This change makes the DT file to be easier to read since the memcpy
channels array does not need the '/bits/ 16' to be specified, which might
confuse some people.
Signed-off-by: Peter Ujfalusi
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 5 ++---
This change makes the DT file to be easier to read since the reserved slots
array does not need the '/bits/ 16' to be specified, which might confuse
some people.
Signed-off-by: Peter Ujfalusi
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 5 ++--
On 13/11/15 12:29, H. Nikolaus Schaller wrote:
> Otherwise check_timings fails and we get a "has no modes" message
> from xrandr.
>
> This fix makes the venc assume PAL and NTSC timings that match the
> timings synthetized by copy_timings_drm_to_omap() from omapdrm
> mode settings so that
Hi,
Based on the discussion regarding to (convert am33xx to use the new eDMA
bindings):
https://www.mail-archive.com/linux-omap@vger.kernel.org/msg122117.html
This two patch will convert the new eDMA binding to not use 16bit arrays for
memcpy channel selection and for marking slots reserved.
The
Hi Brian,
On Tue, 8 Dec 2015 16:36:24 -0800
Brian Norris wrote:
> Hi,
>
> On Tue, Dec 01, 2015 at 12:02:57PM +0100, Boris Brezillon wrote:
> > Hello,
> >
> > This huge series aims at clarifying the relationship between the mtd and
> > nand_chip structures and
Hi Brian,
On Tue, 8 Dec 2015 16:17:41 -0800
Brian Norris wrote:
>
> > diff --git a/drivers/mtd/nand/cmx270_nand.c b/drivers/mtd/nand/cmx270_nand.c
> > index 43bded6..84d027e 100644
> > --- a/drivers/mtd/nand/cmx270_nand.c
> > +++ b/drivers/mtd/nand/cmx270_nand.c
>
Hi Arnd, Vinod,
As Arnd suggested, the two patch from the following series:
https://www.mail-archive.com/linux-omap@vger.kernel.org/msg122201.html
plus Acked-by from Arnd is available for pull if you prefer that way.
Regards,
Péter
The separate struct bgpio_chip has been a pain to handle, both
by being confusingly similar in name to struct gpio_chip and
for being contained inside a struct so that struct gpio_chip
is contained in a struct contained in a struct, making several
steps of dereferencing necessary.
Make things
> I guess will be interesting cc'ing the ISEE people. Added Agusti and Pau.
>
> Thanks,
> Enric
Thank you.
Ack.
We will try with new versions (wilink8)
Agusti
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More
On Tue, Dec 08, 2015 at 10:05:56AM +0100, Sebastian Andrzej Siewior wrote:
> * Bjorn Helgaas | 2015-12-04 12:46:19 [-0600]:
>
> >The backtrace might be OK (maybe slightly overkill), but all the
> >stack addresses are certainly irrelevant and distracting. We only
> >need enough to recognize the
On Wed, Dec 09, 2015 at 02:12:40PM +0100, Linus Walleij wrote:
> The separate struct bgpio_chip has been a pain to handle, both
> by being confusingly similar in name to struct gpio_chip and
> for being contained inside a struct so that struct gpio_chip
> is contained in a struct contained in a
Hello,
On a custom 4460 board. The x-loader hangs at some place when we
reboot. This happens occasionally on an android port by linaro.
I just want to find out how to debug in this case. How can i get to
know where the hang takes place. After boot rom, i can see the mmc clk
toggling
indicating
On Wednesday, December 09, 2015 6:13 AM, Linus Walleij wrote:
> The separate struct bgpio_chip has been a pain to handle, both
> by being confusingly similar in name to struct gpio_chip and
> for being contained inside a struct so that struct gpio_chip
> is contained in a struct contained in a
* Peter Ujfalusi [151209 00:19]:
> Hi,
>
> Based on the discussion regarding to (convert am33xx to use the new eDMA
> bindings):
> https://www.mail-archive.com/linux-omap@vger.kernel.org/msg122117.html
>
> This two patch will convert the new eDMA binding to not use 16bit
On Wed, Dec 09, 2015 at 10:18:11AM +0200, Peter Ujfalusi wrote:
> This change makes the DT file to be easier to read since the reserved slots
> array does not need the '/bits/ 16' to be specified, which might confuse
> some people.
>
> Signed-off-by: Peter Ujfalusi
This
Hi Tony,
Thanks for your response. I dont see any prints. I suspect that it
might be hanging before the serial port is initialized
All i see is after arch_reset is called. I can see that is mmc clk and
data signals toggling. This makes me think that
boot rom has loaded the xloader into sram.
Hi,
(please avoid top-posting)
Ryan writes:
> Hi Tony,
>
> Thanks for your response. I dont see any prints. I suspect that it
> might be hanging before the serial port is initialized
>
> All i see is after arch_reset is called. I can see that is mmc clk and
> data
On Wed, Dec 09, 2015 at 10:18:10AM +0200, Peter Ujfalusi wrote:
> This change makes the DT file to be easier to read since the memcpy
> channels array does not need the '/bits/ 16' to be specified, which might
> confuse some people.
Why? I don't see the point of this change and plus you are
On Wed, Dec 09, 2015 at 02:02:00PM -0600, Rob Herring wrote:
> On Wed, Dec 09, 2015 at 10:18:10AM +0200, Peter Ujfalusi wrote:
> > This change makes the DT file to be easier to read since the memcpy
> > channels array does not need the '/bits/ 16' to be specified, which might
> > confuse some
* Ryan [151209 09:03]:
> Hello,
>
> On a custom 4460 board. The x-loader hangs at some place when we
> reboot. This happens occasionally on an android port by linaro.
>
> I just want to find out how to debug in this case. How can i get to
> know where the hang
* Felipe Balbi [151208 10:05]:
>
> Hi,
>
> Grygorii Strashko writes:
> > ARM TWD and Global timer are clocked by PERIPHCLK which is MPU_CLK/2.
> > But now they are clocked by dpll_mpu_m2_ck == MPU_CLK and, as result.
> > Timekeeping core misbehaves. For
On Wed, Dec 09, 2015 at 02:12:40PM +0100, Linus Walleij wrote:
...
> @@ -55,16 +54,16 @@ static int moxart_gpio_probe(struct platform_device *pdev)
> return ret;
> }
>
> - bgc->gc.label = "moxart-gpio";
> - bgc->gc.request = gpiochip_generic_request;
> -
On 09.12.2015 22:12, Linus Walleij wrote:
> The separate struct bgpio_chip has been a pain to handle, both
> by being confusingly similar in name to struct gpio_chip and
> for being contained inside a struct so that struct gpio_chip
> is contained in a struct contained in a struct, making several
* Tero Kristo [151208 23:50]:
> On 12/08/2015 10:11 PM, Tony Lindgren wrote:
> >* Tero Kristo [151208 11:25]:
> >>On 12/08/2015 06:57 PM, Tony Lindgren wrote:
> >>>
> >>>Anybody from the clock department care to ack this one?
> >>
> >>Sorry been rather busy
On Wed, Dec 09, 2015 at 12:12:27PM -0800, Tony Lindgren wrote:
> * Peter Ujfalusi [151209 00:19]:
> > Hi,
> >
> > Based on the discussion regarding to (convert am33xx to use the new eDMA
> > bindings):
> >
On 12/03/2015 03:51 PM, Vignesh R wrote:
>
>
> On 12/01/2015 10:09 PM, Tony Lindgren wrote:
>> * Vignesh R [151130 20:46]:
>>> On 12/01/2015 04:04 AM, Tony Lindgren wrote:
...
>>
>> OK. They are both on L3 main so that won't cause any issues for separate
>> interconnect
On 12/09/2015 05:24 PM, Bjorn Helgaas wrote:
On Tue, Dec 08, 2015 at 10:05:56AM +0100, Sebastian Andrzej Siewior wrote:
* Bjorn Helgaas | 2015-12-04 12:46:19 [-0600]:
The backtrace might be OK (maybe slightly overkill), but all the
stack addresses are certainly irrelevant and distracting. We
* Linus Walleij [151209 05:14]:
> The separate struct bgpio_chip has been a pain to handle, both
> by being confusingly similar in name to struct gpio_chip and
> for being contained inside a struct so that struct gpio_chip
> is contained in a struct contained in a
On Tue, Dec 01, 2015 at 12:03:12PM +0100, Boris Brezillon wrote:
> struct nand_chip now embeds an mtd device. Patch all drivers to make use
> of this mtd instance instead of using the instance embedded in their
> private struct or dynamically allocated.
>
> Signed-off-by: Boris Brezillon
On Tuesday 08 December 2015 09:42:26 Peter Ujfalusi wrote:
> On 12/04/2015 11:51 PM, Tony Lindgren wrote:
> >>
> >> Please just drop the /bits/ 16 and use normal cells.
> >
> > Yeah agreed, makes things less confusing for sure
>
> 4.4 will be the first kernel where we will have the new eDMA
Hi Bjorn,
Am Montag, den 07.12.2015, 21:33 -0600 schrieb Bjorn Helgaas:
> [+cc Jingoo (exynos), Richard, Lucas (imx6), Pratyush (spear13xx)]
>
> On Fri, Dec 04, 2015 at 11:22:50PM +0200, Grygorii Strashko wrote:
> > On 12/04/2015 08:46 PM, Bjorn Helgaas wrote:
> > > Hi Grygorii,
[...]
> > >>
On Tue, Dec 01, 2015 at 12:03:15PM +0100, Boris Brezillon wrote:
> mtd_to_nand() now uses the container_of() approach to transform an
> mtd_info pointer into a nand_chip one. Drop useless mtd->priv
> assignments from NAND controller drivers.
>
> Signed-off-by: Boris Brezillon
* Bjorn Helgaas | 2015-12-04 12:46:19 [-0600]:
>The backtrace might be OK (maybe slightly overkill), but all the
>stack addresses are certainly irrelevant and distracting. We only
>need enough to recognize the problem. I don't think the modules list
>is relevant either.
I would shorten it to
On 8 December 2015 at 01:32, Tony Lindgren wrote:
> * Ulf Hansson [151207 16:20]:
>> +Linus
>>
>> On 7 December 2015 at 23:54, Tony Lindgren wrote:
>> > Commit ce037275861e ("mmc: pwrseq_simple: use GPIO descriptors array API")
>> >
On 12/03/2015 05:46 PM, Peter Ujfalusi wrote:
> On 12/03/2015 05:38 PM, Arnd Bergmann wrote:
>> On Thursday 03 December 2015 16:33:12 Peter Ujfalusi wrote:
>>> diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
>>> index 0675e268d577..46b305ea0d21 100644
>>> --- a/drivers/dma/edma.c
>>> +++
On 12/08/2015 11:51 AM, Arnd Bergmann wrote:
> On Tuesday 08 December 2015 09:42:26 Peter Ujfalusi wrote:
>> On 12/04/2015 11:51 PM, Tony Lindgren wrote:
Please just drop the /bits/ 16 and use normal cells.
>>>
>>> Yeah agreed, makes things less confusing for sure
>>
>> 4.4 will be the
On Tuesday 08 December 2015 12:22:09 Peter Ujfalusi wrote:
> On 12/08/2015 11:51 AM, Arnd Bergmann wrote:
> > On Tuesday 08 December 2015 09:42:26 Peter Ujfalusi wrote:
> >> On 12/04/2015 11:51 PM, Tony Lindgren wrote:
>
> Please just drop the /bits/ 16 and use normal cells.
> >>>
> >>>
Under some conditions, irq sorting procedure used
by INTC can go wrong resulting in a spurious irq
getting reported.
If this condition is not handled, it results in
endless stream of:
unexpected IRQ trap at vector 00
messages from ack_bad_irq()
Handle the spurious interrupt condition in
Hi,
Sekhar Nori writes:
> Under some conditions, irq sorting procedure used
> by INTC can go wrong resulting in a spurious irq
> getting reported.
>
> If this condition is not handled, it results in
> endless stream of:
>
> unexpected IRQ trap at vector 00
>
> messages from
When CONFIG_LPAE is set on ARM, resource_size_t is 64-bit wide
and we get a warning about an incorrect format string for printing
the interrupt number in elm_probe:
drivers/mtd/nand/omap_elm.c: In function 'elm_probe':
drivers/mtd/nand/omap_elm.c:417:23: warning: format '%i' expects argument of
* Arnd Bergmann [151208 02:26]:
> On Tuesday 08 December 2015 12:22:09 Peter Ujfalusi wrote:
> > On 12/08/2015 11:51 AM, Arnd Bergmann wrote:
> > > On Tuesday 08 December 2015 09:42:26 Peter Ujfalusi wrote:
> > >> On 12/04/2015 11:51 PM, Tony Lindgren wrote:
> >
> >
* ker...@iktek.de [151207 09:17]:
> Hi Tony,
>
> there are two ethernet interfaces ( dual-emac-configuration ) used.
> One is connected to another 100mbit switch-ic ( refclk should come from
> switch ic ) via rmii, the other one is connected to a 1gbit fpga rgmii
> interface (
* Ulf Hansson [151208 05:18]:
> On 8 December 2015 at 01:32, Tony Lindgren wrote:
> > * Ulf Hansson [151207 16:20]:
> >> +Linus
> >>
> >> On 7 December 2015 at 23:54, Tony Lindgren wrote:
> >> > Commit
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