This is an A13 based Q8 format tablet with 512 MB of DRAM.
Signed-off-by: Chen-Yu Tsai
---
Note this just uses one of the generic dram configurations,
that is, without the zq parameters.
---
board/sunxi/Makefile | 1 +
boards.cfg | 1 +
2 files changed, 2 insertions(+)
diff --git a/
This is a Q8 format 7 inch tablet with an Allwinner A13 SoC.
It has 512MB DRAM, 4GB NAND flash, an accelerometer, camera,
RTL8188-based WiFi, and micro SD slot for external storage.
It is likely made by a subsidiary of Hanns.G (Hannstar).
Signed-off-by: Chen-Yu Tsai
---
Note that checkpatch.pl
On Thu, Sep 11, 2014 at 10:24:04AM +1000, Julian Calaby wrote:
> On Wed, Sep 10, 2014 at 5:10 PM, Maxime Ripard
> wrote:
> > On Tue, Sep 09, 2014 at 02:29:23PM +0200, Luc Verhaegen wrote:
> >> On Tue, Sep 09, 2014 at 12:05:54PM +0200, Maxime Ripard wrote:
> >> > On Mon, Sep 08, 2014 at 06:01:25PM
Hi All,
On Thu, Sep 11, 2014 at 6:16 PM, Maxime Ripard
wrote:
> On Thu, Sep 11, 2014 at 10:24:04AM +1000, Julian Calaby wrote:
>> On Wed, Sep 10, 2014 at 5:10 PM, Maxime Ripard
>> wrote:
>> > On Tue, Sep 09, 2014 at 02:29:23PM +0200, Luc Verhaegen wrote:
>> >> On Tue, Sep 09, 2014 at 12:05:54PM
Thanks for this information.
What I have to do to get this working on a BananaPi?
How I undertstand..
1. installing cedrus like here
http://linux-sunxi.org/Cedrus#CedarX_module
2. installing ffmpeg from the forum thread ?
Is that correct?
Am Donnerstag, 11. September 2014 01:00:28 UTC+2 schr
On 11 September 2014 10:16, Maxime Ripard
wrote:
> On Thu, Sep 11, 2014 at 10:24:04AM +1000, Julian Calaby wrote:
>> On Wed, Sep 10, 2014 at 5:10 PM, Maxime Ripard
>> wrote:
>> > On Tue, Sep 09, 2014 at 02:29:23PM +0200, Luc Verhaegen wrote:
>> >> On Tue, Sep 09, 2014 at 12:05:54PM +0200, Maxime
I dont know. Haven`t done this. You need a player or streaming client that is
compiled for cedarx usage.
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No, didn't really want to play that video on BananaPi, I want to stream it
forward to a WiFi device.
The BananaPi should "only" transcode the stream. :-)
So, ffmpeg would be nice, then I can incoming stream transcode to h264
codec.
Am Donnerstag, 11. September 2014 12:32:33 UTC+2 schrieb ditma..
I think it is impissible to run decoder and encoder at the same time because it
uses same memory regions.
But you can try to write converter you need. Decoder and encoder uses same
libraries. Try look at the sample codes and encode each frame after encoding.
Other way is decoding some count of fr
On Thu, Sep 11, 2014 at 03:40:32PM +0800, Chen-Yu Tsai wrote:
> This is an A13 based Q8 format tablet with 512 MB of DRAM.
>
> Signed-off-by: Chen-Yu Tsai
> ---
>
> Note this just uses one of the generic dram configurations,
> that is, without the zq parameters.
>
> ---
> board/sunxi/Makefile
I have a raw byte image stream, that means, I can feed the encoder with raw
jpeg files.
And this tream, I want to transcode into h264 codec via GPU.
This guy, is doing that via ffmpeg.
The only diffeerence I want to do is, to write it not to a file, I will
write the output to gstreamer.
And gstr
Thanks for your reply. You've given me some genuinely useful information.
If all I need to do is edit the fex file in some way to get wired
networking working then it might be worth persevering. I should point out
however, that I've already tried the script.bin file that came with the
stock And
Right. So your response is to make the message even more aggressive and
obnoxious. You just don't get it do you.
I've been following this forum for several weeks now, and I have to say the
traffic is minimal. All I ever seem to see is patch submissions, and an
occasional debate about GPL compli
On Thu, Sep 11, 2014 at 05:50:23AM -0700, Jason wrote:
> Right. So your response is to make the message even more aggressive and
> obnoxious. You just don't get it do you.
>
> I've been following this forum for several weeks now, and I have to say the
> traffic is minimal. All I ever seem to see
On Thursday, 11 September 2014 09:07:37 UTC-4, Luc Verhaegen wrote:
>
> On Thu, Sep 11, 2014 at 05:50:23AM -0700, Jason wrote:
> > Right. So your response is to make the message even more aggressive and
> > obnoxious. You just don't get it do you.
>
Aiya! Let's all take it down a notch.
Luc i
Hi All,
I asked Allwinner about the possibility of donation of a few A80 developer
boards to developers and I got a positive response. So, I'll be doing the
clerical work to arrange the donation.
There should be several batches of boards being donated.
This first batch is for five A80 OptimusBoar
Ühel kenal päeval, K, 10.09.2014 kell 14:14, kirjutas Jason:
> Luc, I deliberately ignored your earlier sarcasm. If you don't want
> to help then that's fine no one's forcing you to. But your incessant
> (and utterly pointless) RTFM style responses to every question are
> now becoming irritatin
On Tuesday, 9 September 2014 09:45:46 UTC-4, Luc Verhaegen wrote:
>
> But we have to start using the
> SDKs more for A31(s), A23, A33 and A80 and all chips going forwards.
>
Are we able/allowed to host those SDK's somewhere? I know a few are on the
linux-sunxi.org server, but can publicly host
Hi Ian, Hans,
On Mon, Sep 8, 2014 at 9:28 PM, Chen-Yu Tsai wrote:
> BOOT_TARGET_DEVICES includes USB unconditionally. This breaks when
> CONFIG_CMD_USB is not defined. Use a secondary macro to conditionally
> include it when CONFIG_EHCI is enabled, as we do for CONFIG_AHCI.
The other patches are
On Thu, Sep 11, 2014 at 05:22:21PM +0300, Simos Xenitellis wrote:
> Hi All,
>
> I asked Allwinner about the possibility of donation of a few A80 developer
> boards to developers and I got a positive response. So, I'll be doing the
> clerical work to arrange the donation.
>
> There should be sever
On Thu, Sep 11, 2014 at 07:33:19AM -0700, Tim Tisdall wrote:
> On Tuesday, 9 September 2014 09:45:46 UTC-4, Luc Verhaegen wrote:
> >
> > But we have to start using the
> > SDKs more for A31(s), A23, A33 and A80 and all chips going forwards.
> >
>
> Are we able/allowed to host those SDK's somewhe
Hi Chen,
On 09/11/2014 07:07 PM, Chen-Yu Tsai wrote:
> Hi Ian, Hans,
>
> On Mon, Sep 8, 2014 at 9:28 PM, Chen-Yu Tsai wrote:
>> BOOT_TARGET_DEVICES includes USB unconditionally. This breaks when
>> CONFIG_CMD_USB is not defined. Use a secondary macro to conditionally
>> include it when CONFIG_EH
On Thu, 2014-09-11 at 19:19 +0200, Hans de Goede wrote:
> Hi Chen,
>
> On 09/11/2014 07:07 PM, Chen-Yu Tsai wrote:
> > Hi Ian, Hans,
> >
> > On Mon, Sep 8, 2014 at 9:28 PM, Chen-Yu Tsai wrote:
> >> BOOT_TARGET_DEVICES includes USB unconditionally. This breaks when
> >> CONFIG_CMD_USB is not defi
tor 2014-09-11 klockan 07:33 -0700 skrev Tim Tisdall:
> Are we able/allowed to host those SDK's somewhere? I know a few are
> on the linux-sunxi.org server, but can publicly host them on github or
> something like that?
I don't see any reason why not, as long as github (or whoever you use)
acce
Jason, try running lsusb and posting the results. A lot of Wi-Fi chips
will be some slight variant that requires its own driver and I have found
the id is the best place to start.
Keep in mind if your driver isn't in the community's kernel already porting
is probably required.
Don't give up, you
The sun5i defconfig default of CONFIG_SW_DEBUG_UART=1 is wrong
on all devices except for those who use CONS_INDEX=2 in uboot. In
others, both A10s as A13, it leads to a system which hardlocks.
UART0 with the default pinmux can never lead to a working UART on A13,
as these pins are not available on
Signed-off-by: Luc Verhaegen
---
arch/arm/configs/sun5i_defconfig |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/configs/sun5i_defconfig b/arch/arm/configs/sun5i_defconfig
index f837d69..da0e418 100644
--- a/arch/arm/configs/sun5i_defconfig
+++ b/arch/arm/confi
Just some stuff that i had lying around which is not in our sunxi-3.4 yet.
3/4 is rather important, as it makes a10s and some a13 device actually boot.
4/4 is an older patch by paulk which i think should just go in as upstream has
done the same in a much later kernel tree.
Luc Verhaegen.
--
You
From: Paul Kocialkowski
Signed-off-by: Paul Kocialkowski
---
include/drm/drm.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 64ff02d..33ed74a 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -36,7 +36,7 @@
#ifndef
Fails to build anyway.
Signed-off-by: Luc Verhaegen
---
arch/arm/configs/sun7i_defconfig |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/arm/configs/sun7i_defconfig b/arch/arm/configs/sun7i_defconfig
index 455ebcc..8e81652 100644
--- a/arch/arm/configs/sun7i_defconf
> Anyway, I'll upload the fex file and the u-boot batches this weekend,
> assuming of course that Luc hasn't locked my account by that time.
Please upload photos as well.
Stefan
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Hi Chen-Yu,
On Sat, Sep 06, 2014 at 06:47:21PM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
>
> This series unifies the mux and divider parts of the AHB1 clock found
> on sun6i and sun8i, while also adding support for the pre-divider on
> the PLL6 input.
>
> The rate calculation logic must factor i
On Sat, Sep 06, 2014 at 06:47:22PM +0800, Chen-Yu Tsai wrote:
> Some factor clocks, mostly PLLs, have an extra fixed divider just before
> the clock output. Add an option to the factor clk driver config data to
> specify this divider.
>
> Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Tha
On Sat, Sep 06, 2014 at 06:47:23PM +0800, Chen-Yu Tsai wrote:
> The N factor for PLL6 counts from 1 to 32, as specified in the A23
> manual, and shown in Allwinner's original A31 code.
>
> Also the PLL6 factors alone calculate the clock rate for PLL6x2, not
> the normal halved output for PLL6. Thi
Hi,
On Sat, Sep 06, 2014 at 06:47:24PM +0800, Chen-Yu Tsai wrote:
> This patch unifies the sun6i AHB1 clock, originally supported
> with separate mux and divider clks. It also adds support for
> the pre-divider on the PLL6 input, thus allowing the clock to
> be muxed to PLL6 with proper clock rate
On Sat, Sep 06, 2014 at 06:47:28PM +0800, Chen-Yu Tsai wrote:
> The sun6i DMA controller requires the AHB1 bus clock to be
> clocked from PLL6. This was originally done by the dmaengine
> driver during probe time. The AHB1 clock driver has since been
> unified, so the original code does not work.
>
On Sat, Sep 06, 2014 at 06:47:27PM +0800, Chen-Yu Tsai wrote:
> The DMA controller requires AHB1 bus clock to be clocked from PLL6.
>
> Signed-off-by: Chen-Yu Tsai
> ---
> arch/arm/boot/dts/sun6i-a31.dtsi | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun6i-a31.
On Fri, Sep 12, 2014 at 5:15 AM, Maxime Ripard
wrote:
> On Sat, Sep 06, 2014 at 06:47:27PM +0800, Chen-Yu Tsai wrote:
>> The DMA controller requires AHB1 bus clock to be clocked from PLL6.
>>
>> Signed-off-by: Chen-Yu Tsai
>> ---
>> arch/arm/boot/dts/sun6i-a31.dtsi | 5 +
>> 1 file changed,
Hi,
On Fri, Sep 12, 2014 at 5:02 AM, Maxime Ripard
wrote:
> Hi,
>
> On Sat, Sep 06, 2014 at 06:47:24PM +0800, Chen-Yu Tsai wrote:
>> This patch unifies the sun6i AHB1 clock, originally supported
>> with separate mux and divider clks. It also adds support for
>> the pre-divider on the PLL6 input,
Pushed, along with a23 memory controller register dumps.
On Mon, Sep 1, 2014 at 12:40 PM, Chen-Yu Tsai wrote:
> Signed-off-by: Chen-Yu Tsai
> ---
>
> I want to get some input before i push this.
> Is the dram_zq parameter suppose to be filled?
> or just the lower 8 bits? It seems all the other
>
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