On Monday, September 22, 2014 8:24:21 AM UTC+3, Tom Cubie wrote:
>
> On Mon, Sep 22, 2014 at 1:02 PM, AndrewDB > wrote:
> > For what it's worth, I fully support Luc's actions to document
> Allwinner's
> > GPL violations.
> >
> > I also believe it is in Allwinner's interest to fully comply w
On Sun, Sep 21, 2014 at 10:02:15PM -0700, AndrewDB wrote:
> For what it's worth, I fully support Luc's actions to document Allwinner's
> GPL violations.
>
> I also believe it is in Allwinner's interest to fully comply with the GPL
> and that it's a pity that they don't understand this. How many
Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature.
Signed-off-by: Wills Wang
---
drivers/mmc/sunxi_mmc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 459e476..0f3ee67 100644
--- a/drivers/mmc/sunxi_mmc.c
+++
On Thu, Sep 11, 2014 at 5:22 PM, Simos Xenitellis <
simos.li...@googlemail.com> wrote:
> Hi All,
>
> I asked Allwinner about the possibility of donation of a few A80 developer
> boards to developers and I got a positive response. So, I'll be doing the
> clerical work to arrange the donation.
>
> T
On Mon, Sep 22, 2014 at 2:35 AM, Ian Campbell wrote:
> On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
>
>> +#ifdef CONFIG_SPL_BUILD
>
> Since there is no SPL support this is dead code right now, correct?
This was part of Hans' attempt to support SPL. It was not finished.
> I'm wondering
On Mon, 2014-09-22 at 20:47 +0800, Chen-Yu Tsai wrote:
> On Mon, Sep 22, 2014 at 2:35 AM, Ian Campbell wrote:
> > On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
> >> + /* Set PLL ldo voltage without this PLL6 does not work properly */
> >
> > Is "this" here the doing it 3 times bit? If
On Mon, Sep 22, 2014 at 9:15 PM, Ian Campbell wrote:
> On Mon, 2014-09-22 at 20:47 +0800, Chen-Yu Tsai wrote:
>> On Mon, Sep 22, 2014 at 2:35 AM, Ian Campbell wrote:
>> > On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
>> >> + /* Set PLL ldo voltage without this PLL6 does not work prop
Hi Jon,
The A20 does not support SCCB protocol. Did you manage to get a working
sccb driver for the ov2643 working over i2c for the A20? What did you do to
get it working.
Thanks.
On Sunday, January 5, 2014 7:19:05 PM UTC+2, Jon Smirl wrote:
>
> The unit has a Chinese Android build on it whic
On Mon, Sep 22, 2014 at 2:10 PM, Michael Trimarchi
wrote:
> Hi
>
> Il 08/set/2014 15:36 "Chen-Yu Tsai" ha scritto:
>
>
>>
>> From: Maxime Ripard
>>
>> Signed-off-by: Maxime Ripard
>> Signed-off-by: Hans de Goede
>> [w...@csie.org: commit message was "ARM: sunxi: Setup the A31 UART0
>> muxing"]
George has i2c working.
On Mon, Sep 22, 2014 at 9:16 AM, Joseph Nguya
wrote:
> Hi Jon,
>
> The A20 does not support SCCB protocol. Did you manage to get a working
> sccb driver for the ov2643 working over i2c for the A20? What did you do to
> get it working.
>
> Thanks.
>
>
> On Sunday, January
On Mon, Sep 22, 2014 at 3:01 AM, Maxime Ripard
wrote:
> Hi Ian,
>
> On Sun, Sep 21, 2014 at 07:51:17PM +0100, Ian Campbell wrote:
>> On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
>> > From: Maxime Ripard
>> >
>> > Add a new sun6i machine that doesn't do much for now.
>>
>> Can you briefl
Are you able to share your ov2643.c driver; for what kernel was it built
On Monday, September 22, 2014 3:30:23 PM UTC+2, Jon Smirl wrote:
>
> George has i2c working.
>
> On Mon, Sep 22, 2014 at 9:16 AM, Joseph Nguya > wrote:
>
>> Hi Jon,
>>
>> The A20 does not support SCCB protocol. Did you manag
On Mon, Sep 22, 2014 at 9:48 AM, Joseph Nguya
wrote:
> Are you able to share your ov2643.c driver; for what kernel was it built
>
> George is using OV5642.
> On Monday, September 22, 2014 3:30:23 PM UTC+2, Jon Smirl wrote:
>>
>> George has i2c working.
>>
>> On Mon, Sep 22, 2014 at 9:16 AM, Jo
Thanks, we'll try.
On Monday, September 22, 2014 3:50:18 PM UTC+2, Jon Smirl wrote:
>
> On Mon, Sep 22, 2014 at 9:48 AM, Joseph Nguya > wrote:
>
>> Are you able to share your ov2643.c driver; for what kernel was it built
>>
>> George is using OV5642.
>
>
>
>> On Monday, September 22, 2014 3:30:
Yes, basic SCCB/I2C communication is working but the actual drivers do not
work. From what I can tell all of the OmniVision cameras use the same
SCCB/I2C communication and the only difference are the register definitions
and settings.
Unfortunately I have not been successful in getting the driv
Hi,
Following the series adding ONFI timing mode support, here is a series
adding support for timing mode retrieval on non-ONFI NANDs.
It just adds a new field to the nand_chip and nand_flash_dev struct so
that anyone can define its chip requirements in the nand_ids table.
The 2nd patch serves a
Add an onfi_timing_mode_default field to nand_chip and nand_flash_dev in
order to support NAND timings definition for non-ONFI NAND.
NAND that support better timings mode than the default one have to define
a new entry in the nand_ids table.
The default timing mode should be deduced from timings
Add the full description of the Hynix H27UCG8T2ATR-BC NAND chip in the
nand_ids table so that we can later use the NAND ECC infos and ONFI timings
mode in controller drivers.
Signed-off-by: Boris BREZILLON
---
drivers/mtd/nand/nand_ids.c | 4
1 file changed, 4 insertions(+)
diff --git a/dr
Add the sunxi NAND Flash Controller dt bindings documentation.
Signed-off-by: Boris BREZILLON
---
.../devicetree/bindings/mtd/sunxi-nand.txt | 45 ++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/sunxi-nand.txt
diff --git
Add support for the sunxi NAND Flash Controller (NFC).
Signed-off-by: Boris BREZILLON
---
drivers/mtd/nand/Kconfig |6 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/sunxi_nand.c | 1362 +
3 files changed, 1369 insertions(+)
create mo
Hi,
This patch series adds support for the sunxi NAND Flash Controller (NFC)
block.
These two patches only add support for the basic NAND stuff:
- NAND controller operations
- SW and HW ECC handling (with both syndrome and normal ECC scheme)
If you want support for advanced features you can fi
On Mon, Sep 22, 2014 at 04:25:10PM +0200, Boris BREZILLON wrote:
> Add an onfi_timing_mode_default field to nand_chip and nand_flash_dev in
> order to support NAND timings definition for non-ONFI NAND.
>
> NAND that support better timings mode than the default one have to define
> a new entry in t
Add the full description of the Hynix H27UCG8T2ATR-BC NAND chip in the
nand_ids table so that we can later use the NAND ECC infos and ONFI timings
mode in controller drivers.
Signed-off-by: Boris BREZILLON
---
drivers/mtd/nand/nand_ids.c | 4
1 file changed, 4 insertions(+)
diff --git a/dr
Add an onfi_timing_mode_default field to nand_chip and nand_flash_dev in
order to support NAND timings definition for non-ONFI NAND.
NAND that support better timings mode than the default one have to define
a new entry in the nand_ids table.
The default timing mode should be deduced from timings
Hi,
Following the series adding ONFI timing mode support, here is a series
adding support for timing mode retrieval on non-ONFI NANDs.
It just adds a new field to the nand_chip and nand_flash_dev struct so
that anyone can define its chip requirements in the nand_ids table.
The 2nd patch serves a
On Mon, 22 Sep 2014 10:58:34 -0700
Brian Norris wrote:
> On Mon, Sep 22, 2014 at 04:25:10PM +0200, Boris BREZILLON wrote:
> > Add an onfi_timing_mode_default field to nand_chip and nand_flash_dev in
> > order to support NAND timings definition for non-ONFI NAND.
> >
> > NAND that support better
> diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
> index b7c1199..b0b74cc 100644
> --- a/include/linux/mtd/nand.h
> +++ b/include/linux/mtd/nand.h
> @@ -587,6 +587,11 @@ struct nand_buffers {
> * @ecc_step_ds: [INTERN] ECC step required by the @ecc_strength_ds,
> *
Hi list,
long time, no write.
Where did this come from may I ask? I was in contact with Eva about a
month or so ago (august) where I supplied them with a list of code
committers. Did you meanwhile submit this list? I do hope we are not
asking in tripples and making AW feel we're just being gr
On Mon, Sep 22, 2014 at 11:14 PM, Olliver Schinagl
wrote:
> Hi list,
>
> long time, no write.
>
> Where did this come from may I ask? I was in contact with Eva about a
> month or so ago (august) where I supplied them with a list of code
> committers. Did you meanwhile submit this list? I do hope
Check the YBKJ A20 JN device page in the wiki and specially my discussion
with libv about the name of the device.
Honestly, I don't have any time to waste on arguing about the name of a
generic, no-brand device, and whether XYZ1234 or StinkyFart2 is less
arbitrary (I prefer the later though). Al
Again: check the YBKJ A20 JN device page in the wiki and specially my
discussion with libv about the name of the device.
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Hi,
I was the author of the YBKJ A20 wiki page. I couldn’t find any identifying
brands or manufacturers in the items I received or on the web. I think “YBKJ”
is a stupid name (that I continually misspell) but I couldn’t for the life of
me come up with anything better.
FYI I had to increase the
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