[linux-sunxi] Re: [PATCH v3 2/2] ASOC: sunxi: Add support for the SPDIF block

On 2 February 2016 at 22:17, Maxime Ripard wrote: > Hi, > > It looks mostly good on my side, a few comments though. > > On Tue, Feb 02, 2016 at 03:49:54PM +0100, codekip...@gmail.com wrote: >> +#ifdef CONFIG_PM >> +static int sun4i_spdif_runtime_suspend(struct

[linux-sunxi] Re: [PATCH v2 2/5] dts: sun8i-h3: Add APB0 related clocks and resets

Hi, On Tue, Feb 02, 2016 at 10:21:50PM +0100, Krzysztof Adamski wrote: > APB0 is bearly mentioned in H3 User Manual and it is only setup in the > Allwinners kernel dump for CIR. I have verified experimentally that the > gate for R_PIO exists and works, though. There are probably other gates >

[linux-sunxi] Standalone patch for ethernet USB OTG on A20 ?

Hello everybody, I’m currently building a project on top of an Olimex LIME A20 board. On sunxi kernel 3.4, ethernet over USB OTG is working, but on vanilla kernel 4.x, nothing works. Is there any standalone 3.4 patch available for USB OTG I can port to vanilla 4.x ? I look into 3.4 git

[linux-sunxi] Re: [PATCH v2 05/26] clk: sunxi: Add display and TCON0 clocks driver

On Sat, Jan 16, 2016 at 11:29:41PM +0800, Chen-Yu Tsai wrote: > Hi, > > On Thu, Jan 14, 2016 at 11:24 PM, Maxime Ripard > wrote: > > The A10 SoCs and its relatives has a special clock controller to drive the > > display engines (both frontend and backend), that

[linux-sunxi] Re: [PATCH v2 07/26] clk: sunxi: Add TCON channel1 clock

Hi, On Sun, Jan 17, 2016 at 12:36:20AM +0800, Chen-Yu Tsai wrote: > Hi, > > On Thu, Jan 14, 2016 at 11:24 PM, Maxime Ripard > wrote: > > The TCON is a controller generating the timings to output videos signals, > > acting like both a CRTC and an encoder. > > >

[linux-sunxi] Re: [PATCH v2 06/26] clk: sunxi: Add PLL3 clock

On Sun, Jan 17, 2016 at 12:05:06AM +0800, Chen-Yu Tsai wrote: > Hi, > > On Thu, Jan 14, 2016 at 11:24 PM, Maxime Ripard > wrote: > > The A10 SoCs and relatives have a PLL controller to drive the PLL3 and > > PLL7, clocked from a 3MHz oscillator, that drives the

[linux-sunxi] Re: [PATCH v2 17/26] drm: sun4i: Add DT bindings documentation

On Wed, Feb 03, 2016 at 02:19:31PM -0600, Rob Herring wrote: > >> > +Required properties: > >> > + - compatible: value must be one of: > >> > +* allwinner,sun5i-a13-display-engine > >> > + - allwinner,pipelines: list of phandle to the entry points of the > >> > +pipelines (either to the

[linux-sunxi] Re: [PATCH v2 17/26] drm: sun4i: Add DT bindings documentation

On Wed, Feb 3, 2016 at 1:59 PM, Maxime Ripard wrote: > Hi Rob, > > On Thu, Jan 14, 2016 at 09:15:15PM -0600, Rob Herring wrote: >> On Thu, Jan 14, 2016 at 04:25:00PM +0100, Maxime Ripard wrote: >> > The display pipeline of the Allwinner A10 is involving several

[linux-sunxi] Re: [PATCH v2 2/5] dts: sun8i-h3: Add APB0 related clocks and resets

On Wed, Feb 03, 2016 at 01:35:34PM +0100, Maxime Ripard wrote: Hi, On Tue, Feb 02, 2016 at 10:21:50PM +0100, Krzysztof Adamski wrote: APB0 is bearly mentioned in H3 User Manual and it is only setup in the Allwinners kernel dump for CIR. I have verified experimentally that the gate for R_PIO

[linux-sunxi] Re: [PATCH v3 00/12] pwm: add support for atomic update

On Mon, Jan 25, 2016 at 10:51:20AM -0800, Doug Anderson wrote: > Hi, > > On Mon, Jan 25, 2016 at 9:08 AM, Thierry Reding > wrote: > > I really don't understand this design decision. I presume that the PWM > > controlling this system-critical logic is driven by the SoC?

[linux-sunxi] [PATCH v3 2/5] dts: sun8i-h3: Add APB0 related clocks and resets

APB0 is bearly mentioned in H3 User Manual and it is only setup in the Allwinners kernel dump for CIR. I have verified experimentally that the gate for R_PIO exists and works, though. There are probably other gates there but I don't know their order right now and I don't have access to their

[linux-sunxi] [PATCH v3 0/5] pinctrl: sunxi: Add H3 R_PIO controller support

This patch series is extension of my original single patch with the same subject. It adds support for R_PIO so that GPIO port L can be used in H3 based devices. It was tested on OrangePi PC where PL is connected amount others to an onboard led, a switch, an IR receiver and some VCC controllers.

[linux-sunxi] [PATCH v3 1/5] clk: sunxi: Add apb0 gates for H3

This patch adds support for APB0 in H3. It seems to be compatible with earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO, R_IR, etc). Signed-off-by: Krzysztof Adamski --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-simple-gates.c

[linux-sunxi] [PATCH v3 3/5] pinctrl: sunxi: Add H3 R_PIO controller support

H3 has additional PIO controller similar to what we can find on A23. It's a 12 pin port, described in H3 Datasheet rev 1.1, pages 345-350. Signed-off-by: Krzysztof Adamski --- .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + drivers/pinctrl/sunxi/Kconfig

[linux-sunxi] [PATCH v3 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi

Add the corresponding device node for R_PIO on H3 to the dtsi. Support for the controller was added in earlier commit. Signed-off-by: Krzysztof Adamski --- arch/arm/boot/dts/sun8i-h3.dtsi | 12 1 file changed, 12 insertions(+) diff --git

[linux-sunxi] [PATCH v3 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set

sunxi_pmx_set accepts pin number and then calculates offset by subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand, gets offset so we have to convert it to pin number so we won't get negative value in sunxi_pmx_set. This was only used on A10 so far, where there is only one

[linux-sunxi] Re: [PATCH v2 2/5] dts: sun8i-h3: Add APB0 related clocks and resets

On Wed, Feb 03, 2016 at 11:21:17PM +0100, Krzysztof Adamski wrote: On Wed, Feb 03, 2016 at 01:35:34PM +0100, Maxime Ripard wrote: Hi, I'm not sure what you mean there. The fixed factor clocks only take a single parent, and you provided two. True, I that's actually some stupid leftover. As

[linux-sunxi] Re: [PATCH v4 2/2] [stage/sunxi-3.4] Add support for Allwinner (DVB/ATSC) Transport Stream Controller(s) (TSC)

在 2014年8月12日星期二 UTC+8下午11:20:16，anuroop kamu写道： > Hi Miska, Thanks for that Doc > > > I am still not able to visualize it fully. if this Tsc driver works well, > which buffer/fifo will the data be available?  > Do I need to make a separate media player app to get this data? Or any > default

[linux-sunxi] Re: [PATCH 04/14] clk: sunxi: add ahb1 clock for A83T

Hello Maxime, On Tue, Feb 2, 2016 at 9:17 PM, Maxime Ripard wrote: > Hi, > > On Sun, Jan 31, 2016 at 09:20:56AM +0800, Vishnu Patekar wrote: >> AHB1 on A83T is similar to ahb1 on A31, except parents are different. >> clock index 0b1x is PLL6. >> >>

[linux-sunxi] Re: [PATCH 14/14] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

Hello Wens, On Tue, Feb 2, 2016 at 3:37 PM, Chen-Yu Tsai wrote: > > On Sun, Jan 31, 2016 at 9:21 AM, Vishnu Patekar > wrote: > > This patch adds support for Sinovoip BPI-M3 A83T based board. > > > > It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB

[linux-sunxi] Re: [PATCH v2 3/5] pinctrl: sunxi: Add H3 R_PIO controller support

On Tue, Feb 02, 2016 at 10:21:51PM +0100, Krzysztof Adamski wrote: > H3 has additional PIO controller similar to what we can find on A23. > It's a 12 pin port, described in H3 Datasheet rev 1.1, pages 345-350. > > Signed-off-by: Krzysztof Adamski Acked-by: Maxime Ripard

[linux-sunxi] Re: [PATCH 06/11] regulator: axp20x: support AXP809 variant

On Tue, Feb 02, 2016 at 06:27:39PM +0800, Chen-Yu Tsai wrote: > The X-Powers AXP809 PMIC has a similar set of regulators as the AXP221, > though a few LDOs were removed, and a new switch output added. Like the > AXP221, AXP809 also has DC1SW and DC5LDO, which are internally chained > to DCDC1 and

[linux-sunxi] awusb kernel: primary git repository and mainlining

Hi there, where is awusb kernel driver's primary git repository? I've found it as a part of Livesuite git repository [1] and also as a part of allwinner-tools.git. Wiki page LiveSuit [3] mentions [1] as a git repository. I think it would be nice to have it as a separate project, which would be

[linux-sunxi] Re: [PATCH v3 00/12] pwm: add support for atomic update

Thierry On Wed, Feb 3, 2016 at 6:53 AM, Thierry Reding wrote: >> A) The software state here is the period and flags (AKA "inverted), >> right? It does seem possible that you could apply the period and >> flags while keeping the calculated bootup duty cycle percentage

[linux-sunxi] Re: [PATCH v2 17/26] drm: sun4i: Add DT bindings documentation

Hi Rob, On Thu, Jan 14, 2016 at 09:15:15PM -0600, Rob Herring wrote: > On Thu, Jan 14, 2016 at 04:25:00PM +0100, Maxime Ripard wrote: > > The display pipeline of the Allwinner A10 is involving several loosely > > coupled components. > > > > Add a documentation for the bindings. > > > >

[linux-sunxi] Fwd: Us congress hearing of maan alsaan Money laundry قضية الكونغجرس لغسيل الأموال للمليادير معن الصانع

YouTube videos of U.S. Congress money laundering hearing of Saudi Billionaire " Maan Al sanea" with *bank of America* and The owner of Saad Hospital and Schools in the Eastern Province in *Saudi Arabia* and the Chairman of the Board of Directors of Awal Bank in *Bahrain*