Can someone please point me to a u-boot that works on the Sochip S3?
V3S is DDR2, S3 is DDR3.
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Widora has made a dev board for it
https://item.taobao.com/item.htm?spm=a230r.1.14.1.164f3c8blfHq8u&id=587925184119&ns=1&abbucket=15#detail
On Fri, Sep 13, 2019 at 12:38 PM jonsm...@gmail.com wrote:
>
> Any know what is up with the Allwinner R11? Are they bringing ba
voice
interaction solution.
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r. Tried booting
>>>> >> both
>>>> >> from USB and SDcard.
>>>> >>
>>>> >> Digging through the commit messages for v3s mainline u-boot support
>>>> >> I've
>>>> >> noticed that SPL is disabl
can't determine one way or
the other if it does.
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multiple output streams?
>From what I can tell from the non-existent information in the
datasheet, this is the same old Allwinner CedarX unit.
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To uns
;> Petar
>
>
> Yes and then it restarts SPL. However I can't yet figure out why it is
> happening.
> u-boot-sunxi-with-spl.bin builds just fine. Can't understand why it fails to
> load.
>
> Clear the head first and then back to debugging I guess :)
If the image d
;> >> SPL: failed to boot from all boot devices
>> >> ### ERROR ### Please RESET the board ###
>> >
>> > So I guess I'm missing something. My head is not really clear atm.
>> >
>> > I'v also tried booting from USB for easier devel
On Sat, Jan 14, 2017 at 2:53 PM, André Przywara wrote:
> On 14/01/17 16:20, jonsm...@gmail.com wrote:
>> The Allwinner kernel referenced in this thread has source for working
>> DDR eMMC mode on the A64.
>>
>> http://forum.banana-pi.org/t/bpi-m64-android-6-0-1-sour
PS - I misinterpreted your commit message to mean that you were using
simultaneous MACs.
On Sat, Jan 14, 2017 at 11:15 AM, jonsm...@gmail.com wrote:
> On Sat, Jan 14, 2017 at 10:42 AM, André Przywara
> wrote:
>> On 14/01/17 14:42, jonsm...@gmail.com wrote:
>>
>> Hi Jo
extracted and applied to mainlining efforts.
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On Sat, Jan 14, 2017 at 10:42 AM, André Przywara wrote:
> On 14/01/17 14:42, jonsm...@gmail.com wrote:
>
> Hi Jon,
>
> (dropping the U-Boot ML, since this is not all related to to OpiZero or
> to U-Boot. Next time please send a separate email (opening a new
> thread). And
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On Wed, Jan 4, 2017 at 5:36 PM, André Przywara wrote:
> On 04/01/17 19:00, jonsm...@gmail.com wrote:
>> On Wed, Jan 4, 2017 at 12:29 PM, André Przywara
>> wrote:
>>> On 04/01/17 16:40, jonsm...@gmail.com wrote:
>>>> On Wed, Jan 4, 2017 at 8:36 AM, André Przy
On Wed, Jan 4, 2017 at 12:29 PM, André Przywara wrote:
> On 04/01/17 16:40, jonsm...@gmail.com wrote:
>> On Wed, Jan 4, 2017 at 8:36 AM, André Przywara
>> wrote:
>>>
>>> On 04/01/17 11:25, Chen-Yu Tsai wrote:
>>>> On Wed, Jan 4, 2017 at 6:28 PM, Jaga
On Wed, Jan 4, 2017 at 12:29 PM, André Przywara wrote:
> On 04/01/17 16:40, jonsm...@gmail.com wrote:
>> On Wed, Jan 4, 2017 at 8:36 AM, André Przywara
>> wrote:
>>>
>>> On 04/01/17 11:25, Chen-Yu Tsai wrote:
>>>> On Wed, Jan 4, 2017 at 6:28 PM, Jaga
On Wed, Jan 4, 2017 at 8:36 AM, André Przywara wrote:
>
> On 04/01/17 11:25, Chen-Yu Tsai wrote:
> > On Wed, Jan 4, 2017 at 6:28 PM, Jagan Teki wrote:
> >> On Tue, Jan 3, 2017 at 2:52 PM, jonsm...@gmail.com
> >> wrote:
> >>> On Tue, Jan 3, 2017 at 5:
On Tue, Jan 3, 2017 at 5:41 AM, Jagan Teki wrote:
> On Tue, Jan 3, 2017 at 3:38 AM, jonsm...@gmail.com wrote:
>> I recently ran into a probably with the UARTs on the A64. Many
>> Bluetooth modules (like Ampak) use the UART. The data rate of EDR BT
>> is 3Mb/s with about 2
| 50 ++-
> 34 files changed, 713 insertions(+), 201 deletions(-)
> create mode 100644 arch/arm/cpu/armv8/lowlevel_init.S
> create mode 100644 arch/arm/mach-sunxi/rmr_switch.S
> create mode 100644 arch/arm/mach-sunxi/spl_switch.c
> create mode 100644 c
g that kills the console. The console's UART clock was
calculated for a 24Mhz input clock. When you change the clock parent
over to 1.2Ghz the console dies. So this parent switch needs to be
done in uboot, not Linux.
Can anyone help out with a uboot that changes this clock parent over
to per
i" group.
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On Tue, Sep 20, 2016 at 11:50 AM, Andre Przywara wrote:
> Hi,
>
> On 20/09/16 15:49, jonsm...@gmail.com wrote:
>> On Tue, Sep 20, 2016 at 10:45 AM, jonsm...@gmail.com
>> wrote:
>>> On Tue, Sep 20, 2016 at 10:10 AM, TsvetanUsunov
>>> wrote:
>>>
On Tue, Sep 20, 2016 at 10:45 AM, jonsm...@gmail.com wrote:
> On Tue, Sep 20, 2016 at 10:10 AM, TsvetanUsunov
> wrote:
>>
>>
>> понеделник, 19 септември 2016 г., 20:06:13 UTC+3, Hans de Goede написа:
>>>
>>> Hi,
>>>
>>> On 19-09-16 1
kingston.com/us/embedded/emmc
They come in wide temp
https://media.kingston.com/pdfs/emmc/i_temp_eMMC_Product_Flyer.pdf
About $5 for 4GB from US distributors, so probably $3 from Chinese one.
Random check of similar Kingston part from Chinese supplier - $3.38
Support for HS200/HS400 is already in kernel so someo
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,
>> it is usually just a matter of manually copy and pasting the right
>> bits together to get a dts.
>
>
> As mentioned above, we still need a guide that maps between script.bin and
> the rather confusing dts file format.
>
> --
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, jonsm...@gmail.com wrote:
> There is code from Allwinner in their u-boot implementation for
> implementing fastboot. So far I have been unsuccessful in getting it
> to work. Has anyone succeeded in getting it to work before I dive in
> and try fixing it?
>
> https://gitlab.com/pin
/usb_sunxi/usb_fastboot.c
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For mo
repos at github. And the
lichee repo at gitlab. Files in the lichee repo are too large for
github.
A wonderful next step would be to get rid of lichee/brandy and convert
over to mainline linux/uboot.
Let me know if there are any problem with the build, it is not well tested yet.
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jo
disp[1]:17
[ 231.922517] hwc force flip disp[1]:18
[ 231.972551] hwc force flip disp[1]:19
[ 232.022577] hwc force flip disp[1]:20
[ 232.072615] hwc force flip disp[1]:21
[ 232.122645] hwc force flip disp[1]:22
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The Pine64 has the OTG controller attached to the top normal USB jack.
So there is no OTG detection pin to tell the OTG controller when to
switch between host and device mode.
Is there some way to manually poke the kernel and force the port to
switch modes?
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-is-still-legal-under-certain-conditions/
Or do these new rules only apply to routers and not end devices?
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On Fri, Apr 22, 2016 at 7:29 AM, jonsm...@gmail.com wrote:
> On Fri, Apr 22, 2016 at 1:36 AM, Siarhei Siamashka
> wrote:
>> On Thu, 21 Apr 2016 19:56:10 -0400
>> "jonsm...@gmail.com" wrote:
>>
>>> On Thu, Apr 21, 2016 at 7:45 PM, jonsm...@gmail.com
On Fri, Apr 22, 2016 at 1:36 AM, Siarhei Siamashka
wrote:
> On Thu, 21 Apr 2016 19:56:10 -0400
> "jonsm...@gmail.com" wrote:
>
>> On Thu, Apr 21, 2016 at 7:45 PM, jonsm...@gmail.com
>> wrote:
>> > On Thu, Apr 21, 2016 at 6:01 PM, Siarhei Siamashka
&g
On Thu, Apr 21, 2016 at 7:45 PM, jonsm...@gmail.com wrote:
> On Thu, Apr 21, 2016 at 6:01 PM, Siarhei Siamashka
> wrote:
>> On Thu, 21 Apr 2016 16:14:13 -0400
>> "jonsm...@gmail.com" wrote:
>>
>>> On Thu, Apr 21, 2016 at 4:09 PM, Siarhei Siamashka
>
On Thu, Apr 21, 2016 at 6:01 PM, Siarhei Siamashka
wrote:
> On Thu, 21 Apr 2016 16:14:13 -0400
> "jonsm...@gmail.com" wrote:
>
>> On Thu, Apr 21, 2016 at 4:09 PM, Siarhei Siamashka
>> wrote:
>> > On Thu, 21 Apr 2016 13:38:19 -0400
>> > "
the MMC
flash.
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On Fri, Apr 1, 2016 at 6:50 PM, jonsm...@gmail.com wrote:
> What CPUs do these Allwinner dev boards correspond to?
>
> 15. octopus_f1-user
A83
> 17. astar_h7-user
A33
> 19. jasmine_perf-user
can't find this one
> 29. kylin_p2-user
A80
> 33
What CPUs do these Allwinner dev boards correspond to?
15. octopus_f1-user
17. astar_h7-user
19. jasmine_perf-user
29. kylin_p2-user
33. tulip_p1-user
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Does Allwinner H3 Android 4.4 run on the mainline H3 kernel?
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On Mon, Mar 14, 2016 at 2:22 PM, Manuel Braga wrote:
> On Sun, 13 Mar 2016 18:00:17 -0400 "jonsm...@gmail.com"
> wrote:
>> On Sun, Mar 13, 2016 at 5:16 PM, Manuel Braga
>> wrote:
>> > On Sun, 13 Mar 2016 13:28:22 -0500 Rosimildo DaSilva
>> > wrote
gt; >
>> > > > Rosimildo,
>> > > >
>> > > > Do you think you can do a rework on this ffmpeg tree and glue a
>> > > > C version of what you have achieved so far?
>> > > >
>> > > >
>> > > > On
On Sat, Mar 12, 2016 at 7:38 PM, jonsm...@gmail.com wrote:
> On Sat, Mar 12, 2016 at 7:37 PM, @lex wrote:
>> You are right, i changed the input format to NV12 on GuvcView and got lower
>> CPU usage (250%) and Temp ~75C.
>> I does not help much overall.
>
> You need an
.000 fps)
>>>> >> Size: Discrete 640x480
>>>> >> Interval: Discrete 0.033s (30.000 fps)
>>>> >> Interval: Discrete 0.050s (20.000 fps)
>>>> >> Interval: Discrete 0.067s (15.000 fps)
>>>> >> Interval: Discrete 0.100s
ab
>> >> >> >> >> video
>> >> >> >> >> from
>> >> >> >> >> this generic driver how good this camera performs?
>> >> >> >> >>
>> >> >> >> >> On Frida
on an ARM9
vendor kernel when the vendor does not update their code. I am porting
features from the current kernel back to their old system. I don't
have the source for everything to forward port their code.
On Sat, Mar 12, 2016 at 6:10 PM, jonsm...@gmail.com wrote:
> Look carefully at
;> >> >> >>> >> >> I did not mention, but I founf two issues withe blobs:
>> >> >> >>> >> >>
>> >> >> >>> >> >> a) Motion Detection causes segmentation fault, whenever
>> >> &
ll rights reserved".
>> >> >>> >>
>> >> >>> >> I gave up fighting with Allwinner's encoder long ago. It is far
>> >> >>> >> easier
>> >> >>> >> to just plug in a USB based h.264 camer
Note that this PCBA is the same price as most bare image sensors
>> >>> >> mounted on a flex cable. Plus I find it much easier to wire things
>> >>> >> with a simple USB cable instead of an FFC.
>> >>> >>
>> >>> >> T
s better. :)
>
>
> ChenYu
>
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>> >> > send
>> >> > an email
ces when plugged into Linux
>>> >> and they will need no special drivers. They also work on Windows.
>>> >>
>>> >>
>>> >>
>>> >> >
>>> >> > --
>>> >> > Manuel Braga
>>> >&
group.
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>>
>>
>>
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>> jons..
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Has anyone written a kernel GPIO driver for accessing the GPIOs in the
AXP209? I don't see one in mainline.
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is no simple way to put a scope on it since the flex cable
has a coating on it.
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an NXP microcontroller.
What I don't know is if any 8080 LCD interface can do this, or if the
NXP chip had extended their interface somehow to make it more
flexible. This board had both SRAM and the 8080 LCD hooked to the same
interface. The remote framebuffer was memory mapped into the addre
On Sun, Oct 4, 2015 at 6:14 PM, jonsm...@gmail.com wrote:
> On Sun, Oct 4, 2015 at 4:26 AM, Alexis Jeandet
> wrote:
>>
>> Hi,
>> On Saturday, October 3, 2015 at 1:39:55 PM UTC+2, Jon Smirl wrote:
>>>
>>> On Sat, Oct 3, 2015 at 3:53 AM, Rock Slate
on the UART serial console?
>> >>
>> >> As for the L2 cache, it has a much larger size than SRAM, but it is not
>> >> normally designed to be used instead of SRAM and DRAM. There might be a
>> >> way to configure it like this (I did not rule out this
nstead of SRAM and DRAM. There might be a
>> way to configure it like this (I did not rule out this possibility yet),
>> but the documentation needs to be checked (ARM Architecture Reference
>> Manual ARMv7-A and ARMv7-R edition):
>> http://infocenter.arm.c
the only things
> that stick?
>
> Luc Verhaegen.
>
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. Add all of this up and it is easy to end
up with 1Mb/s throughput from 2.4Ghz wifi. 5Ghz is hardly used and it
has 50 available channels. You will rarely encounter any crowding.
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s, which clearly
>> goes in against everything the Next Thing Co. people have promised us so
>> far...
>>
>> Allwinner has some explaining to do (as does Next Thing Co, to a lesser
>> extent).
>>
>> Luc Verhaegen.
>
> --
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ays whether the CedarX IP is "necessary", but
> they've talked up their open source-ness so much that any part
> remaining closed source (with the possible exception of Mali) will be
> a mark against them and their ability to deliver. The Raspberry Pi
> copped a
re, you should not disclose to any other person, use, copy or
> disseminate the contents of this e-mail and/or the documents accompanying
> it.
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hat is the most relevant statement in that
>> whole survey, but not a hint of it can be seen in your email.
>>
>> Stop trying to distort the truth.
>>
>> Similarly, i cannot find any mention of your point 7 in that article.
>>
>
> That's my addition and a
On Tue, Jun 2, 2015 at 8:35 PM, Julian Calaby wrote:
> Hi Jon,
>
> On Wed, Jun 3, 2015 at 6:20 AM, jonsm...@gmail.com wrote:
>> Resend with plain text for image links
>>
>> I have one of these GA10H-A33 and tore it apart. They used an uncommon
>> wifi/BT
cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
> + cd-inverted;
> + status = "okay";
> +};
> +
> +&pio {
> + mmc0_cd_pin_q8h: mmc0_cd_pin@0 {
> + allwinner,pins = "PB4";
> + allwinner,fun
o 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
> + cd-inverted;
> + status = "okay";
> +};
> +
> +&pio {
> + mmc0_cd_pin_q8h: mmc0_cd_pin@0 {
> + allwinner,pins = "PB4";
> + allwinner,function = "gpio_in";
> +
ilt-in DRAM and the right peripherals we need.
On Thu, May 7, 2015 at 7:03 AM, kevin.z.m...@gmail.com
wrote:
>
> On 2015-05-05 at 21:21, jonsm...@gmail.com wrote:
>>On Tue, May 5, 2015 at 12:00 AM, kevin.z.m...@gmail.com
>> wrote:
>>>
>>> On 2015-04-29 at 21:20, jo
makes much sense.
http://www.allwinnertech.com/plus/view.php?aid=6074
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>
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Profile: http://www.google.com/profiles/julian.calaby/
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> Thanks.
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Another way - hook up JTAG. Use boundary scan to toggle the pins. That
will tell you the pin number. Look up the pin number and figure out
the GPIO.
On Fri, May 15, 2015 at 6:38 PM, jonsm...@gmail.com wrote:
> Turn on user space GPIO support and use sysfs to toggle the pins. Put
> on a sc
gt;>
>> >> Please help to find out gpio pin for IOCNTL touch screen on Chuwi vi8
>> >> (baytrail) platform or with porting kernel level drive to Linux
>> >> vanilla
>> >> kernel for x86 plaforms.
>> >> PS: I tend to run user space menti
ue a
>> lot of differences of included platform headers files.
>> Regards,
>> Serge Kolotylo.
>
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llwinner has not officially announced anything yet, but it will be
available real soon and it is pretty cheap.
I don't have pin outs yet so I am not sure yet if the modules works
for me. I have a specific set of peripherals I have to have.
>
> Does anyone actually have any useful info on
On Sun, May 10, 2015 at 10:23 PM, Luc Verhaegen wrote:
> On Sun, May 10, 2015 at 09:49:43PM -0400, jonsm...@gmail.com wrote:
>> Does anyone have any info on the new Allwinner R8 module being used in
>> the Chip $9 PC Kickstarter? It is A13+flash+RAM on module.
>>
>> I&
Does anyone have any info on the new Allwinner R8 module being used in
the Chip $9 PC Kickstarter? It is A13+flash+RAM on module.
I'd like to get a pin out and projected price. That module has to be
really low cost if they are able to make a $9 computer out of it.
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Jon Smirl
eceiving emails from it, send an
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On Tue, May 5, 2015 at 12:00 AM, kevin.z.m...@gmail.com
wrote:
>
> On 2015-04-29 at 21:20, jonsm...@gmail.com wrote:
>>On Tue, Apr 28, 2015 at 10:37 PM, kevin.z.m...@gmail.com
>> wrote:
>>> Hi,
>>>
>>> The encoder allows you to set the
If you've ever wondered what was inside an Ampak AP6330. Photo of one
we destroyed by accident.
https://drive.google.com/file/d/0B-2Z6FDzyIwrQUpYcUZFX25KMG9EQVlFWGx4bDl4R1VadjVZ/view?usp=sharing
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Jon Smirl
jonsm...@gmail.com
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get it.
>
> then maybe reduce the qulity of the picture.
>
>
> ____
> kevin.z.m...@gmail.com
>
>
> From: jonsm...@gmail.com
> Date: 2015-04-27 21:22
> To: achun liu
> CC: linux-sunxi
> Subject: Re: [linux-sunxi] How to adjust bitrate of a
.@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.
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Jon Smirl
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e you are subscribed to the Google Groups
> "linux-sunxi" group.
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Jon Smirl
jonsm
e efforts to adapt, including the hiring of David.
> It's up to Allwinner to adapt quickly in order to keep attracting developers.
>
> Simos
>
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> T
promise = kzalloc(sizeof(*promise), GFP_NOWAIT);
>>> + if (!promise)
>>> + return NULL;
>>> +
>>> + promise->src = src;
>>> + promise->dst = dest;
>>> + promise->len = len;
>>> +
&
> - Adding a new SoC support is pretty cheap
>
>> Maybe the best policy should aim at bringing more people on board.
>
> If you have a good strategy for that, I'm all ears.
>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux, Kernel and Android engineering
&g
up.
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