is on board, and have rom_address in Config.lb, it should use
that instead of allocate one for it.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 12, 2005 5:26 PM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
On Wed, 2005-01
Cool!
-Original Message-
From: Bari Ari [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 12, 2005 10:44 AM
To: Eric W. Biederman
Cc: Ronald G. Minnich; Adam Talbot; Linuxbios@clustermatic.org
Subject: Re: speaker beeper
Eric W. Biederman wrote:
> I think morse code would actually tie
It works on S2895 + NV (Vendor 10de, Device 00fd) card.
You did a great job.
Please disable the printk_debug instruction biosemu.c.
YH
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>As the Nvidia card it does
>not have PCI IO resource so we got the 2 to 1 thing.
It mean it doesn't allocate resource to it. Limitmailto:[EMAIL PROTECTED]
Sent: Tuesday, January 11, 2005 11:13 AM
To: YhLu
Cc: LinuxBIOS; Eric Biederman
Subject: RE: Overlaping IO resource for
Complie error
You missed sth?
Tue Jan 11 10:17:11 PST 2005
FAILED! Log excerpt:
/home/yhlu/xx/xx/freebios2/src/devices/emulator/biosemu.c: In function
`setup_system_bios':
/home/yhlu/xx/xx/freebios2/src/devices/emulator/biosemu.c:219: warning:
implicit declaration of function `memset'
Ollie,
I recall sth about mtrr setting, I wonder if I enable the NC could affect
your code. Please check cpu/x86/mtrr/mtrr.c about enable NC below 4G.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 11, 2005 10:21 AM
To: LinuxBIOS; Eric Biederman
Su
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 11, 2005 9:12 AM
To: YhLu
Cc: Stefan Reinauer; Ronald G. Minnich; LinuxBIOS; Andi Kleen;
[EMAIL PROTECTED]; [EMAIL PROTECTED]; [EMAIL PROTECTED]; Matt
Domsch
Subject: RE: Enable apic ext id to use 256 apic id for AMD64
On Mon, 2005-
I changed that for all tyan, amd, and arima MB.
YH
-Original Message-
From: YhLu
Sent: Monday, January 10, 2005 2:28 PM
To: Li-Ta Lo
Cc: Stefan Reinauer; Ronald G. Minnich; LinuxBIOS; Andi Kleen;
[EMAIL PROTECTED]; [EMAIL PROTECTED]; [EMAIL PROTECTED]; Matt
Domsch
Subject: RE: Enable
OK.
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Monday, January 10, 2005 2:16 PM
To: YhLu
Cc: Stefan Reinauer; Ronald G. Minnich; LinuxBIOS; Andi Kleen;
[EMAIL PROTECTED]; [EMAIL PROTECTED]; [EMAIL PROTECTED]; Matt
Domsch
Subject: RE: Enable apic ext id to use 256
For dual core and lifting apic id, you can not just use apic id as node id.
And you have to use
Lapicid() & 0xf
Or cupid to get it.
Regards
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Monday, January 10, 2005 2:14 PM
To: YhLu
Cc: Stefan Reinauer; Rona
Please refer s4882 to change the MB that you support.
nodeid = lapicid() & 0xf;
orm with initial apic id
nodeid = (cpuid_ebx(1) >> 24) & 0xf;
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Monday, January 10, 2005 1:24
val |= (HTTC_APIC_EXT_SPUR | HTTC_APIC_EXT_ID |
HTTC_APIC_EXT_BRD_CST);
pci_write_config32(NODE_HT(node), 0x68, val);
#endif
}
-Original Message-
From: Andi Kleen [mailto:[EMAIL PROTECTED]
Sent: Friday, January 07, 2005 1:29 PM
To: YhLu
Cc: Stefan Reinauer; Ronald G. Minnich;
fail too.
I also CC the kernel guys relating to this.
YH
-Original Message-
From: YhLu
Sent: Wednesday, January 05, 2005 12:43 PM
To: Ronald G. Minnich; Stefan Reinauer
Cc: linuxbios@clustermatic.org
Subject: RE: mptable.c
Enable apic ext id committed.
Changes
Auto.c
nodeid
Also it should be controlled by some CONFIG_X86EMUin case it is not
needed by some configuration. And if CONFIG_CONSOLE_VGA is enabled, it
should be automatically enabled
YH
-Original Message-
From: ebiederman@lnxi.com [mailto:[EMAIL PROTECTED]
Sent: Thursday, January 06, 2005 6:31 P
Eric,
Please refer to cpu/x86/mtrr/mtrr.c
add NC support to spare mtrrs for 64G memory
Can you separate the var setup and FIXed mtrr setup?
otherwise fixed mtrr setup will be setup twice
YH
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Already has one CONFIG_CONSOLE_VGA option.
YH
-Original Message-
From: YhLu
Sent: Wednesday, January 05, 2005 8:44 PM
To: 'Li-Ta Lo'
Cc: LinuxBIOS; ron minnich; Greg Watson; Stefan Reinauer
Subject: RE: VGABIOS is working under LinuxBIOS
The LinuxBIOS need to add CONFIG_DIR
You need to extract the vga bios rom and put that on flash.
-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 05, 2005 8:40 PM
To: Li-Ta Lo
Cc: Adam Talbot; Richard Smith; LinuxBIOS
Subject: Re: VGABIOS is working under LinuxBIOS
On Wed,
The LinuxBIOS need to add CONFIG_DIRECT_VGA to use vga console driver.
Etherboot has that CONFIG_DIRECT_VGA .
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 05, 2005 8:39 PM
To: YhLu
Cc: LinuxBIOS; ron minnich; Greg Watson; Stefan
After all devices initialized, call do_vgabios?
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 05, 2005 3:41 PM
To: LinuxBIOS; ron minnich
Cc: Greg Watson; Stefan Reinauer
Subject: VGABIOS is working under LinuxBIOS
Ron,
I just got the vgabios
Enable apic ext id committed.
Changes
Auto.c
nodeid = lapicid() & 0xf;
#if ENABLE_APIC_EXT_ID == 1
enable_apic_ext_id(nodeid);
lapic_write(LAPIC_ID, ( lapic_read(LAPIC_ID) |
(APIC_ID_OFFSET<<24) ) ); // CPU apicid is from 0x10
#endif
Please let me know if you want me to send you one prebuilt image.
YH
-Original Message-
From: Gin [mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 04, 2005 2:51 AM
To: YhLu; linuxbios@clustermatic.org
Subject: Etherboot and Linuxbios
Now my linuxbios found the ELF file created by
Try 5.2.6 at first.
YH
-Original Message-
From: Gin [mailto:[EMAIL PROTECTED]
Sent: Sunday, January 02, 2005 9:49 PM
To: linuxbios@clustermatic.org
Subject: Etherboot and Linuxbios
Etherboot version used: 5.3.11
I am trying to build a Etherboot image to work with Linuxbios but got a
co
What's you motherboard...
If you are using btext_console, then you may need to add bcontext console
calling in memtest+, Please refer btext in Etherboot
YH
-Original Message-
From: Dave Aubin [mailto:[EMAIL PROTECTED]
Sent: Wednesday, December 29, 2004 12:27 PM
To: LinuxBIOS
Subject
Why followings can not pass the buildtarget
..
end
if CONFIG_MAX_PHYSICAL_CPUS>4
chip northbridge/amd/amdk8
device pci 1c.0 on end
device pci 1c.0 on end
device pci 1c.0 on end
Committed change with broadcast and response table for 4p above system.
-Original Message-
From: YhLu
Sent: Tuesday, December 21, 2004 2:25 PM
To: Stefan Reinauer
Cc: 'Eric W. Biederman'; linuxbios@clustermatic.org
Subject: RE: K8 Routing Table.
Committed.
-Origin
Committed.
-Original Message-
From: Stefan Reinauer [mailto:[EMAIL PROTECTED]
Sent: Tuesday, December 21, 2004 10:29 AM
To: YhLu
Cc: 'Eric W. Biederman'; linuxbios@clustermatic.org
Subject: Re: K8 Routing Table.
* YhLu <[EMAIL PROTECTED]> [041221 19:36]:
> FYI.
>
FYI.
I made some changes to coherent_ht.c to make it create RT dynamically.
If you like to check it, please let me know, and I would check it in.
YH
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Just commit.
Two ways calling
In auto.c
#if 0
// You need to preset bus num in PCI_DEV(0, 0x18,1) 0xe0, 0xe4,
0xe8, 0xec
needs_reset |= ht_setup_chains(2);
#else
// automatically set that for you, but you might meet tight space
needs_reset |= ht_setup_chains_x();
In the targest/tyan/s2850/Config.lb
Change
option
ROM_IMAGE_SIZE=0x1
to
option ROM_IMAGE_SIZE=0x11800
option XIP_ROM_SIZE=0x2
From: Sagiv Yefet [mailto:[EMAIL PROTECTED]
Sent: Friday, December 17, 2004
3:05 AM
To: YhLu;
[EMAIL
I commit the changes for you. Please check it out from
http://snapshots.linuxbios.org/
one hour later.
YH
From: Sagiv Yefet [mailto:[EMAIL PROTECTED]
Sent: Wednesday, December 15, 2004
12:09 AM
To: YhLu; [EMAIL PROTECTED]
Subject: RE: Running with VGA
I have
/tmp/ccX7Rb2q.s:9: Warning: setting incorrect section attributes for
.rodata.pci_driver
Why?
YH
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Stefan,
Please check out the patch. It works well with our MB.
YH
-Original Message-
From: YhLu
Sent: Wednesday, December 15, 2004 11:29 AM
To: Stefan Reinauer
Cc: 'Eric W. Biederman'; [EMAIL PROTECTED]
Subject: RE: collapsing devices.
Eric,
s
CI_DEV(bus, 0, 0),
because it must begin from unitid 1.
YH
-Original Message-
From: Stefan Reinauer [mailto:[EMAIL PROTECTED]
Sent: Wednesday, December 15, 2004 8:36 AM
To: YhLu
Cc: 'Eric W. Biederman'; [EMAIL PROTECTED]
Subject: Re: collapsing devices.
* YhLu <[EMAIL
Done.
Forget 4xDIMM in DRAM_CONFIG_LOW.
YH
-Original Message-
From: YhLu
Sent: Tuesday, December 14, 2004 3:41 PM
To: [EMAIL PROTECTED]
Cc: Stefan Reinauer; 'LinuxBIOS'
Subject: RE: 4G 4 Rank memory module
Eric,
Currently, duplicate ram in auto.c make the 4 ranks works. ( t
Eric,
Currently, duplicate ram in auto.c make the 4 ranks works. ( the MB that I'm
using is EVT version. The HW engineer just did some rework to meet the
production version).
Also I want to mix the 2 ranks and 4 ranks memory by change raminit.c, but
it does not work.
Please check the diff, maybe
Stefan,
I add dump_pci_decvies_on_bus in debug.c
Please add calling to dump_pci_devices_on_bus(busn) before
ht_collapse_previous_enumeration(busn). In ht_setup_chains.
Also in auto.c you need to put inconerent_ht.c after debug.c.
I guess you can use if(busn!=0) to skip the ht chain collapse if
He has smsc superio.
I made one for smsc for one tyan pci-e opteron MB, and I will put that into
the tree in the public tree after I get approval from vendor.
YH
-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED]
Sent: Friday, December 10, 2004 9:18 AM
To: Li-Ta Lo
Cc:
>Long term I wish we had a better way to handle development before the
official
>product launch.
I think if I can keep pace with normal bios development, I can get updated
detail info from vendor and our BIOS engineers. Otherwise they may forget
some detail info and also some vendors may fail to u
: Friday, December 03, 2004 6:24 PM
To: YhLu
Cc: Stefan Reinauer; [EMAIL PROTECTED]
Subject: Re: K8 D0 support
YhLu <[EMAIL PROTECTED]> writes:
> Eric,
>
> Are you working on Opteron D0 support? There are some memory
initialization
> changes to support D0...
It is on the near term
Eric,
Are you working on Opteron D0 support? There are some memory initialization
changes to support D0...
YH
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northbridge/amd/amdk8/cpu_rev.c
static int is_cpu_pre_c0(void)
{
return (cpuid_eax(1) & 0xffef) < 0x0f48;
}
Why need to and 0xffef?
YH
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2cmux/i2cmux.c
CVS:drivers/i2c/lm63/Config.lb drivers/i2c/lm63/chip.h
CVS:drivers/i2c/lm63/lm63.c
CVS: --
-Original Message-
From: YhLu
Sent: Wednesday, December 01, 2004 2:18 PM
To: [EMAIL PROTECTED]
Cc: [
What is the difference between
printk_debug("smbus: %s[%d]->", dev_path(dev->bus->dev),
dev->bus->link );
printk_debug("%s", dev_path(dev));
and
printk_debug("smbus: %s[%d]->%s", dev_path(dev->bus->dev),
dev->bus->link , dev_path(dev));
the first print
smbus: PC
What's your VGA chip?
Currently ati rage xl initialized in LinuxBIOS stage (dev init). --- via
framebuffer and btext.
Some XGI blade has some code in drivers dir too.
Otherwise You need to get the system boot into Linux and use vgabios to call
vga rom to init VGA.
If you have problem before that,
You mean to access extra reg space (4096 bytes) for PCI-E device?
We don't need to touch that extra space in LinuxBIOS.
Under LinuxBIOS + kernel + IB driver, the IB adapter works well with S289x.
need to create one entry in mptable for the device. Otherwise it can not get
INT.
Currently I can
Every pci_read_config and pci_write_config need to findout top parenent bus
to get bus ops. (get_pbus).
It looks weird
YH
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In the AMD8111_lpc.c
static void amd8111_lpc_enable_resources(device_t dev)
{
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static struct device_operations lpc_ops = {
.read_resources = amd8111_lpc_read_resources,
.set_resources= pci_dev
Repeat the i2c address two times make the memory modules fail. At that case
some thing being done twice...cause that...
YH
-Original Message-
From: YhLu
Sent: Wednesday, November 24, 2004 10:44 AM
To: [EMAIL PROTECTED]
Cc: Stefan Reinauer; 'LinuxBIOS'
Subject: RE: 4G 4 R
<<3)|3, (0xa<<3)|1, (0xa<<3)|3, },
},
Regards
YH
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
Sent: Wednesday, November 24, 2004 12:55 AM
To: YhLu
Cc: Stefan Reinauer; 'LinuxBIOS'
Subject: Re: 4G 4 Rank memory module
YhLu <[EMAIL PROTECTED
It can treat 4G as 2G modules, if I comment out physical bank check. (!=2
get out).
YH
-Original Message-
From: Stefan Reinauer [mailto:[EMAIL PROTECTED]
Sent: Tuesday, November 23, 2004 1:03 PM
To: YhLu
Cc: 'Eric W. Biederman'; 'LinuxBIOS'
Subject: Re: 4G 4 Rank m
2G modules for CPU0
4G modules for CPU1.
-Original Message-
From: Stefan Reinauer [mailto:[EMAIL PROTECTED]
Sent: Tuesday, November 23, 2004 12:56 PM
To: YhLu
Cc: 'Eric W. Biederman'; 'LinuxBIOS'
Subject: Re: 4G 4 Rank memory module
* YhLu <[EMAIL PROTECTED]>
module data width : 0x0048
side2 banks: 0x0004
Bad SPD value
CPU0 got 2G modules
CPU1 got 4G modules
Side2 banks is different.
YH
-Original Message-
From: YhLu
Sent: Tuesday, November 23, 2004 11:23 AM
To: 'Eric W. Biederman'
Cc: 'LinuxBIOS'
Subject: 4G 4 Rank
output=elf/ram0_2.5_2.6.9_k8.2_mydisk8_com2.elf
Then makeelfImage should use 0x2f8 instead of 0x3f8 in convert_params.c
according to ttyS1.
Regards
YH
-Original Message-----
From: YhLu
Sent: Monday, November 22, 2004 6:20 PM
To: YhLu; [EMAIL PROTECTED]
Cc: [EMAIL PROTECTED]; [EMAIL PROTECTED]
Subject: RE: [Ether
It's in mkelfImage 2.5
linux-i386/ convert_params.c
it is hardcode to 0x3f8.
YH
-Original Message-
From: YhLu
Sent: Monday, November 22, 2004 6:05 PM
To: [EMAIL PROTECTED]
Cc: [EMAIL PROTECTED]; [EMAIL PROTECTED]
Subject: RE: [Etherboot-users] Direct message to com2
Eric,
Eric,
I add second serial_x.c to support com2. then it works well.
The "Firmware type: LinuxBIOS" only comes out in COM1.
Which segement print " Firmware type: LinuxBIOS" ?, it seems hardcoded to
use 0x3f8.
Regards
YH
-Original Message-
From: YhLu
Sent: Monday,
Who has met such problem?
I changed the linuxbios to direct message to com2 via changing
1. SP1 to SP2 in auto.c
2. enable com2 in Config.lb
3. change 0x3f8 to 0x2f8 in Options.lb
Etherboot change 0x3f8 to 0x2f8.
Then After Ethertboot get the elf image from tftp server, it will hang a
while (30
, November 15, 2004 1:00 PM
To: LinuxBIOS; YhLu
Subject: Multiple Debug Devices
Yhu,
You still have two debug devices in the s2885 mainboard Config.lb, one
under amd8111 the other under root_complex. Why do you do this ? You
said the debug device depends on scan_static_bus(), how do you make
this
According to my experience.
With
Chip ...
Device end
Device ... end
End
And "Config chip.h"
The static.c will be produced according to the Config.lb in MB dir.
All device under that chip will share one chip_operation, and the
chip_operation will contain one
pnp_enable_devices(dev, &pnp_ops,)
I think the second parameter is not necessary and can be removed.
Regards
YH
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-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 11, 2004 6:20 PM
To: YhLu
Cc: 'Ronald G. Minnich'; '[EMAIL PROTECTED]'
Subject: Re: mtrr
YhLu <[EMAIL PROTECTED]> writes:
> In the cpu/x86/mtrr/mtrr.c
>
> #warning "FIXME I do
S_HIGH) - 1)
It seems someone already remove k8 from Option.lb
Then
Regards
YH
-Original Message-
From: YhLu
Sent: Thursday, November 11, 2004 6:00 PM
To: YhLu; [EMAIL PROTECTED]; Ronald G. Minnich
Cc: [EMAIL PROTECTED]
Subject: RE: mtrr
On 2.4.22 it becomes to
~ # cat /proc/
On 2.4.22 it becomes to
~ # cat /proc/mtrr
reg00: base=0x ( 0MB), size=32768MB: write-back, count=1
reg01: base=0x8000 (2048MB), size=16384MB: write-back, count=1
reg02: base=0xc000 (3072MB), size=4096MB: write-back, count=1
x 16
-Original Message-
From: YhLu
Sent
I just found the mtrr after booting is not right.
~ # cat /proc/mtrr
reg00: base=0x ( 0MB), size=985088MB: write-back, count=1
reg01: base=0x8000 (2048MB), size=984064MB: write-back, count=1
reg02: base=0xc000 (3072MB), size=983296MB: write-back, count=1
and it should be
reg00:
Someone (who recent format the coherent_ht.c)
need to
static void fill_row(u8 node, u8 row, u32 value)
{
pci_write_config32(NODE_HT(node), 0x40+(row<<2), value);
}
Before
#if CONFIG_MAX_CPUS > 1
to support ONE AMD K8
YH
-Original Message-
From: Stefan Reinauer [mailto:[EMAIL P
YES
-Original Message-
From: Gin [mailto:[EMAIL PROTECTED]
Sent: Wednesday, November 10, 2004 11:03 PM
To: 'Steven James'
Cc: [EMAIL PROTECTED]
Subject: Tyan/s2735
Steven,
Thanks for the info. I've got the ram up by filling the some values in
North Bridge(I reference a regular bios).
I
HW engineer said
"on S2885, put jumper caps on J94 pin2 and pin3; J95 pin1 and pin2 to make
HDT and MP HDT work.
J94 and J95 are in middle of the area between bootable CPU memory modules
and secondary CPU socket. the pin1 is the pin more close to the board edge
and power connectors."
Regards
YH
I met that too, and I have remove some un converted code in E7501 raminit.c
YH
-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED]
Sent: Tuesday, November 09, 2004 6:44 AM
To: [EMAIL PROTECTED]
Subject: romcc quesiton
I'm seeing that with the new built-in preprocesso
>Which version of Etherboot? I think I ran into a version with 5.2.4
>where ELF/ZELF images were corrupt no matter which GCC I tried.
In the Old RH 9, gcc-3.2.2 works well.
[EMAIL PROTECTED] xx]# /usr/bin/gcc --version
gcc (GCC) 3.2.2 20030222 (Red Hat Linux 3.2.2-5)
Copyright (C) 2002 Free S
ROMCC is broken.
./romcc-mcpu=k8 -O2 -I/home/yhlu/xx/xx/freebios2/src -I.
-I/home/yhlu/xx/xx/freebios2/src/include
-I/home/yhlu/xx/xx/freebios2/src/arch/i386/include
-I/usr/local/lib/gcc/i686-pc-linux-gnu/3.4.2/include -DARCH='i386'
-DHAVE_MOVNTI='1' -DCROSS_COMPILE -DCC
1. in /etc/vimrc
Add "syntax on" at last
2.
/home/yhlu/xx1/gcc-3.4.2/gcc/xgcc -B/home/yhlu/xx1/gcc-3.4.2/gcc/
-B/usr/local/x86_64-unknown-linux-gnu/bin/
-B/usr/local/x86_64-unknown-linux-gnu/lib/ -isystem
/usr/local/x86_64-unknown-linux-gnu/include -isystem
/usr/local/x86_64-unk
I'm planning to use Suse 9.1 pro for AMD64 as my dev server.
I have encountered some problems:
1. vi color, the Old RH 9 vi can high lighten the C grammar. But the Suse
don't how to enable it?
2. can not compiled gcc 3.4.2 under Suse 9.1 pro for AMD 64.
3. Etherboot doesn't like gcc 3.3.3, the tg3
Eric,
You update the ROMCC today, what's new feature of it?
Regards
YH
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OK, someone can roll it back. Actually the E7501 support in v2 is side
product when I tried to add support for E7520...
Regards
YH
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
Sent: Monday, November 08, 2004 11:44 AM
To: Ronald G. Minnich
Cc: YhLu; 'Li-
SB bridge and superio.
YH
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
Sent: Monday, November 08, 2004 11:29 AM
To: Ronald G. Minnich
Cc: YhLu; 'Li-Ta Lo'; 'LinuxBIOS'
Subject: Re: Removing device driver code in mainboard.c for Tyan boards
It seems there is no support on that.
Option for you:
1. add that support you self and contribute that to Etherboot.
2. push AMD to support that. Can they?
3. push AMD to pay Etherboot ( Ken, Tim, Eric) to add that for you. I don't
think Eric could have time for it.
4. You company pay Etherboot.
5
--
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
Sent: Friday, November 05, 2004 5:13 PM
To: YhLu
Cc: 'Ronald G. Minnich'; 'Li-Ta Lo'; 'LinuxBIOS'
Subject: Re: Removing device driver code in mainboard.c for Tyan boards?
YhLu <[EMAIL PROTECTED]> writes:
> I
I changed e7501 to use root_complex too.
Regards
YH
-Original Message-
From: YhLu
Sent: Friday, November 05, 2004 11:34 AM
To: YhLu; [EMAIL PROTECTED]
Cc: Ronald G. Minnich; Li-Ta Lo; LinuxBIOS
Subject: RE: Removing device driver code in mainboard.c for Tyan boards?
Eric,
If the
Create dummy device, and assign devfn to it, then
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Wednesday, November 03, 2004 2:59 PM
To: Eric W. Biederman
Cc: LinuxBIOS
Subject: Re: PCI_DOMAIN ??
On Wed, 2004-11-03 at 15:51, Eric W. Biederman wrote:
> So my im
Eric,
If the chip_ops has no .name, then should use
if CONFIG_CHIP_NAME
config chip.h
end
also .c include that chip_ops
#if CONFIG_CHIP_NAME
...chip_ops defininition
#endif
Regards
Such as norththbridge, socket, mainboard(root).
YH
-Original Message-
From: YhLu
Sent
Static.c include comes from it.
YH
-Original Message-
From: YhLu
Sent: Friday, November 05, 2004 10:44 AM
To: '[EMAIL PROTECTED]'
Cc: Ronald G. Minnich; Li-Ta Lo; LinuxBIOS
Subject: RE: Removing device driver code in mainboard.c for Tyan boards?
What does "config chip.
What does "config chip.h" in Config.lb use for?
It seems it is not necessary?
Regards
YH
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
Sent: Friday, November 05, 2004 10:31 AM
To: YhLu
Cc: Ronald G. Minnich; Li-Ta Lo; LinuxBIOS
Subject: Re: Remov
Share get_fx_devs and f1_read_config32?
YH
-Original Message-
From: YhLu
Sent: Friday, November 05, 2004 10:17 AM
To: [EMAIL PROTECTED]
Cc: Ronald G. Minnich; Li-Ta Lo; LinuxBIOS
Subject: RE: Removing device driver code in mainboard.c for Tyan boards?
Forget about that.
Why separate
Forget about that.
Why separate root_complex from amdk8/northbridge.c to
root_complex/root_complex.c
YH
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 04, 2004 8:53 PM
To: YhLu
Cc: Ronald G. Minnich; Li-Ta Lo; LinuxBIOS
Subject: Re
Amdk8_scan_chains will clear E0... E8 at first.
YH
-Original Message-
From: Liu Tao [mailto:[EMAIL PROTECTED]
Sent: Friday, November 05, 2004 12:26 AM
To: YhLu
Cc: Eric W. Biederman; LinuxBIOS
Subject: Re: Board hangs after soft_reset() in auto.c
YhLu wrote:
>Which stage auto.c
No, debug_dev can be PCI_DOMAIN and APIC's sibling and one child dev_root in
link0.
YH
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 04, 2004 8:29 PM
To: YhLu
Cc: Ronald G. Minnich; Li-Ta Lo; LinuxBIOS
Subject: Re: Removing device d
Which stage auto.c
E0: 0xff010003 --> 0x0603
E4: 0x09070103 --> 0x09070103
E8: --> 0x0c0a0203
YH
-Original Message-
From: Liu Tao [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 04, 2004 8:31 PM
To: YhLu
Cc: Eric W. Biederman; LinuxBIOS
Subject:
Great. That will be very clear.
Then
chip northbridge/amd/amk8/root_complex
..
End # > dev_root link0
chip northbridge/amd/amk8/root_complex
..
End # > dev_root link1
chip northbridge/amd/amk8/root_complex
..
End # > dev_root link2
___
and
Mainboard on
.
End
Mainboard on
...
End
To put them into dev_root links
YH
-Original Message-
From: YhLu
Sent: Thursday, November 04, 2004 8:01 PM
To: [EMAIL PROTECTED]
Cc: Ronald G. Minnich; Li-Ta Lo; LinuxBIOS
Subject: RE: Removing device driver code in mainboard.c for Tyan
: YhLu
Cc: Eric W. Biederman; LinuxBIOS
Subject: Re: Board hangs after soft_reset() in auto.c
Can this cause configuration regions overlap with each other during
device enumeration? In amdk8_scan_chains() the subordinate/limit field of
current register is set to 0xff before hypertransport_scan_chain
chip northbridge/amd/amdk8
device pci_domain 0 on
device pci 18.0 on # LDT0
.
End
chip northbr
it only can be put under device with scan_static_bus calling.
Such as dev_root and lpc.
Regards
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 04, 2004 4:09 PM
To: YhLu
Cc: LinuxBIOS
Subject: RE: Removing device driver code in mainboard.c for Tyan
It seems that you only have one CPU. Then without ht_optimize_link in
in_conherent.c you even don't need to do soft_reset.
What's the value in you resource_map.c?
You need update that to
PCI_ADDR(0, 0x18, 1, 0xE0), 0xFC88, 0x06000203, // AMD 8131/8111 on
link0 of CPU 0
PCI_ADDR(0, 0
device pci 1.0 off end
end
device pci 1.0 on
..
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 04, 2004 4:09 PM
To: YhLu
Cc: LinuxBIOS
Subject: RE: Removing device driver code in mainboard.c for Tyan boards?
On
Then every device will need do scan_static_bus.
Also the debug device need to find his parent
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 04, 2004 3:26 PM
To: YhLu
Cc: LinuxBIOS
Subject: RE: Removing device driver code in mainboard.c for
src/drivers/generic/debug/chip.h
CVS:src/drivers/generic/debug/debug_dev.c
CVS: --
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 04, 2004 1:35 PM
To: YhLu
Cc: LinuxBIOS
Subjec
Please get new one from CVS tree.
It checks the device class code.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 04, 2004 1:05 PM
To: YhLu
Cc: LinuxBIOS
Subject: RE: Removing device driver code in mainboard.c for Tyan boards?
On Thu, 2004-11
I want to print PCI regs after PCI device initialization.
Where need to put the calling print_pci_regs_all? In hardwaremain ???
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 04, 2004 1:13 PM
To: YhLu
Cc: LinuxBIOS
Subject: RE: Removing device
It is disabled via DEBUG.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 04, 2004 1:11 PM
To: YhLu
Cc: LinuxBIOS
Subject: RE: Removing device driver code in mainboard.c for Tyan boards?
On Thu, 2004-11-04 at 14:08, YhLu wrote:
> Please check
Please check the si/3114
I guess you need to keep
Ati
Si
Trident
Regards
YH
-Original Message-
From: YhLu
Sent: Thursday, November 04, 2004 12:37 PM
To: Li-Ta Lo
Cc: LinuxBIOS
Subject: RE: Removing device driver code in mainboard.c for Tyan boards?
Yes, We still need some, I will
Actually, Eric another link to dev_root and it's init will be called after
all under dev_root link0.
Regards
YH
-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 04, 2004 12:27 PM
To: YhLu
Cc: Li-Ta Lo; LinuxBIOS
Subject: RE: Removing d
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