On Sun, 2002-09-08 at 18:38, Lee wrote:
> Hi,
> My name is Lee and my machine has a ECS Elitegroup K7S5A
> motherboard. It has an AMD AthlonXP 1800+ processor and (apparently) a
> SiS735 chipset. It also has a 2Mb Flash EEPROM for the bios (AMIBIOS
> right now).
>
One fundamental problem
On Sat, 2002-09-07 at 18:58, Antony Stone wrote:
> Hi.
>
> Can somebody tell me what I'm missing here please ? I've just started with
> LinuxBios after seeing it at the LBW workshop ten days ago, and I can't seem
> to get even to stage 1
>
LBW, is it the one that with mountain climbing
On Sat, 2002-09-07 at 20:13, Antony Stone wrote:
>
> Incidentally, I noticed that the SiS config file for the 2.4.17 kernel was
> bigger than the config file for 2.4.19. So I looked at both, and found the
> MTD options I needed were in the 2.4.17 config file, whereas the 2.4.19 one
> which I
On Mon, 2002-09-09 at 09:56, Lee wrote:
> Dear all,
> Thanks for the great advice, I really appreciate it.
> Is it possible to fit an EEPROM with a greater capacity than the current
> 2MB one?
>
For current architecture, 4M bits is the limit. I have no idea about
how Firmware HUB do
On Mon, 2002-09-09 at 10:24, Ronald G Minnich wrote:
> Anybody have a good idea in the long term about how to solve the DoC mess.
>
> I really like this sis730 mainboard with DoC. It's neat to come up in
> busybox and have all the power of linux available even if the disk is not
> yet loaded with
On Mon, 2002-09-09 at 18:03, Hamish Guthrie (Mail Lists) wrote:
> I think the DoC mess is here to stay, there is one potential solution if
> people are insisting on having DoC, and that is to make up a little board
> which plugs into a BIOS socket which has both a 256k flash device and a
> little
On Mon, 2002-09-09 at 23:50, Antony Stone wrote:
> Hi.
>
> I'm using LinuxBios on an SiS630 motherboard (PC-Chips M810L).
>
> Is is essential to use the framebuffer device for video output under
> LinuxBios, or can I boot it into a 'standard VGA' mode ?
>
> I tried changing HAVE_FRAMEBUFFER=1
On Mon, 2002-09-09 at 21:43, Ronald G Minnich wrote:
> On 9 Sep 2002, ollie lho wrote:
>
> > Actually this is very easy, The DoC requires only 8kB address window, if
> > we use a 128KB flash EEPROM for LinuxBIOS, we still have the MSB address
> > line free to acts as Chi
On Tue, 2002-09-10 at 15:56, Antony Stone wrote:
> On Tuesday 10 September 2002 2:14 am, ollie lho wrote:
>
> > On Mon, 2002-09-09 at 23:50, Antony Stone wrote:
> > > Hi.
> > >
> > > I'm using LinuxBios on an SiS630 motherboard (PC-Chips M810L).
> &
On Wed, 2002-09-11 at 00:27, Steve M. Gehlbach wrote:
> I am hoping to get standard alphanumeric vga setup into the linuxbios code
> base, as part of the stpc initialization, in the very near future. Linux
> assumes the vga registers are already initialized in vgacon.c (in
> drivers/video), and c
On Wed, 2002-09-11 at 15:55, Antony Stone wrote:
> On Wednesday 11 September 2002 7:22 am, Steve M. Gehlbach wrote:
>
> > > > Maybe someone knows if alphanumeric mode setup is via the standard VGA
> > > > register set on most modern VGA cards.
> > >
> > > I am afraid your are wrong. For modern VG
On Wed, 2002-09-11 at 16:09, Peter Stuge wrote:
> On Tue, Sep 10, 2002 at 11:22:58PM -0700, Steve M. Gehlbach wrote:
> > > > Maybe someone knows if alphanumeric mode setup is via the standard VGA
> > > > register set on most modern VGA cards.
> > > >
> > >
> > > I am afraid your are wrong. For mod
On Thu, 2002-09-12 at 09:51, Eric W. Biederman wrote:
> ollie lho <[EMAIL PROTECTED]> writes:
> >
> > What is AFAICS ??
>
> As Far As I Can See
> >
> > The catch is, for most cases, you have to program those "non-standard"
> > undoc
On Mon, 2002-09-16 at 19:19, Stefan Reinauer wrote:
> * ollie lho <[EMAIL PROTECTED]> [020916 07:46]:
> > We have an internal version of Etherboot which contains some code from
> > GRUB. The GRUB code let us put kernel image on a filesystem and the way
> > to specify
On Tue, 2002-09-17 at 09:56, Andrew Ip wrote:
> Hi,
>
> I just got a M787CL+ v3.0(http://www.pcchips.com.tw/M787cl+v30.html)
> which is as the same as m758lt+ with VIA C3 1GHZ. It works with m758lt+ config
> without any problem, and it costs only US$15 more than m758lt+. I think it is
>
On Tue, 2002-09-17 at 12:41, Steve M. Gehlbach wrote:
> > I just got a M787CL+ v3.0(http://www.pcchips.com.tw/M787cl+v30.html)
> > which is as the same as m758lt+ with VIA C3 1GHZ. It works with
> > m758lt+ config
> > without any problem, and it costs only US$15 more than m758lt+.
> > I think it
On Tue, 2002-09-17 at 13:39, Steve M. Gehlbach wrote:
> > > Do you know if it is possible to get the datasheet on the
> > Sis630E chipset?
> > > If I use this I need to setup the vga. I see there is a Linux
> > driver, but I
> > > don't know if I it has enough setup without a PC-BIOS init first.
On Tue, 2002-09-17 at 14:24, Eric W Biederman wrote:
> ollie lho <[EMAIL PROTECTED]> writes:
>
> > On Mon, 2002-09-16 at 19:19, Stefan Reinauer wrote:
> > > * ollie lho <[EMAIL PROTECTED]> [020916 07:46]:
> > > > We have an internal version of Etherbo
On Fri, 2002-09-20 at 19:37, Justin Cormack wrote:
> Does anyone know anything about this?
>
> http://www.pcchips.com.tw/ES8m.html
>
> it appears to be SiS 5598 chipset, similar size to the VIA EPIA.
>
5598 ?? I don't think it is actively supported anymore.
> No idea what type of perform
On Sun, 2002-09-22 at 14:35, Steve M. Gehlbach wrote:
> My pcchips m787cl+ with the sis630e chipset started reporting a 00:00..00
> mac address. It was working at first, but somewhere in the process of
> debugging I started getting all zeros.
>
> I looked thorough the linuxbios and the sis900.c
On Mon, 2002-09-23 at 23:45, Nathanael Noblet wrote:
> Hello,
> I've seen a lot of support about the Sis 630 chipset. I'm wondering
> how much support exists for 530 based boards? Is there documentation on
> how one would proceed to support a particular chipset?
I think SiS 530 is End of
On Tue, 2002-09-24 at 06:19, Steve M. Gehlbach wrote:
> I have an interesting problem with the pcchips m787cl+ motherboard: it won't
> do a reboot. If you use the three finger salute or issue an init 6, it
> hangs at the "Restarting system" message at the bottom of the shutdown
> cycle.
>
> I tr
On Tue, 2002-09-24 at 00:47, Ronald G Minnich wrote:
> We're building a 1024-node linuxbios cluster with Dual-P4 systems and
> Myrinet. No disks on the nodes. Single System Image via bproc. Monitoring
> with Supermon. Plus lots of other stuff we hope to be showing in the next
> year. LNXI is the v
On Tue, 2002-09-24 at 11:19, Steve M. Gehlbach wrote:
> >
> > The ACPI watch dog code is in the SiS LinuxBIOS patch avaliable on CVS.
> >
> > Ollie
> >
>
> Thanks Ollie, that's a lot of great code. I did not realize this was there.
>
> I'm curious, though, do you think the watchdog timer reset
On Thu, 2002-09-26 at 01:44, Bari Ari wrote:
> Has anyone else here worked with BLOB?
>
> http://sourceforge.net/projects/blob
>
> Blob is a boot loader for SA11x0 (StrongARM) platforms and is just
> starting to support PXA and Xscale processors. Blob is able to boot a
> Linux kernel stored in
On Thu, 2002-09-26 at 08:51, Bari Ari wrote:
> ollie lho wrote:
>
> >Did you tried the ARMboot and PPCboot ?? These bootloaders have network
> >boot built-in now. I also think they have better source directory
> >structures.
> >
> >
> ARMboot http:
On Thu, 2002-09-26 at 09:13, Bari Ari wrote:
>
>
> ollie lho wrote:
>
> >We should start a project call OmniBoot (not OmniBook^TM) which can boot
> >any architecture.
> >
> >
> If the source could be shared it would certainly make sense, instead
On Thu, 2002-09-26 at 13:13, Nicholas Mistry wrote:
> Just for the record, i have worked extensively with blob. Especially
> during the StrongARM port of linux.
>
> The IPAQ 36xx, 37xx, 38xx handhelds are based off the Intel
> Assabet/Neponset Development platform. The assabet is a StrongARM 11
On Thu, 2002-09-26 at 14:30, Bari Ari wrote:
> ollie lho wrote:
>
> >Do you know if Blob can load uClinux ?? I found that most of the ARM
> >bootloaders only support ARM-Linux. (Am I wrong ??)
> >
> >
> >
> Blob is written to be OS independent, but I don
On Thu, 2002-09-26 at 14:43, Bari Ari wrote:
> ollie lho wrote:
>
> >
> >Bari,
> > Do you know if there is any OSS bootloader for uClinux on ARM ??
> >Ollie
> >
> I haven't tried this but take a look at:
> http://kabel.home.at:5880/cgi-bin/vie
On Thu, 2002-09-26 at 15:22, Bari Ari wrote:
>
>
> Original Message
> Subject: Re: [Fwd: Re: "LinuxBIOS for ARM" or "Merging LinuxBIOS with
> BLOB"]
> Date: Thu, 26 Sep 2002 03:04:41 -0400
> From: Thomas Chen <[EMAIL PROTECTED]>
> To: Bari Ari <[EMAIL PROTECTED]>
> CC: lart <[
On Thu, 2002-09-26 at 09:13, Bari Ari wrote:
>
>
> ollie lho wrote:
>
> >We should start a project call OmniBoot (not OmniBook^TM) which can boot
> >any architecture.
> >
> >
> If the source could be shared it would certainly make sense, instead of
>
On Mon, 2002-09-30 at 07:00, Christopher Bergeron wrote:
>
> Sunday, September 29, 2002, 5:26:37 PM, you wrote:
>
> RGM> On Sun, 29 Sep 2002, Christopher Bergeron wrote:
>
> >> Can anyone give me advice on what will acheive the fastest boot time?
> >> My options are the LinuxBIOS coupled with
On Mon, 2002-09-30 at 13:50, Steve M. Gehlbach wrote:
> > Hello from Gregg C Levine
> > Steve? How so? How did you physically connect the CF card to your
> > IDE bus? I
> > know a number of adapters exist to enable that feature, and I
> > know that the
> > 2.4 series contains the MTD (Memory Techn
On Tue, 2002-10-01 at 11:35, David Xiong wrote:
> The mainboard is K7SEM and irq_tables.c is already in the source tree.
> I run the program getpir and get an irq_tables.c file which is the same
> as the one in the source tree. The program util/getpir reports 6 slot found,
> whether I plug in the
On Thu, 2002-10-03 at 07:52, Todd E. Johnson wrote:
>
> Hello,
>
>
> I found a ZIF Socket (that works form me when I remove the WOL header)
> at Digikey for $13.33. It is part number A443-ND (CONN IC SOCKET ZIF
> 32POS TIN). Here are a few quick pics of it on a PCChips M758LMR+ with
> the WOL
On Fri, 2002-10-04 at 05:55, Todd E. Johnson wrote:
> Did the following...
>
> `flash_on`
> `modprobe docprobe doc_config_location=0xfffc8000`
>
>
> Using configured DiskOnChip probe address 0xfffc8000
> DiskOnChip Millennium found at address 0xFFFC8000
> Flash chip found: Manufacturer ID: 98,
On Fri, 2002-10-04 at 07:16, Todd E. Johnson wrote:
> Well,
>
> It finally boots. My only problem now is hardly any of the devices can
> be assigned an IRQ. Like USB for example...
>
why do you have another USB device on PCI bus 2 ??
Ollie
___
Li
On Thu, 2002-10-03 at 11:58, Ronald G Minnich wrote:
>
> my very nice $600 non-Windows PC from Walmart is a deal.
>
> The chipset is SiS for P4 SDRAM Hey, Ollie, where is the
> port?
>
send me lspci -vvv ;-)
Ollie
___
Linuxbios mail
On Thu, 2002-10-03 at 22:45, Christopher Bergeron wrote:
> Ollie, since I'm sure you get inundated with requests for all the different
> mobo types out there, maybe we can set up a webpage/db that will allow
> people to submit the lspci -vvv data along with the motherboard type
> and possibly a li
On Fri, 2002-10-04 at 05:36, Yves Godin wrote:
> At 01:24 PM 10/3/02 -0500, you wrote:
> >Yves Godin wrote:
> >
> >>Anyway, with the UDMA mode 2 I should have the performance that I need. I
> >>look on header of the ide connector and the burst when writing seems to
> >>be quick anough but betwee
On Mon, 2002-10-07 at 20:37, Yves Godin wrote:
>
> >Can you contact our marketing/technical support ??
>
> I certainly will, but first I need to know what performance
> I can expected from the SIS550. I`m in a rush now, I need
> to determine this week if the SIS550 will be able to sustain
> 10
On Thu, 2002-10-10 at 21:28, David Xiong wrote:
> Yes, I am using DoC2001.
> But I do not need to use ddr , is there an ipl.S without ddr init code which can be
>compiled?
>
> Thanks!
>
No. actually, the SDRAM init sequence will be almost as complex as DDR.
You have identical register set to
On Mon, 2002-10-14 at 22:30, zhu shi song wrote:
> I met one strange error on sis900 ethernet driver.
> I'm using cvs freebios on 6 Oct, 2002 , kernel 2.4.17,
> mainboard is winfast6300. After booting using
> linuxbios stored in DOC, I boot
> my host linux system using normal bios. the host
> l
On Wed, 2002-10-16 at 06:45, Bari Ari wrote:
>
> We looked at this a couple years ago for the getting Linux up on the
> Mips VR41xx series, but Mips didn't win in the CPU for PDA wars.
>
Yea, and my Agenda VR3 is literally a brick now.
Ollie
___
L
On Wed, 2002-10-23 at 21:59, [EMAIL PROTECTED] wrote:
>
>
> [PS: Can I somehow tell mailman to accept my email from multiple
> addresses?]
>
> hello
> I'm trying to set "bios classic/dos" like state
> on the winfast 6300max/sis630 motherboard.
>
> one of the issues I'm having
On Thu, 2002-10-24 at 09:20, Adam Sulmicki wrote:
> > I don't quite understand your question, but LinuxBIOS does program
> > the PIC to map IRQ 0-15 to INT 0x20-0x30. So the keyboard interrupt
> > (IRQ 1) is routed to INT0x21. This is how Linux does for its interrupt
> > handling.
>
> yes, but I'm
On Thu, 2002-10-24 at 09:58, Adam Sulmicki wrote:
> > Is it possible that your BIOS reprogrammed the keyboard controller
> > in the wrong way ??
>
> it is possible, in fact it the only unchecked list on my To Check
> List:
> PIC not getting (re) programmed CHECK
> PIC interrupt
On Thu, 2002-10-24 at 09:43, James Alton wrote:
> Hello again,
>
> I had previously written about which BIOS chip to use, I am wondering
> now if video and sound will work on the 810LR. I have examined the CVS
> code and it seems that it doesn't really do anything but set up irq
> tables for vid/s
On Thu, 2002-10-24 at 09:58, Adam Sulmicki wrote:
> > Is it possible that your BIOS reprogrammed the keyboard controller
> > in the wrong way ??
>
> it is possible, in fact it the only unchecked list on my To Check
> List:
> PIC not getting (re) programmed CHECK
> PIC interrupt
On Thu, 2002-10-24 at 10:23, Adam Sulmicki wrote:
> > Some part of it comes form old sample code by our BIOS guy. Most of it
> > from "The undocumented PC" by Van Gilluwe.
>
> sigh. I hoped for a datascheet.
>
> so there's no a definite reference then?
>
It is legacy device which remain unchang
On Thu, 2002-10-24 at 10:53, Ronald G Minnich wrote:
> should we put that better version of keyboard init into linuxbios?
>
> ron
>
The code was used to debug one of our customer's prototype which wired
Keyboard and Mouse signal. I have no idea why I didn't commit it
to freebios cvs at that time
On Sat, 2002-10-19 at 01:55, Ronald G Minnich wrote:
> gcc ... -o mptable.o
>
>/home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c
>
>/home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c:106:22:
> warning: multi-line
On Mon, 2002-10-28 at 16:27, David Xiong wrote:
> Hello,
> The irq_tables.c dumped from normal BIOS only have information about the pci bus 0.
> I have a multimedia card which has a pci-to-pci bridge on itself. There are 2 pci
>devices
> on that card. So the two devices locate at bus 2. The slot_n
On Mon, 2002-10-28 at 17:14, David Xiong wrote:
> >Did you recalculate the checksum ??
> Yes, the checksum has been recalculated.
>
> >Where did you get the idea to set the the table like this?
> I do not know how the irqs routed. So I guess I can set the irq table. It is
>intresting that th
On Tue, 2002-10-29 at 20:23, Andrew Ip wrote:
>
> > So andrew I know you have lots of spare time but can you give me a hint of
> > what you did for LTSP? etherboot?
> I have got the some rom images in
> ftp://pub/downloads/linuxbios-sdk/images/romimages
> You also need an elf kernel with sis_lite
On Wed, 2002-10-30 at 10:01, Andrew Ip wrote:
> Ollie,
>
> > What kind of video problem ??
> messed up screen
> http://www.cwlinux.com/~aip/pub
>
O.K. that one. Do you have any idea how does
the problem magically disappear "in recent kernel" ??
Ollie
__
On Thu, 2002-10-31 at 04:46, Ronald G Minnich wrote:
>
>
> On another note, we have several folks starting G2 and G4 work. Just FYI.
>
Cool, are you working on an off the shelf MAC ??
Ollie
___
Linuxbios mailing list
[EMAIL PROTECTED]
http://www.cl
On Fri, 2002-11-01 at 17:14, James Alton wrote:
> Hello,
>
> I'm using the pcchips m758lmr+ motherboard. I have browsed through the
> CVS code, and I see that it loads up support for the SiS630s chipset.
> Also, on the board though, there is a IT8705F (from ITE) which acts as a
> superio and therm
On Sun, 2002-11-03 at 21:52, zhu shi song wrote:
> Hi,
> I'm using freebios-cvs , linux-kernel 2.4.18,
> mainboard winfast6300, When I use celeron 766, linux
> booted by linuxbios can identify it correctly, but
> when
> I change cpu to celeron 850, linux can't identify it,
> dmsg info show t
On Tue, 2002-11-05 at 02:28, Ronald G. Minnich wrote:
> On 4 Nov 2002, James Alton wrote:
>
> > It seems that your 850mhz celeron chip should be running at a 100Mhz bus
> > (8.5x clock multiplier. 8.5*100mhz = 850Mhz) instead, you are feeding it
> > 66Mhz. (8.5*66 = 560Mhz) You can fix this by tal
On Tue, 2002-11-05 at 13:33, zhu shi song wrote:
> I got setclock from old mailing lists. Can you give
> more comments on the program? If I'll use it to boot
> 850Mhz celeron, what should i do ?
>zhu
You can't use the program to boot to 850Mhz, you have
to boot to linux, run the program with
On Tue, 2002-11-05 at 21:01, zhu shi song wrote:
> Do you have quick and clear solution of the problem? I
> hope I can use my celeron 850 asap.
> I don't know what parameter I should pass to setclock
> , and I can't find clock gen info from leadtek or sis
> website. Can you give me direct clues?
On Thu, 2002-11-07 at 10:41, James Alton wrote:
> Hi,
>
> I'm trying to get *any* linux kernel to compile for the m758lmr+
> motherboard and disk on chip millenium. I tried 2.4.7, 2.4.17, and
> 2.4.19, but none of them compiled. I even tried messing with the code
> and fixing it up, but still am u
--- Begin Message ---
On Fri, 2002-11-08 at 04:49, Tyson D Sawyer wrote:
> I'm not sure that uC-Linux can't get that small. You loose some
> features bu it might be worth checking.
>
> http://www.uclinux.org/
>
> I don't know the details or how current this info is but from the "What
> is p
On Tue, 2002-11-12 at 19:37, Adam Sulmicki wrote:
> > does anyone here runs P6STMT mbo by EliteGroup?
> > Here are some sample urls to the MBO:
> > http://www.ecs.com.tw/products/p6stmt.htm
> > http://www.amptron.com/html/P6STMT.html
> > http://www.icuepc
On Thu, 2002-11-14 at 13:11, Ronald G. Minnich wrote:
> I get this now. So in other words, it is not getting copied, but the
> kernel is finding the table in FLASH since it is uncompressed. Now I
> wonder why linuxbios would try to copy to f, since that is a FLASH
> area. I think it is because
On Thu, 2002-11-14 at 13:13, Ronald G. Minnich wrote:
> On Thu, 14 Nov 2002, Andrew Ip wrote:
>
> > These problem doesn't happen to winfast 6300.
>
> Hmm, the copy to 0xf succeeds on the winfast?
>
> I wish I had all of the motherboards we support in a lab for regression
> tests. Oh well.
On Tue, 2002-11-19 at 04:50, Ronald G. Minnich wrote:
> On Mon, 18 Nov 2002, Kevin Hester wrote:
>
> > Anyone have a problem with me moving statically generated PIRQ tables from
> > the compressed section to the uncompressed session?
>
> I've thought about this, but in the long term we don't wan
On Tue, 2002-11-19 at 05:25, Eric W. Biederman wrote:
> "Ronald G. Minnich" <[EMAIL PROTECTED]> writes:
>
> > Eric, how much heartburn is there if we set the default value of
> > CONFIG_COMPRESS to 0?
> >
> > I've just hit another platform where it is trouble. At this point I
> > believe there
On Tue, 2002-11-19 at 12:56, Andrew Kohlsmith wrote:
> I've managed to get all the way to jmp_to_elf_entry(), but I have run in to a
> snag in the assembly code which copies LinuxBIOS in to high memory and then
> attempts to continue execution up there.
>
> At line 130 of arch/i386/boot/boot.c t
On Tue, 2002-11-19 at 09:01, ollie lho wrote:
> On Tue, 2002-11-19 at 05:25, Eric W. Biederman wrote:
> > "Ronald G. Minnich" <[EMAIL PROTECTED]> writes:
> >
> > > Eric, how much heartburn is there if we set the default value of
> > > CONFIG_C
On Mon, 2002-11-25 at 10:08, Ronald G. Minnich wrote:
> These are the sources from Adam Agnew and Adam Sulmicki that let you boot
> OpenBSD, Windows, etc.
>
Is there any HOWTO on this ??
Ollie
___
Linuxbios mailing list
[EMAIL PROTECTED]
http://www.
On Fri, 2002-11-29 at 14:41, Nathanael Noblet wrote:
>
>
> That is the device. It says on it:
> AWARD
> copy 1998
> PCI/PNP 586
> 230085332
>
You should remove the label on the chip and you can see the real
part number of it. It has nothing with any keywords like "AWARD".
> I really don't thin
hbridge.c and southbridge.c are low priority and used
mainly use to fix up some bug/configuration problem. Generally, the
mainborad.c is empty and trivial unless your mainboard has some other
bugs to fix.
--
ollie lho <[EMAIL PROTECTED]>
___
Linu
On Sat, 2002-12-14 at 15:45, Steve M. Gehlbach wrote:
> > The very first instructions are in ipl.S for SiS chipsets. These codes
> > are used to initialize the DRAM and some other (highly) critical
> > registers in north/south bridge.
> >
> >ollie lho
kernel_patch directory.
The real init sequence is a little bit complicated and you generally
need some NDA document to get the whole picture.
--
ollie lho <[EMAIL PROTECTED]>
___
Linuxbios mailing list
[EMAIL PROTECTED]
http://www.clustermatic.or
SDR and 635/ipl.S which support DDR.
--
ollie lho <[EMAIL PROTECTED]>
___
Linuxbios mailing list
[EMAIL PROTECTED]
http://www.clustermatic.org/mailman/listinfo/linuxbios
way for the bus master devices behind it to work properly. Those devices
does not have both "pio" and "dma" modes generally.
> Does anyone have a copy of the $$$ PCI architecture spec so they can check
> this? My PCI System Architecture book is vague on the topic.
>
Th
ly the C implementation is
> much easier than the perl. Plus C is fast :)
Eric,
Something off topic, the elfImage made by mkelfImage 1.1x can
not be recognized by 'objdump' but can be dumped by 'readelf'. Is there
any re
On Wed, 2003-02-12 at 08:40, [EMAIL PROTECTED] wrote:
> Hi,ron,
>
> >oh, wait, is this 2.2 kernel? I forget now.
>
> Yes. The kernel version is 2.2.14.
>
> Thanks.
>
I don't think the 2.2.x kernel can set up IRQs correctly. Can you try
2.4.x kernel first ?
On Thu, 2003-02-13 at 09:53, [EMAIL PROTECTED] wrote:
>
> Does your mainboad support APIC?
>
> I think that if The SMP kernel is ok,the mainboard must support APIC.
> If the mainboad doesn't support APIC,maybe the kernel need support IRQ route table.
> But the 2.2.x kernel doesn't support parsi
io ?? SiS 740 has AC97 controller similar to
i810's.
--
ollie lho <[EMAIL PROTECTED]>
___
Linuxbios mailing list
[EMAIL PROTECTED]
http://www.clustermatic.org/mailman/listinfo/linuxbios
On Thu, 2003-02-13 at 10:29, [EMAIL PROTECTED] wrote:
> >I don't think the 2.2.x kernel can set up IRQs correctly. Can you try
> >2.4.x kernel first ?
> >ollie lho <[EMAIL PROTECTED]>
>
> I have tried 2.4.17 kernel,solt1 and solt2 can work normally.
>
os. You have to
program it by yourself. Try download datasheet of ITE 8705 first.
--
ollie lho <[EMAIL PROTECTED]>
___
Linuxbios mailing list
[EMAIL PROTECTED]
http://www.clustermatic.org/mailman/listinfo/linuxbios
they rewired things.
> >
> >I don't use these chipsets right now so I am not much help, sorry.
> >
> >ron
>
> Could you tell me the difference between sis630 and sis630e chipset?
>
No difference in the
gt; that chipset. That's confusing. Is sis630e supported, or is it not?
>
SiS 630e is exactly the same as SiS 630 from SW point of view.
--
ollie lho <[EMAIL PROTECTED]>
___
Linuxbios mailing list
[EMAIL PROTECTED]
http://www.clustermatic.org/mailman/listinfo/linuxbios
B controller
does not require IP address space, it uses MMIO address space which
is called non-prefetchable memory in PCI spec. The controller does
not need any special init stuff. I don't think USB is supported by
2.2.x kernel neither. Why do you insist using 2.2.x kernel ?
--
ollie lho <
other boxes(not sis630e chipset),instead of non-prefetchable memory?
>
Either the BIOS or the HW is buggy.
--
ollie lho <[EMAIL PROTECTED]>
___
Linuxbios mailing list
[EMAIL PROTECTED]
http://www.clustermatic.org/mailman/listinfo/linuxbios
am sorry for that. We don't have any 730 or 730 boards around so
I can not do regression test on that.
--
ollie lho <[EMAIL PROTECTED]>
___
Linuxbios mailing list
[EMAIL PROTECTED]
http://www.clustermatic.org/mailman/listinfo/linuxbios
7;d like to use that
> part if possible. I hope it is electrically compatible with the
> SST29EE020 and EON EN29F002NT?
>
I am sorry that I can't do it for the moment. Programming EEPROM
needs a little bit of trial and error. You
c.html which has ddr, but I
> don't think it is supported at the moment. Ollie, do you have any info about
> this board which is using 730D chipset.
>
I don't think there is officially a thing called 730D. Judge for the web
page, I guess it is a 'remarked', '
> Interesting. But, I was asking to myself... how much time does the
> hard-disk need to spin-up? I've made few tests and it seems quite fast,
> only few seconds. How much time is it possible to gain with a CF ide
> device? I have a small CF card, I should buy the C
d re-read it, but if anyone knows the way already, I'd
> appreciate showing it to me.
>
Search the keyword DISABLE_INTERNAL_DEVICE or something in the source.
Try writing different value (bit patterns) to the register 0x7c (not so
sure ??) in southbridge. It is undocumented.
On Wed, 2003-03-19 at 04:07, Ronald G. Minnich wrote:
> can we get a second sis 630 person to test this? Just for double check.
>
> I don't have sis 630 any more :-(
>
I don't have any more neither :~(. Adrew, can you test it ?
--
ollie
would like to have the LinuxBIOS
> code that uses the CMOS written in C, however. How late in the boot
> process can you enable/disable this hardware and have it work correctly?
>
Before PCI enumeration.
--
ollie lho <[EMAIL PROTECTED]>
/MB
too ??). I think we should come up with our own standard.
--
ollie lho <[EMAIL PROTECTED]>
___
Linuxbios mailing list
[EMAIL PROTECTED]
http://www.clustermatic.org/mailman/listinfo/linuxbios
me to fix the problem ?
do you have the register spec for 745 ? What program do you use to
read the SPD ?
--
ollie lho <[EMAIL PROTECTED]>
___
Linuxbios mailing list
[EMAIL PROTECTED]
http://www.clustermatic.org/mailman/listinfo/linuxbios
On Mon, 2003-06-16 at 13:06, ron minnich wrote:
> I'm starting a port. Anyone with info on this part that could be helpful
> let me know.
>
> I'm doing this on my own time to help support: http://psas.pdx.edu.
>
Are they building their own private rockets ?
--
ol
hat these chips have capacities of 2, 4, 8, 12, 24, 40, 72 MByte!!!
>
AKIAK, DoC doesn't come with PLCC package. This is the main reason we
don't like a mb with PLCC socket.
I may be wrong but doesn't epia-m come with 2 sockets one for Flash the
other for
1 - 100 of 108 matches
Mail list logo