Peter Stuge wrote:
On Thu, Jan 10, 2008 at 09:34:28PM -0500, Corey Osgood wrote:
How many different cores could you put in even the most popular
socket, three?
LGA775 currently has 19 (and may have more I don't know about).
Using some rough math, I get a rounded-down size of 186KB
Myles Watson wrote:
Author: jcrouse
Date: 2008-01-11 19:23:47 +0100 (Fri, 11 Jan 2008)
New Revision: 3046
Modified:
trunk/LinuxBIOSv2/targets/buildtarget
Log:
Add the ability to extend CFLAGS as needed for several new distros
Signed-off-by: Ronald G. Minnich [EMAIL PROTECTED]
[EMAIL PROTECTED] wrote:
Quoting Uwe Hermann [EMAIL PROTECTED]:
On Fri, Jan 11, 2008 at 03:54:18PM +0100, Peter Stuge wrote:
On Fri, Jan 11, 2008 at 09:42:00AM -0500, Corey Osgood wrote:
Peter Stuge wrote:
I think we need to make it configurable.
I
-by: Corey Osgood [EMAIL PROTECTED]
Index: src/cpu/via/model_centaur/Config.lb
===
--- src/cpu/via/model_centaur/Config.lb (revision 3045)
+++ src/cpu/via/model_centaur/Config.lb (working copy)
@@ -5,5 +5,4 @@
dir /cpu/x86/sse
dir /cpu/x86
[EMAIL PROTECTED] wrote:
Quoting Corey Osgood [EMAIL PROTECTED]:
[EMAIL PROTECTED] wrote:
Quoting Corey Osgood [EMAIL PROTECTED]:
I've separated this into two patches, one code and one microcode, to
improve readability, but they would both have to be committed at once
(else things break
Carl-Daniel Hailfinger wrote:
On 11.01.2008 02:33, Corey Osgood wrote:
[EMAIL PROTECTED] wrote:
Quoting Corey Osgood [EMAIL PROTECTED]:
Do you mean the microcode files? If so, the microcode update looks like
this:
Header
Update Revision
Date
Processor
[EMAIL PROTECTED] wrote:
Quoting Corey Osgood [EMAIL PROTECTED]:
I've separated this into two patches, one code and one microcode, to
improve readability, but they would both have to be committed at once
(else things break). These patches eliminate a lot of repeated code,
make porting
ron minnich wrote:
On Dec 29, 2007 9:00 PM, [EMAIL PROTECTED] wrote:
Quoting Corey Osgood [EMAIL PROTECTED]:
Acked-by: Corey Osgood [EMAIL PROTECTED]
how long has it been since we've updated the microcode updates?
No idea, but remember the email below from 12/12/07? Looks
[EMAIL PROTECTED] wrote:
Microcode updates coming in the morning, if the abuild passes.
-Corey
SWEET :-)
Thanks - Joe
Well, it failed, but it was only one socket (603/604), and the problem's
size.
--
linuxbios mailing list
linuxbios@linuxbios.org
aaron lwe wrote:
On Dec 21, 2007 1:40 PM, Corey Osgood [EMAIL PROTECTED] wrote:
And now you're where I am. For some reason there's a reserved memory
range _somewhere_ at the tolm, of some unknown size. I've found that
reserving an extra 1MB doesn't work, but 32MB does. I've found nothing
ron minnich wrote:
On Jan 2, 2008 5:03 PM, Luc Verhaegen [EMAIL PROTECTED] wrote:
If you still do not believe logic, then please set CONFIG_CONSOLE_VGA
without setting CONFIG_PCI_ROM_RUN and then build your rom. The build
will fail due to missing symbols.
That's a prolem. Which
Phani Babu Giddi wrote:
Hi Corey,
Thanks for your reply but I am not clear. Let me list the steps, may
be that will explain the problem I see.
1. I have a host target environment
2. I build Linux Kernel image with initrd on the host
3. I also build the root file system on the host
4.
Phani Babu Giddi wrote:
Hi Corey,
Is there a way by which I can use the external programmer to flash the
complete chip at once. I mean There is the Linux BIOS image which
includes the kernel and then there is the root file system and a fall
back image. So that I can have a single file
On Dec 31, 2007 8:36 AM, [EMAIL PROTECTED] wrote:
for slot 1, we no longer care.
Why do we not care about slot 1?? What are the 440BX boards going to do??
Thanks - Joe
Nobody's buying Slot 1 boards any more. 440BX is 7 years old. So if we have
to inconvenience the entusiasts with the 7
Phani Babu Giddi wrote:
Hello All,
I am trying to understand how to access the flash chip on
the mainboard for the very first time. Most of the documentation on
Linux BIOS talks about using flashrom but I am confused, are we
suppose to use this on the target ( mainboard) or host. If its
ron minnich wrote:
On Dec 29, 2007 9:00 PM, [EMAIL PROTECTED] wrote:
Quoting Corey Osgood [EMAIL PROTECTED]:
Acked-by: Corey Osgood [EMAIL PROTECTED]
how long has it been since we've updated the microcode updates?
No idea, but remember the email below from 12/12/07? Looks
Carl-Daniel Hailfinger wrote:
On 30.12.2007 13:15, Carl-Daniel Hailfinger wrote:
On 30.12.2007 05:40, Corey Osgood wrote:
doesn't seem quite right, but it might be (yes, I realize it means 4x
more IDs). We also break the ability to use IMT flash chips (which
someone may
]
Acked-by: Corey Osgood [EMAIL PROTECTED]
--
linuxbios mailing list
linuxbios@linuxbios.org
http://www.linuxbios.org/mailman/listinfo/linuxbios
ron minnich wrote:
On Dec 30, 2007 3:50 PM, Corey Osgood [EMAIL PROTECTED] wrote:
With the latest microcde update, there's one big problem: size.
what is the size?
The full microcode update file is a little over 1MB, that's all the
current updates for all CPUs, since the Pentium
Kiran Patil wrote:
On Dec 28, 2007 7:30 PM, Carl-Daniel Hailfinger
[EMAIL PROTECTED]
mailto:[EMAIL PROTECTED] wrote:
On 28.12.2007 14:29, Kiran Patil wrote:
MSI MS-7250 VER:2.2 (K9N Ultra) motherboard is not
detecting
SST49LF004A/B chip.
I am
Urbez Santana Roma wrote:
Thanks for answer Rudolf, the CPU can SSE and SSE2, when runs with
normal BIOS the instruction movd %eax,%xmm0 works in, but if the
linuxbios need working with sse and sse2 with a microKernel for
example, this instruction produces a exception.
My contents of the
/block size field in struct flashchip would be nice, though.
Signed-off-by: Carl-Daniel Hailfinger [EMAIL PROTECTED]
Must've missed this one
Acked-by: Corey Osgood [EMAIL PROTECTED]
--
linuxbios mailing list
linuxbios@linuxbios.org
http://www.linuxbios.org/mailman/listinfo/linuxbios
+ /* Check if it is a continuation ID, this should be a while
loop. */
+ if (id1 == 0x7F) {
+ largeid1 = 8;
+ id1 = *(volatile uint8_t *)(bios + 0x100);
+ largeid1 |= id1;
+ }
+ if (id2 == 0x7F) {
+ largeid2 =
Carl-Daniel Hailfinger wrote:
Add 25VF016B support to flashrom. Untested, but verified against the
data sheet.
Signed-off-by: Carl-Daniel Hailfinger [EMAIL PROTECTED]
Acked-by: Corey Osgood [EMAIL PROTECTED]
--
linuxbios mailing list
linuxbios@linuxbios.org
http://www.linuxbios.org/mailman
Looks good here:
Acked-by: Corey Osgood [EMAIL PROTECTED]
On Dec 28, 2007 7:30 AM, Carl-Daniel Hailfinger
[EMAIL PROTECTED] wrote:
On 17.12.2007 21:33, Carl-Daniel Hailfinger wrote:
Print the chip status register for all SPI chips on probe if verbose
output is specified.
Pretty-print
aaron lwe wrote:
On Thu, Dec 20, 2007 at 04:49:32PM +0800, aaron lwe wrote:
/ I've configured the via cn700 dram controller
/..
/ Unexpected Exception: 6 @ 10:1bfee821 - Halting
/..
/ can I say ram is initialized right?
/
//No. ram_check() is a useless metric.
//Until you can successfully
aaron lwe wrote:
Dear All,
I'm terribly sorry that I just found I've mistakenly configured the
dram MA Map Type, and now memtest
showed no errors. But I still have to reduce the mem size when
reporting to system through ram_resource
or filo couldn't be started. I have disabled the
,
using the default from src/mainboard/*/Options.lb (trivial)
Signed-off-by: Corey Osgood [EMAIL PROTECTED]
Acked-by: Corey Osgood [EMAIL PROTECTED]
Thanks Corey.
Marc
You're welcome, but it didn't work :( I tested the change with the wrong
serengheti_cheetah. Still trying to figure
Marc Jones wrote:
Corey Osgood wrote:
Marc Jones wrote:
[EMAIL PROTECTED] wrote:
Author: cozzie
Date: 2007-12-19 09:07:37 +0100 (Wed, 19 Dec 2007)
New Revision: 3018
Modified:
trunk/LinuxBIOSv2/targets/amd/serengeti_cheetah_fam10/Config.lb
Log:
Small fix to make the abuild happy
[EMAIL PROTECTED] wrote:
Author: stepan
Date: 2007-12-19 18:59:50 +0100 (Wed, 19 Dec 2007)
New Revision: 3019
Modified:
trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
Log:
trivial fix for abuild.
Signed-off-by: Stefan Reinauer [EMAIL PROTECTED]
Acked-by:
Uwe Hermann wrote:
On Wed, Dec 19, 2007 at 12:36:51PM -0500, Corey Osgood wrote:
-Wall -o rom_stream.o /home/corey/LinuxBIOSv2/src/stream/rom_stream.c
/home/corey/LinuxBIOSv2/src/stream/rom_stream.c:47:90: error: invalid
suffix x on integer constant
make[1]: *** [rom_stream.o] Error 1
Marc Jones wrote:
Corey Osgood wrote:
Marc Jones wrote:
Corey Osgood wrote:
Marc Jones wrote:
[EMAIL PROTECTED] wrote:
`/home/corey/LinuxBIOSv2/util/abuild/linuxbios-builds/amd_serengeti_cheetah_fam10/normal'
make: *** [normal/linuxbios.rom] Error 1
It looks like abuild tries
abuild fixes, this should be the last (trivial)
Signed-off-by: Corey Osgood [EMAIL PROTECTED]
Acked-by: Corey Osgood [EMAIL PROTECTED]
Build Log:
Compilation of amd:serengeti_cheetah_fam10 is still broken
See the error log at
http://qa.linuxbios.org/log_buildbrd.php?revision=3021device
Corey Osgood wrote:
On Dec 19, 2007 4:26 PM, LinuxBIOS information [EMAIL PROTECTED]
mailto:[EMAIL PROTECTED] wrote:
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer cozzie checked in revision 3021 to
the LinuxBIOS source
Carl-Daniel Hailfinger wrote:
Add support for ST M25P80 chips to flashrom. Print status register
before erase to help debugging block locks.
Signed-off-by: Carl-Daniel Hailfinger [EMAIL PROTECTED]
I don't see how it could break anything, even if it doesn't work.
Acked-by: Corey Osgood
Ulf Jordan wrote:
On Fri, 14 Dec 2007, Corey Osgood wrote:
Ulf Jordan wrote:
Attached is a patch for superiotool adding dump support for the SMSC
LPC47M192.
/ulf
Thanks, works great!
Acked-by: Corey Osgood [EMAIL PROTECTED]
and r3007
Could you provide example dumps and update
Ulf Jordan wrote:
On Wed, 12 Dec 2007, Corey Osgood wrote:
Hey guys,
I've been looking through the datasheet on this chip, and I've got no
idea where the values you use come from. I know some of you have been
adding dump support to various chips just for the sake of having them
(which
Marc Karasek wrote:
I do not see how to put the vgabios image into LB. I see where u can
specify to run option roms and tell LB to initialize vga devices. I do
not see where you can tell it to pull in the vgabios image.
In qemu's Config.lb, you specify something like
chip
Hey guys,
I've been looking through the datasheet on this chip, and I've got no
idea where the values you use come from. I know some of you have been
adding dump support to various chips just for the sake of having them
(which is a good thing, and I'm glad you're doing it), so I was hoping
you
On Dec 12, 2007 5:02 PM, [EMAIL PROTECTED] wrote:
Quoting Corey Osgood [EMAIL PROTECTED]:
Hey guys,
I've been looking through the datasheet on this chip, and I've got no
idea where the values you use come from. I know some of you have been
adding dump support to various chips just
On Dec 12, 2007 8:53 PM, Carl-Daniel Hailfinger
[EMAIL PROTECTED] wrote:
On 13.12.2007 01:46, ron minnich wrote:
Hey, carl-daniel, what's a good payload for testing my 'payload won't
work' problem? Also, I wonder if it is because the payload runs above
0x10?
Sorry, Ron, I have no
Triton wrote:
On Tue, 11 Dec 2007 11:20:36 -0500
Marc Karasek [EMAIL PROTECTED] wrote:
I have come up with a awk script that could be used in the makefile to
query the ld version and make a decision based the output to add the
compile option or not. I have attached the script and will
aaron lwe wrote:
Corey Osgood [EMAIL PROTECTED] mailto:[EMAIL PROTECTED]
wrote:
aaron lwe wrote:
On Dec 10, 2007 10:19 AM, Corey Osgood [EMAIL PROTECTED]
mailto:[EMAIL PROTECTED]
mailto: [EMAIL PROTECTED]
mailto:[EMAIL PROTECTED] wrote:
aaron lwe wrote
Jordan Crouse wrote:
On 07/12/07 22:51 -0500, Corey Osgood wrote:
Jordan Crouse wrote:
HOST_CC=gcc
-HOST_CFLAGS=
+HOST_CFLAGS=$(STACKPROTECT)
Okay, there's reason that I've left just this part of the patch. With
the patch this way, mkelfimage builds (awesome
Jordan Crouse wrote:
On 07/12/07 00:06 -0500, Corey Osgood wrote:
Typo! That makes 2 mistakes this week! Are you feeling okay? :P
This does look pretty good though, and the idea of having v3 in buildrom
is great! I'm kicking myself now for never having used buildrom until
yesterday
To work around the -fno-stack-protector problem, which mkelfimage
isn't smart enough to handle on it's own
On 12/9/07, Peter Stuge [EMAIL PROTECTED] wrote:
On Fri, Dec 07, 2007 at 10:51:30PM -0500, Corey Osgood wrote:
-HOST_CFLAGS=
+HOST_CFLAGS=$(STACKPROTECT)
With quotes around
aaron lwe wrote:
Dear all,
the via v-link bus is for data communication between northbridge and
sourthbridge,
if I just want to make dram work, do I need to configure the v-link bus?
thanks.
No, vlink can be handled before or after ram init, and it isn't even
necessary, if no config is
Jordan Crouse wrote:
On 07/12/07 00:06 -0500, Corey Osgood wrote:
Typo! That makes 2 mistakes this week! Are you feeling okay? :P
This does look pretty good though, and the idea of having v3 in buildrom
is great! I'm kicking myself now for never having used buildrom until
yesterday
Jordan Crouse wrote:
On 06/12/07 10:00 -0700, Myles Watson wrote:
None of the new files came through. They look like they're in the
patch,
but not in the commit. Am I supposed to generate the patches
differently?
I'm just using
svn diff
Marc Karasek wrote:
I am trying to get a system up using QEMU. I have compiled LinuxBIOS
with Filo as a payload.
I followed the steps on the wiki about making a harddrive image, I had
to make it a bit bigger than 200M though.
When I boot the system, it finds the kernel and the initrd
Jordan Crouse wrote:
This is my code to expand on what Myles has already done for v3 -
basically, we move to using a V3 only .mk for LinuxBIOS, and take
advantage of LAR to clean up the build considerably. Also, introduce
my new idea for option ROMs which totally cleans things up - if this
to avoid that.
Signed-off-by: Carl-Daniel Hailfinger [EMAIL PROTECTED]
Acked-by: Corey Osgood [EMAIL PROTECTED]
--
linuxbios mailing list
linuxbios@linuxbios.org
http://www.linuxbios.org/mailman/listinfo/linuxbios
Steve Isaacs wrote:
I'm puzzled about the difference between these options. If I want to
boot using an IDE device does the following make sense?
## Boot linux from IDE
default CONFIG_IDE=1
default CONFIG_FS_STREAM=1
default CONFIG_FS_EXT2=1
default CONFIG_FS_ISO9660=1
default
On Dec 4, 2007 6:54 PM, Carl-Daniel Hailfinger
[EMAIL PROTECTED] wrote:
linuxbios.stage2.o (and stage2.o in the LAR) are NOT .o files, they are
ELF executables. Remove the .o suffix to reduce confusion.
Signed-off-by: Carl-Daniel Hailfinger [EMAIL PROTECTED]
Acked-by: Corey Osgood [EMAIL
.
This patch adds -jN support to speed builds. It passes it as an
argument to make for the kernel and uClibc. It breaks the build for
busybox, so it isn't passed there.
The default is -j1, or the status quo.
Signed-off-by: Myles Watson [EMAIL PROTECTED]
Acked-by: Corey Osgood [EMAIL
Jun Koi wrote:
Hello,
I am running LinuxBios + ADLO with QEMU. Strangely, biosdecode now
outputs nothing.
If I use the original QEMU BIOS, at least biosdecode reports BIOS32
Service Dir + PCI IRQ table + ACPI.
So why LinuxBIOS removes those information?
They simply aren't necessary for
Michiel van Dijk wrote:
Hi,
I was wondering if LinuxBIOS would work on my Compaq ProLiant 1850R server.
The current Compaq BIOS lacks a lot of options.
The system itself is not supported yet, but all the components are. It
wouldn't be very hard to port it.
I identified the following
Carl-Daniel Hailfinger wrote:
Absolute calls from initram were only working from the file which had
_MAINOBJECT #defined. Calls from all other files ended up in nirvana
because the compiler was not able to calculate the address of the
wrapper for the absolute call. The linker tried, but failed
Shocky wrote:
On Tuesday 27 November 2007 02:46, Stefan Reinauer wrote:
* Shocky [EMAIL PROTECTED] [071126 21:37]:
It just says:
Checking for pciutils and zlib... not found.
Please install pciutils-devel and zlib-devel.
Nothing more informative.
What pciutils,
ron minnich wrote:
add one debug print, move all smbus_read_byte to spd_read_byte.
attached.
ron
Acked-by: Corey Osgood [EMAIL PROTECTED]
--
linuxbios mailing list
linuxbios@linuxbios.org
http://www.linuxbios.org/mailman/listinfo/linuxbios
Carl-Daniel Hailfinger wrote:
On 27.11.2007 17:45, Corey Osgood wrote:
ron minnich wrote:
On Nov 27, 2007 8:24 AM, Corey Osgood [EMAIL PROTECTED] wrote:
+ [SPD_MIN_CYCLE_TIME_AT_CAS_MAX] = 10, /* A guess for the tRAC value
Fridel Fainshtein wrote:
OK, thank you.
My employer approved the submission. Ill do it soon.
It will be very appreciated, I can assure you of that ;) I look forward
to seeing it, and I'll be happy to test.
Thanks,
Corey
On Nov 26, 2007 1:24 AM, Corey Osgood [EMAIL PROTECTED]
mailto:[EMAIL
Forest Dean Feighner wrote:
Uwe Hermann wrote:
Please post the output of 'lspci -tvnn' and 'superiotool -dV' from the board.
Also, is your BIOS chip in a socket or soldered on the board? Please
also run 'flashrom -V' to check if flashrom supports your board (and
post the output here).
Shocky wrote:
Hi,
I'm new to LinuxBios, and just looking for a way to flash the bios on an HP
laptop without installing Windoze. None of the tricks I've found through
Google have worked for me so far, including HP's own utility for making
bootable usb keys.
Some HP laptops these days
Fridel Fainshtein wrote:
OK,
supposing FILO USB works
How do I submit the corrections?
http://www.linuxbios.org/Development_Guidelines#How_to_contribute
In short form:
1) cd to the filo-0.5/ folder
2) svn add * -R (if you've created any new files, be sure to move files
you don't want
-Daniel's patches
have been applied,
Acked-by: Corey Osgood [EMAIL PROTECTED]
--
linuxbios mailing list
linuxbios@linuxbios.org
http://www.linuxbios.org/mailman/listinfo/linuxbios
Ulf Jordan wrote:
Add dump support for the PC87366.
/ulf
Acked-by: Corey Osgood [EMAIL PROTECTED]
r2979
--
linuxbios mailing list
linuxbios@linuxbios.org
http://www.linuxbios.org/mailman/listinfo/linuxbios
bari wrote:
ron minnich wrote:
Any recommendations? I am trying to house the new SiS mainboard ...
need a case that is open and makes it easy to get to parts like the
SPI ...
ron
For development I just use a sheet of aluminum (10-12ga) and some Delrin
standoffs.
All the
Nikolay Petukhov wrote:
Info from pm49fl002/4's manual: Pm49fl002/4 write protected at power up.
This patch fix it.
I'm a bit confused, because I use the Pm49fl002/4 regularly, mostly in
BIOS Savior RD-1's. I've never had any problems writing to those chips.
This patch also needs a
Coquelicot wrote:
On Nov 21, 2007 7:46 PM, Uwe Hermann [EMAIL PROTECTED] wrote:
On Tue, Nov 20, 2007 at 08:00:14PM -0500, Corey Osgood wrote:
On 11/20/07, Coquelicot [EMAIL PROTECTED] wrote:
Hi all,
what can be responsible for long delay before starting LinuxBIOS? I
have
Uwe Hermann wrote:
On Tue, Nov 20, 2007 at 07:40:26PM +0100, Carl-Daniel Hailfinger wrote:
On 20.11.2007 19:20, ron minnich wrote:
On Nov 20, 2007 10:20 AM, Carl-Daniel Hailfinger
[EMAIL PROTECTED] wrote:
various big code changes/additions have been committed as trivial
Oops, forgot to CC the list.
-Corey
-- Forwarded message --
From: Corey Osgood [EMAIL PROTECTED]
Date: Nov 20, 2007 7:59 PM
Subject: Re: [LinuxBIOS] Could original VGA BIOS be responsible for long
timeout before LinuxBIOS kicks in?
To: Coquelicot [EMAIL PROTECTED]
On 11/20/07
On Nov 15, 2007 8:41 AM, Corey Osgood [EMAIL PROTECTED] wrote:
Fridel Fainshtein wrote:
Hello all,
It seams that the USB code was taken from the previous version of FILO
but never have been tested.
Since noone else piped up, here's what I've figured out:
Older versions of FILO
Carl-Daniel Hailfinger wrote:
Improve printk documentation to match code realities.
Signed-off-by: Carl-Daniel Hailfinger [EMAIL PROTECTED]
Acked-by: Corey Osgood [EMAIL PROTECTED]
--
linuxbios mailing list
linuxbios@linuxbios.org
http://www.linuxbios.org/mailman/listinfo/linuxbios
Fridel Fainshtein wrote:
Hello all,
It seams that the USB code was taken from the previous version of FILO
but never have been tested.
Since noone else piped up, here's what I've figured out:
Older versions of FILO (0.5) don't have any USB support. The original
author(s) of FILO's USB
Robert Vogel wrote:
I'm catching up on my reading, so there has been some delay since the last
post to this thread.
One of the reasons why the LinuxBios project seems so large is that it
attempts to satisfy the requirements of many different mother boards. Yet,
it has not come up with a
Torsten Duwe wrote:
On Saturday 10 November 2007 00:48, Carl-Daniel Hailfinger wrote:
Hi Ward,
On 08.11.2007 16:51, Carl-Daniel Hailfinger wrote:
On 08.11.2007 16:22, Ward Vandewege wrote:
On Thu, Nov 08, 2007 at 02:05:16PM -, LinuxBIOS wrote:
#87: flashrom
Torsten Duwe wrote:
On Sunday 11 November 2007 15:52, Carl-Daniel Hailfinger wrote:
Boom. The log shows why both parts of the Config.lb patch were
ineffective. Can you try the patch below on top of it? This should fix
the values for LDN 0x7. If not, please supply a boot log.
Index:
r2948, thanks
-Corey
ron minnich wrote:
Acked-by: Ronald G. Minnich [EMAIL PROTECTED]
On Nov 7, 2007 9:50 AM, Corey Osgood [EMAIL PROTECTED] wrote:
See patch
--
linuxbios mailing list
linuxbios@linuxbios.org
http://www.linuxbios.org/mailman/listinfo/linuxbios
-by: Corey Osgood [EMAIL PROTECTED]
Index: src/southbridge/via/vt8237r/vt8237r_early_smbus.c
===
--- src/southbridge/via/vt8237r/vt8237r_early_smbus.c (revision 2947)
+++ src/southbridge/via/vt8237r/vt8237r_early_smbus.c (working copy
Myles Watson wrote:
This patch adds this line to src/mainboard/amd/serengeti_cheetah/Options.lb:
uses CONFIG_PRECOMPRESSED_PAYLOAD
For what purpose? abuild or buildrom? Needs a signed-off-by line as
well, no matter how trivial.
-Corey
--
linuxbios mailing list
linuxbios@linuxbios.org
Jordan Crouse wrote:
On 07/11/07 09:31 -0500, Ward Vandewege wrote:
I really need to make work of that kconfig option for 'add vga bios after
compile'.
I'm assuming its not freely distributable? If it is, then we can wget
it and prepend it automagically. If its not, then we have
Sorry, Thunderbird dumps emails more than a month old, so I don't have
the original message to respond to.
carpc:~/superiotool# superiotool
superiotool r2922
Found Fintek F71805F/FG (vid=0x3419, id=0x0604) at 0x4e
carpc:~/superiotool# superiotool -v
superiotool r2922
carpc:~/superiotool#
.
Signed-off-by: Corey Osgood [EMAIL PROTECTED]
Index: src/southbridge/via/vt8237r/vt8237r.c
===
--- src/southbridge/via/vt8237r/vt8237r.c (revision 2947)
+++ src/southbridge/via/vt8237r/vt8237r.c (working copy)
@@ -48,7 +48,7
And CN700 will be supported very soon, once I can free up a few more
registers. Only problem is, it only supports a single dimm for now. Wish
I could afford $60 to buy the board.
-Corey
Vlad wrote:
Hi,
Walmart has chosen to pre-install Linux on their least expensive
computer, the Everex
Rudolf Marek wrote:
Corey Osgood wrote:
See patch. Rudolf, can you test this one to make sure it works correctly
on your board?
Hi,
Your patch seems not so solve KBD and RTC correct?
Correct, kbc/rtc init should handle things their own way. I thought
about doing that when we come
-by: Corey Osgood [EMAIL PROTECTED]
Index: src/cpu/via/model_centaur/model_centaur_init.c
===
--- src/cpu/via/model_centaur/model_centaur_init.c (revision 2947)
+++ src/cpu/via/model_centaur/model_centaur_init.c (working copy)
@@ -48,6
Vlad wrote:
Has anyone looked into supporting the motherboard that powers the
Everex TC2502 Green gPC? The makers of gOS [2] point to the
development kit motherboard with part number PC2500E, available from
ClubIT.com [3]. Is it already supported by the vt8237r and Via C7 code
checked into
Corey Osgood wrote:
Updated patch attached, thanks for the suggestions. I think I've done
this right, can you have a look at it/test it? I can't test on hardware
ATM because of some work I'm doing on ram init.
Oops, little mistake. This line:
+ if (disable_bit == 0x4) enabled = 0
Vlad wrote:
--- Corey Osgood [EMAIL PROTECTED] wrote:
FILO has support for USB, but unfortunately UHCI is broken and EHCI
is
unsupported.
GRUB 2 is also supported as a LinuxBIOS payload now.[1] Can GRUB 2
boot from USB?
Vlad
[1] http://www.linuxbios.org/pipermail/linuxbios
[EMAIL PROTECTED] wrote:
Little confused by this. Isn't this supposed to be posted to the list
first for review, before being commited? Is it ok for the same person
to Signed-off-by: and Acked-by:?? See comments below...
This qualifies as a trivial patch, in other words the only
Gregg C Levine wrote:
Hello!
I have a project taking shape that would eventually have a system booting a
file-system from USB.
Sweet! I look forward to your results!
I remember that we had a method of doing something of a sort from USB, using
the contents of the v1 release. To be honest
for the vt8237r, by setting them up automatically depending on if the function is enabled or not (based on the i82801xx). Also makes writeback use printk() instead of print().
Signed-off-by: Corey Osgood [EMAIL PROTECTED]
Index: src/southbridge/via/vt8237r/vt8237r.c
Uwe Hermann wrote:
On Fri, Nov 02, 2007 at 01:30:25PM -0400, Corey Osgood wrote:
Signed-off-by: Corey Osgood [EMAIL PROTECTED]
according to micron), just in case. I've left the function in vt8237r
because there's no file that it would really fit into right now. If
someone else
Uwe Hermann wrote:
On Fri, Nov 02, 2007 at 02:03:18AM -0400, Corey Osgood wrote:
@@ -79,11 +62,14 @@
loops = 0;
/* Yes, this is a mess, but it's the easiest way to do it. */
-while ((inb(SMBHSTSTAT) 1) == 1 loops = SMBUS_TIMEOUT)
+while ((inb(SMBHSTSTAT) 1) == 1
[EMAIL PROTECTED] wrote:
Quoting Uwe Hermann [EMAIL PROTECTED]:
On Thu, Nov 01, 2007 at 09:30:11AM -0400, [EMAIL PROTECTED] wrote:
Hello,
I am having prolems with the mptable utility. I keeps telling me MP
FPS NOT found, suggest trying -grope option!!!. If I try the grope
option
Updated patch attached.
Signed-off-by: Corey Osgood [EMAIL PROTECTED]
Comments inline below.
Uwe Hermann wrote:
On Fri, Nov 02, 2007 at 12:39:16PM -0400, Corey Osgood wrote:
Please explain the SPD_MEMORY_TYPE_SDRAM/SPD_MEMORY_TYPE_SDRAM_DDR2
check in the comment here.
If all you want
Peter Stuge wrote:
On Fri, Nov 02, 2007 at 01:30:25PM -0400, Corey Osgood wrote:
+void smbus_fixup(const struct mem_controller *ctrl)
+{
+int i, ram_slots, current_slot = 0;
+u8 result = 0;
+
+ram_slots = ARRAY_SIZE(ctrl-channel0);
+if (!ram_slots
Russell Whitaker wrote:
On Fri, 2 Nov 2007, Corey Osgood wrote:
Peter Stuge wrote:
On Fri, Nov 02, 2007 at 01:30:25PM -0400, Corey Osgood wrote:
+++ src/include/spd.h(working copy)
@@ -105,6 +105,7 @@
#define SPD_MEMORY_TYPE_SGRAM_DDR6
#define SPD_MEMORY_TYPE_SDRAM_DDR
Corey Osgood wrote:
This patch is some small changes to the vt8237r to prepare it for
the Jetway J7F2 patch that should be coming soon, and also moves most
defines into vt8237r.h. I've changed some of the values from u32 to u8,
because that's all they should ever need to be. Also includes
1 - 100 of 467 matches
Mail list logo
