Quoting [EMAIL PROTECTED]:
Quoting Tom Sylla [EMAIL PROTECTED]:
[EMAIL PROTECTED] wrote:
So, I should just need to clear any parity and serr errors after
pci_bus_enable_resources() function runs but before the
pci_dev_enable_resources() function runs. Like this:
Well, my suggestion was
On Mon, Sep 17, 2007 at 09:06:19AM -0400, [EMAIL PROTECTED] wrote:
Well I figured out what the problem is. I have a parity error in the
PD_STS?Primary Device Status Register 0x06 and can't clear the bit 15.
When I try it just goes back to 0x8080. I am supposed to be able to
clear this bit
Quoting Tom Sylla [EMAIL PROTECTED]:
Can you check the SERR and PERR status in the bridge before the
enable? (they are in offset 1f of config space) If you clear them
first, does it help? We have a platform with a different southbridge
where we find that to be the case (clearing the status
Quoting Tom Sylla [EMAIL PROTECTED]:
[EMAIL PROTECTED] wrote:
So, I should just need to clear any parity and serr errors after
pci_bus_enable_resources() function runs but before the
pci_dev_enable_resources() function runs. Like this:
Well, my suggestion was only to try that as a
Quoting Uwe Hermann [EMAIL PROTECTED]:
On Wed, Sep 12, 2007 at 03:26:17AM -0400, [EMAIL PROTECTED] wrote:
Hello,
Here is an overview of my problem. When booting, LB freezes when
trying to Enabling resources... of the PCI Bridge (00:1e.0). I am
using the i82801xx code. I think I figured out
On Thu, Sep 13, 2007 at 02:40:16AM -0400, [EMAIL PROTECTED] wrote:
I wonder if my nic needs the pci rom to get it going, and this
would solve the problem?
The ROM would be used much later in the init process, so no, it's not
likely to help. :\
//Peter
--
linuxbios mailing list
Quoting Peter Stuge [EMAIL PROTECTED]:
On Thu, Sep 13, 2007 at 02:40:16AM -0400, [EMAIL PROTECTED] wrote:
I wonder if my nic needs the pci rom to get it going, and this
would solve the problem?
The ROM would be used much later in the init process, so no, it's not
likely to help. :\
After
Can you check the SERR and PERR status in the bridge before the
enable? (they are in offset 1f of config space) If you clear them
first, does it help? We have a platform with a different southbridge
where we find that to be the case (clearing the status bits first
makes it not hang)
On 9/13/07,
Hello,
Here is an overview of my problem. When booting, LB freezes when
trying to Enabling resources... of the PCI Bridge (00:1e.0). I am
using the i82801xx code. I think I figured out what is wrong but I
don't know why. Reading resources... of the device seems to go ok
(see below) but
On Wed, Sep 12, 2007 at 03:26:17AM -0400, [EMAIL PROTECTED] wrote:
Hello,
Here is an overview of my problem. When booting, LB freezes when
trying to Enabling resources... of the PCI Bridge (00:1e.0). I am
using the i82801xx code. I think I figured out what is wrong but I
don't know why.
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