Re: [Mesa-dev] [PATCH] mesa/main: Fix memset in formatquery.c

On Fri, 2017-03-17 at 16:26 +1100, Edward O'Callaghan wrote: > We memset number of elements without multiplication by the > element size. > > Signed-off-by: Edward O'Callaghan > --- > src/mesa/main/formatquery.c | 2 +- > 1 file changed, 1 insertion(+), 1

[Mesa-dev] [PATCH] mesa/main: Fix memset in formatquery.c

We memset number of elements without multiplication by the element size. Signed-off-by: Edward O'Callaghan --- src/mesa/main/formatquery.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/formatquery.c b/src/mesa/main/formatquery.c

Re: [Mesa-dev] [PATCH 6/7] gallium/radeon: formalize that create_batch_query doesn't need pipe_context

4, 5 & 6 are: Reviewed-by: Timothy Arceri ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/7] radeonsi: compile all TGSI compute shaders asynchronously

Reviewed-by: Timothy Arceri ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] radv/meta: fix image clears for r4g4 format.

From: Dave Airlie This just uses an 8-bit clear and packs the values. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_meta_clear.c | 8 1 file changed, 8 insertions(+) diff --git a/src/amd/vulkan/radv_meta_clear.c

Re: [Mesa-dev] [PATCH v3 1/1] clover: use pipe_resource references

On Thu, 2017-03-16 at 18:07 -0700, Francisco Jerez wrote: > Jan Vesely writes: > > > On Thu, 2017-03-16 at 17:22 -0700, Francisco Jerez wrote: > > > Jan Vesely writes: > > > > > > > On Thu, 2017-03-16 at 15:24 -0700, Francisco Jerez wrote: > > >

[Mesa-dev] [PATCH] spirv: Implement IsInf using an integer comparison

Since we already do fabs on the one source, we're guaranteed to get positive infinity if we get any infinity at all. Since +inf only has one IEEE 754 representation, we can use an integer comparison and avoid all of the ordered/unordered issues. Cc: Dave Airlie ---

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

Quoting Marek Olšák (2017-03-16 18:53:59) > On Fri, Mar 17, 2017 at 12:11 AM, Dylan Baker wrote: > > Quoting Marek Olšák (2017-03-16 15:36:26) > >> Is there a way not to use ninja with meson, because ninja redirects > >> all stderr output from gcc to stdout, which breaks many

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

quoting jason ekstrand (2017-03-16 19:03:15) > on march 16, 2017 5:41:24 pm emil velikov wrote: > > and meson is not a thing on neither bsd(s), solaris (and derivatives) nor > > android :-\ > > i have trouble bringing myself to care. the bsds need to stop using 10 >

[Mesa-dev] [PATCH 1/2] radv: flush f32->f16 conversion denormals to zero. (v2)

From: Dave Airlie SPIR-V defines the f32->f16 operation as flushing denormals to 0, this compares the class using amd class opcode. Thanks to Matt Arsenault for figuring it out. This fix is VI+ only, add a TODO for SI/CIK. This fixes:

[Mesa-dev] [PATCH 2/2] radv/ac: canonicalize the output for 32-bit float min/max.

From: Dave Airlie This fixes: dEQP-VK.glsl.builtin.precision.min.* dEQP-VK.glsl.builtin.precision.max.* dEQP-VK.glsl.builtin.precision.clamp.* As weren't flushing the denorms as SPIR-V required. Signed-off-by: Dave Airlie ---

Re: [Mesa-dev] [PATCH 1/2] nir: add an isinf opcode, and an option to use it.

Am 17.03.2017 um 04:33 schrieb Roland Scheidegger: > Am 17.03.2017 um 02:29 schrieb Dave Airlie: >> On 17 March 2017 at 11:09, Jason Ekstrand wrote: >>> On March 16, 2017 5:04:37 PM Dave Airlie wrote: >>> From: Dave Airlie

Re: [Mesa-dev] [PATCH] radv/ac: canonicalize the output for 32-bit float min/max.

Doh missent two patches, will rebase and resend. Dave. > > This fixes: > dEQP-VK.glsl.builtin.precision.min.* > dEQP-VK.glsl.builtin.precision.max.* > dEQP-VK.glsl.builtin.precision.clamp.* > > As weren't flushing the denorms as SPIR-V required. > > Signed-off-by: Dave Airlie

Re: [Mesa-dev] [PATCH 1/2] nir: add an isinf opcode, and an option to use it.

On Thu, Mar 16, 2017 at 8:33 PM, Roland Scheidegger wrote: > Am 17.03.2017 um 02:29 schrieb Dave Airlie: > > On 17 March 2017 at 11:09, Jason Ekstrand wrote: > >> On March 16, 2017 5:04:37 PM Dave Airlie wrote: > >> > >>> From: Dave

[Mesa-dev] [PATCH] radv/ac: canonicalize the output for 32-bit float min/max.

From: Dave Airlie This fixes: dEQP-VK.glsl.builtin.precision.min.* dEQP-VK.glsl.builtin.precision.max.* dEQP-VK.glsl.builtin.precision.clamp.* As weren't flushing the denorms as SPIR-V required. Signed-off-by: Dave Airlie ---

Re: [Mesa-dev] [PATCH 1/2] nir: add an isinf opcode, and an option to use it.

Am 17.03.2017 um 02:29 schrieb Dave Airlie: > On 17 March 2017 at 11:09, Jason Ekstrand wrote: >> On March 16, 2017 5:04:37 PM Dave Airlie wrote: >> >>> From: Dave Airlie >>> >>> In order to get isinf(NaN) correct, at least radv can't

Re: [Mesa-dev] [PATCH] radv: flush f32->f16 conversion denormals to zero.

> On Mar 16, 2017, at 20:02, Dave Airlie wrote: > > From: Dave Airlie > > SPIR-V defines the f32->f16 operation as flushing denormals to 0, > this compares the class using amd class opcode. > > Thanks to Matt Arsenault for figuring it out. > > This

[Mesa-dev] [PATCH] radv: flush f32->f16 conversion denormals to zero.

From: Dave Airlie SPIR-V defines the f32->f16 operation as flushing denormals to 0, this compares the class using amd class opcode. Thanks to Matt Arsenault for figuring it out. This fixes: dEQP-VK.spirv_assembly.instruction.compute.opquantize.flush_to_zero Signed-off-by:

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

On Thu, Mar 16, 2017 at 8:03 PM, Jason Ekstrand wrote: > On March 16, 2017 5:41:24 PM Emil Velikov > wrote: > >> On 17 March 2017 at 00:21, Dylan Baker wrote: >> >>> Hi Emil, >>> >>> Quoting Emil Velikov (2017-03-16 16:35:33)

[Mesa-dev] [PATCH 1/2] nir: add an isinf opcode, and an option to use it. (v2)

From: Dave Airlie In order to get isinf(NaN) correct, at least radv can't use an unordered equals which feq has to be for us, this passes isinf to the backend and let's it sort it out as it pleases. This turns lowering on for i965 only as it's the only other spir-v consumer

[Mesa-dev] [PATCH 2/2] radv/ac: emit isinf using ordered equal (v2)

From: Dave Airlie This fixes: dEQP-VK.glsl.builtin.function.common.isinf.* v2: update to lower_isinf. Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 14 ++ 1 file changed, 14 insertions(+) diff --git

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

On March 16, 2017 5:41:24 PM Emil Velikov wrote: On 17 March 2017 at 00:21, Dylan Baker wrote: Hi Emil, Quoting Emil Velikov (2017-03-16 16:35:33) While I can see you're impressed by Meson, I would kindly urge you to not use it here. As you

[Mesa-dev] [Bug 100223] marshal_generated.c:38:10: fatal error: 'X11/Xlib-xcb.h' file not found

https://bugs.freedesktop.org/show_bug.cgi?id=100223 Timothy Arceri changed: What|Removed |Added Status|NEW |RESOLVED

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

On Fri, Mar 17, 2017 at 12:11 AM, Dylan Baker wrote: > Quoting Marek Olšák (2017-03-16 15:36:26) >> Is there a way not to use ninja with meson, because ninja redirects >> all stderr output from gcc to stdout, which breaks many development >> environments that expect errors in

Re: [Mesa-dev] [PATCH 1/2] nir: add an isinf opcode, and an option to use it.

> Another option would be to make this lower_isinf and add a quick lowering > line to nir_opt_algebraic. That's more idiomatic for nir. If I do that though won't that mean I have to set lower_isinf for all current NIR users? Dave. ___ mesa-dev mailing

Re: [Mesa-dev] [PATCH 1/2] nir: add an isinf opcode, and an option to use it.

On 17 March 2017 at 11:09, Jason Ekstrand wrote: > On March 16, 2017 5:04:37 PM Dave Airlie wrote: > >> From: Dave Airlie >> >> In order to get isinf(NaN) correct, at least radv can't >> use an unordered equals which feq has to be for

[Mesa-dev] [Bug 100236] Undefined symbols for architecture x86_64: "typeinfo for llvm::RTDyldMemoryManager"

https://bugs.freedesktop.org/show_bug.cgi?id=100236 --- Comment #3 from Michel Dänzer --- What does LLVM_CXXFLAGS contain in config.log before and after that commit? -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for the

Re: [Mesa-dev] [PATCH v3 1/1] clover: use pipe_resource references

Jan Vesely writes: > On Thu, 2017-03-16 at 17:22 -0700, Francisco Jerez wrote: >> Jan Vesely writes: >> >> > On Thu, 2017-03-16 at 15:24 -0700, Francisco Jerez wrote: >> > > Jan Vesely writes: >> > > >> > > > v2: buffers

Re: [Mesa-dev] [PATCH 1/2] nir: add an isinf opcode, and an option to use it.

On March 16, 2017 5:04:37 PM Dave Airlie wrote: From: Dave Airlie In order to get isinf(NaN) correct, at least radv can't use an unordered equals which feq has to be for us, this passes isinf to the backend and let's it sort it out as it pleases. I

[Mesa-dev] [PATCH] i965: bounds checks while concatenating sysfs paths

This adds some missing return value checks for all uses of snprintf in brw_performance_query.c. This also switches a use of strncpy + strncat for snprintf for consistency and to avoiding the chance of the strncpy leaving an unterminated string in the dest buffer if the src is too long. This issue

Re: [Mesa-dev] MESA and KOTOR

I managed to fix the patch and apply it to mesa master, but I'm getting the same result as with my stub. The crash is still the same, in glu32.dll, I wonder if the GLU that you guys have in your repo will work any better. I tried to crosscompile it but without luck, any instructions? Still, I

Re: [Mesa-dev] [PATCH] configure.ac: Use POSIX word boundary regex.

Vinson Lee writes: > -# Use \> (marks the end of the word) > +# Use [[:>:]] (marks the end of the word) [[:>:]] is "an extension, compatible with but not specified by POSIX 1003.2". GNU libc doesn't support it. $ echo 'foot foo bar' | sed -E 's/foo[[:>:]]//g' sed:

Re: [Mesa-dev] [PATCH v3 1/1] clover: use pipe_resource references

On Thu, 2017-03-16 at 17:22 -0700, Francisco Jerez wrote: > Jan Vesely writes: > > > On Thu, 2017-03-16 at 15:24 -0700, Francisco Jerez wrote: > > > Jan Vesely writes: > > > > > > > v2: buffers are created with one reference. > > > > v3: add

Re: [Mesa-dev] [PATCH 1/2] nir: add an isinf opcode, and an option to use it.

On Fri, Mar 17, 2017 at 1:04 AM, Dave Airlie wrote: > From: Dave Airlie > > In order to get isinf(NaN) correct, at least radv can't > use an unordered equals which feq has to be for us, this Why do we have to use an unordered equal normally? SPIR-V has

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

On 17 March 2017 at 00:21, Dylan Baker wrote: > Hi Emil, > > Quoting Emil Velikov (2017-03-16 16:35:33) >> While I can see you're impressed by Meson, I would kindly urge you to >> not use it here. As you look closely you can see that one could >> trivially improve the times,

Re: [Mesa-dev] [PATCH v2 24/25] intel/vulkan: Get rid of recursive make

On Thu, Mar 9, 2017 at 9:07 PM, Emil Velikov wrote: > From: Jason Ekstrand > > v2 [Emil Velikov] > - Various fixes and initial stab at the Android build. > - Keep the generation rules/EXTRA_DIST outside the conditional This has broken anv

Re: [Mesa-dev] [PATCH] i965: Select pipeline and emit state base address in Gen8+ HiZ ops.

On Wednesday, March 8, 2017 10:27:20 AM PDT Nanley Chery wrote: > On Wed, Mar 08, 2017 at 10:07:12AM -0800, Nanley Chery wrote: > > On Wed, Mar 08, 2017 at 02:17:59AM -0800, Kenneth Graunke wrote: > > > On Thursday, March 2, 2017 4:36:08 PM PST Nanley Chery wrote: > > > > On Mon, Feb 06, 2017 at

Re: [Mesa-dev] [PATCH v3 1/1] clover: use pipe_resource references

Jan Vesely writes: > On Thu, 2017-03-16 at 15:24 -0700, Francisco Jerez wrote: >> Jan Vesely writes: >> >> > v2: buffers are created with one reference. >> > v3: add pipe_resource reference to mapping object >> > >> >> Mapping objects are

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

Hi Emil, Quoting Emil Velikov (2017-03-16 16:35:33) > While I can see you're impressed by Meson, I would kindly urge you to > not use it here. As you look closely you can see that one could > trivially improve the times, yet the biggest thing is that most of the > code in libdrm must go ;-)

[Mesa-dev] [PATCH] i965: Remove pointless NULL check from Gen6 primitive counting code.

We create the BO when creating a transform feedback object, and only destroy it when deleting that object. So it won't be NULL. CID: 1401410 --- src/mesa/drivers/dri/i965/gen6_sol.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c

Re: [Mesa-dev] [PATCH 2/4] glsl: add new IR lower pass for sqrt(abs()) and inversesqrt(abs())

On 03/17/2017 01:17 AM, Kenneth Graunke wrote: On Thursday, March 16, 2017 5:06:55 PM PDT Samuel Pitoiset wrote: Looks easier to do that at lowering time and mostly because builtin_builder is a singleton class without access to any states/constants. Signed-off-by: Samuel Pitoiset

Re: [Mesa-dev] [PATCH] util/disk_cache: pass predicate functions file stats directly (v3)

On Thu, Mar 16, 2017 at 7:36 PM, Alan Swanson wrote: > Since switching to LRU eviction the only user of these predicate > functions now resolves directory entry stats itself so pass them > directly saving calling fstat and strlen twice (and the > expensive strlen is

Re: [Mesa-dev] [PATCH 2/4] glsl: add new IR lower pass for sqrt(abs()) and inversesqrt(abs())

On Thursday, March 16, 2017 5:06:55 PM PDT Samuel Pitoiset wrote: > Looks easier to do that at lowering time and mostly because > builtin_builder is a singleton class without access to any > states/constants. > > Signed-off-by: Samuel Pitoiset > --- >

[Mesa-dev] [PATCH 2/4] glsl: add new IR lower pass for sqrt(abs()) and inversesqrt(abs())

Looks easier to do that at lowering time and mostly because builtin_builder is a singleton class without access to any states/constants. Signed-off-by: Samuel Pitoiset --- src/compiler/Makefile.sources | 1 + src/compiler/glsl/ir_optimization.h | 2 +

[Mesa-dev] [PATCH 4/4] drirc: add force_glsl_abs_sqrt() for "Spec Ops: The Line"

Game ported from D3D9 which expects sqrt() to compute the absolute value as explained in the spec. This gets rid of the NaN values as well as the black squares with RadeonSI. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97338 Signed-off-by: Samuel Pitoiset

[Mesa-dev] [PATCH 3/4] st/glsl_to_tgsi: enable lower_sqrt() conditionally

It relies on the force_glsl_abs_sqrt driconf option. Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp

[Mesa-dev] [PATCH 1/4] driconf: add force_glsl_abs_sqrt option

This will allow to force computing the absolute value for sqrt() and inversesqrt() in order to follow D3D9 behaviour for buggy apps that rely on it. Signed-off-by: Samuel Pitoiset --- src/gallium/include/state_tracker/st_api.h | 1 +

Re: [Mesa-dev] [PATCH] i965: avoid using a GNU make pattern rule

On 16 March 2017 at 23:53, Robert Bragg wrote: > On Thu, Mar 16, 2017 at 1:50 PM, Emil Velikov > wrote: >> On 16 March 2017 at 02:49, Jonathan Gray wrote: >>> % pattern rules are a GNU extension. As there is only one file here

[Mesa-dev] [PATCH 1/2] nir: add an isinf opcode, and an option to use it.

From: Dave Airlie In order to get isinf(NaN) correct, at least radv can't use an unordered equals which feq has to be for us, this passes isinf to the backend and let's it sort it out as it pleases. Signed-off-by: Dave Airlie --- src/compiler/nir/nir.h

[Mesa-dev] [PATCH 2/2] radv/ac: emit isinf using ordered equal

From: Dave Airlie This fixes: dEQP-VK.glsl.builtin.function.common.isinf.* Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 14 ++ src/amd/vulkan/radv_pipeline.c | 1 + 2 files changed, 15 insertions(+) diff --git

[Mesa-dev] [PATCH] st/dri: wait for thread to finish before unbinding context

Fixes a bunch of piglit crashes that hit an assert() when trying to delete the framebuffer. The assert() was triggered because WinSysDrawBuffer was set to NULL before glDeleteFramebuffers() was called. --- src/gallium/state_trackers/dri/dri_context.c | 3 +++ 1 file changed, 3 insertions(+) diff

Re: [Mesa-dev] [PATCH] i965: avoid using a GNU make pattern rule

On Thu, Mar 16, 2017 at 1:50 PM, Emil Velikov wrote: > On 16 March 2017 at 02:49, Jonathan Gray wrote: >> % pattern rules are a GNU extension. As there is only one file here >> avoid patterns and globbing entirely to fix the build on non-GNU make. >> >>

Re: [Mesa-dev] [PATCH 6/7] intel: Fix requests for exact surface row pitch

On Wed 15 Mar 2017, Jason Ekstrand wrote: > They should probably assert that isl_surf_init succeeds instead. Good point. I'll fix that. > > On Mon, Mar 13, 2017 at 3:28 PM, Chad Versace > wrote: > > > All callers of isl_surf_init() that set 'min_row_pitch' wanted to

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

Hi Dylan, On 16 March 2017 at 21:25, Dylan Baker wrote: > Why bother, and why would we want this? >│~ > > First it's written in python, which means the potential developer base > is massive. And it provides a

Re: [Mesa-dev] [PATCH 4/7] isl: Validate the calculated row pitch

On Wed 15 Mar 2017, Jason Ekstrand wrote: > Fun story: This will implicitly handle the (invalid) case of trying to > create a MCS for a 16xMSAA surface that's more than 8k wide. :-) We may > want to keep the check in init_mcs for clarity and because it's in the docs > but the extra validation is

Re: [Mesa-dev] [PATCH 4/7] isl: Validate the calculated row pitch

On Wed 15 Mar 2017, Jason Ekstrand wrote: > On Wed, Mar 15, 2017 at 3:34 PM, Nanley Chery wrote: > > > On Mon, Mar 13, 2017 at 03:28:01PM -0700, Chad Versace wrote: > > > Validate that it fits in RENDER_SURFACE_STATE::SurfacePitch or, if it's > > > an aux surface,

Re: [Mesa-dev] [PATCH 3/7] isl: Add func isl_tiling_is_aux()

On Thu, Mar 16, 2017 at 4:17 PM, Chad Versace wrote: > On Wed 15 Mar 2017, Jason Ekstrand wrote: > > On Mon, Mar 13, 2017 at 3:28 PM, Chad Versace > > wrote: > > > > > --- > > > src/intel/isl/isl.h | 9 + > > > 1 file changed, 9

Re: [Mesa-dev] [PATCH 3/7] isl: Add func isl_tiling_is_aux()

On Wed 15 Mar 2017, Jason Ekstrand wrote: > On Mon, Mar 13, 2017 at 3:28 PM, Chad Versace > wrote: > > > --- > > src/intel/isl/isl.h | 9 + > > 1 file changed, 9 insertions(+) > > > > diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h > > index

Re: [Mesa-dev] [PATCH 00/23] nir/i965: Return progress from NIR passes

On Thu, Mar 16, 2017 at 2:17 PM, Matt Turner wrote: > I started to add support to NIR for something like INTEL_DEBUG=optimizer, > but > then realized that a bunch of NIR passes didn't even return progress. > > After fixing that, I realized that a bunch of NIR passes didn't

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

Quoting Marek Olšák (2017-03-16 15:36:26) > Is there a way not to use ninja with meson, because ninja redirects > all stderr output from gcc to stdout, which breaks many development > environments that expect errors in stderr? > > I'm basically saying that if ninja can't keep gcc errors in

Re: [Mesa-dev] [PATCH 19/23] nir: Return progress from nir_convert_from_ssa().

On Thu, Mar 16, 2017 at 2:18 PM, Matt Turner wrote: > --- > src/compiler/nir/nir.h | 2 +- > src/compiler/nir/nir_from_ssa.c | 21 +++-- > 2 files changed, 16 insertions(+), 7 deletions(-) > > diff --git a/src/compiler/nir/nir.h

Re: [Mesa-dev] [PATCH v3 1/1] clover: use pipe_resource references

On Thu, 2017-03-16 at 15:24 -0700, Francisco Jerez wrote: > Jan Vesely writes: > > > v2: buffers are created with one reference. > > v3: add pipe_resource reference to mapping object > > > > Mapping objects are supposed to be short-lived, they're logically part > of the

[Mesa-dev] [PATCH] configure.ac: Use POSIX word boundary regex.

Fixes: fe56c745b8cb ("Convert sed(1) syntax to be compatible with FreeBSD and OpenBSD") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100236 Signed-off-by: Vinson Lee --- configure.ac | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

Is there a way not to use ninja with meson, because ninja redirects all stderr output from gcc to stdout, which breaks many development environments that expect errors in stderr? I'm basically saying that if ninja can't keep gcc errors in stderr, I wouldn't like any project that I might be

Re: [Mesa-dev] [PATCH v3 1/1] clover: use pipe_resource references

Jan Vesely writes: > v2: buffers are created with one reference. > v3: add pipe_resource reference to mapping object > Mapping objects are supposed to be short-lived, they're logically part of the parent resource object so they shouldn't ever out-live it. What is this

Re: [Mesa-dev] [PATCH 04/23] nir: Return progress from nir_lower_vars_to_ssa().

On Thu, Mar 16, 2017 at 2:18 PM, Matt Turner wrote: > --- > src/compiler/nir/nir.h | 2 +- > src/compiler/nir/nir_lower_vars_to_ssa.c | 8 ++-- > 2 files changed, 7 insertions(+), 3 deletions(-) > > diff --git a/src/compiler/nir/nir.h

Re: [Mesa-dev] [PATCH 1/4] i965: Fall back to GL 4.2 on Haswell if the kernel isn't new enough.

On Thu, Mar 16, 2017 at 6:12 PM, Kenneth Graunke wrote: > In commit d2590eb65ff28a9cbd592353d15d7e6cbd2c6fc6 I enabled GL 4.5 > on Haswell...but failed to check if we could do indirect compute > shader dispatch...and query buffer objects. > > Indirect compute shader

Re: [Mesa-dev] [PATCH] i965: Select pipeline and emit state base address in Gen8+ HiZ ops.

On Wed, Mar 08, 2017 at 10:27:20AM -0800, Nanley Chery wrote: > On Wed, Mar 08, 2017 at 10:07:12AM -0800, Nanley Chery wrote: > > On Wed, Mar 08, 2017 at 02:17:59AM -0800, Kenneth Graunke wrote: > > > On Thursday, March 2, 2017 4:36:08 PM PST Nanley Chery wrote: > > > > On Mon, Feb 06, 2017 at

[Mesa-dev] [PATCH 1/4] i965: Fall back to GL 4.2 on Haswell if the kernel isn't new enough.

In commit d2590eb65ff28a9cbd592353d15d7e6cbd2c6fc6 I enabled GL 4.5 on Haswell...but failed to check if we could do indirect compute shader dispatch...and query buffer objects. Indirect compute shader dispatch requires command parser version 5 (kernel commit

[Mesa-dev] [PATCH 2/4] i965: Document the sad story of the kernel command parser.

This should help us figure out the complexities of which kernel versions we need to get various features on various platforms. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/intel_screen.c | 97 1 file changed, 97

[Mesa-dev] [PATCH 4/4] i965: Skip register write detection when possible.

Detecting register write support by trial and error introduces a stall at screen creation time, which it would be nice to avoid. Certain command parser versions guarantee this will work (see the giant comment in intelInitScreen2 below, or a few commits ago): - Ivybridge: version >= 1 (kernel

[Mesa-dev] [PATCH 3/4] i965: Set screen->cmd_parser_version to 0 if we can't write registers.

If we can't write registers, then the effective command parser version is 0 - it may exist, but it's not usefully enabling anything. See kernel commit 1ca3712ca3429a617ed6c5f87718e4f6fe4ae0c6 (in v4.8) where the kernel starts doing this for us. This makes us do more or less the same thing on

Re: [Mesa-dev] [PATCH 2/2] radv: add external memory support.

On Wed, Mar 15, 2017 at 1:25 AM, Dave Airlie wrote: > From: Dave Airlie > > This adds support for exporting 2D images, to an > opaque fd. > > This implements the: > VK_KHX_external_memory_capabilities > VK_KHX_external_memory > VK_KHX_external_memory_fd > >

[Mesa-dev] [PATCH v3 1/1] clover: use pipe_resource references

v2: buffers are created with one reference. v3: add pipe_resource reference to mapping object CC: "17.0 13.0" Signed-off-by: Jan Vesely --- src/gallium/state_trackers/clover/core/resource.cpp | 11 ---

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

Quoting Ilia Mirkin (2017-03-16 14:32:09) > On Thu, Mar 16, 2017 at 5:25 PM, Dylan Baker wrote: > > Why bother, and why would we want this? > > │~ > > > > First it's written in python, which means the potential

[Mesa-dev] [PATCH v2 16/16] anv: Turn on inherited queries

It all just works since it's just a hardware register so we might as well turn it on. --- src/intel/vulkan/anv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 8d4d243..f158d77 100644 ---

[Mesa-dev] [PATCH v2 13/16] anv/pipeline: Enable clipper statistics

--- src/intel/vulkan/genX_pipeline.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index a6ec3b6..bb3e203 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -995,6 +995,7 @@

[Mesa-dev] [PATCH v2 15/16] anv: Implement pipeline statistics queries

From: Ilia Mirkin In the end, pipeline statistics queries look a lot like occlusion queries only with between 1 and 11 begin/end pairs being generated instead of just the one. Reviewed-By: Lionel Landwerlin --- src/intel/vulkan/TODO

[Mesa-dev] [PATCH v2 14/16] anv: Disable VF statistics for blorp and SOL memcpy

In order to get accurate statistics, we need to disable statistics for blits, clears, and the surface state memcpy at the top of each secondary command buffer. There are two possible approaches to this: 1) Disable before the blit/memcpy and re-enable afterwards 2) Move emitting

[Mesa-dev] [PATCH v2 12/16] genxml: s/Clipper Statistics Enable/Statistics Enable/

It's in 3DSTATE_CLIP, so it doesn't really need the extra detail. This matches what we do for VS, FS, etc. --- src/intel/genxml/gen6.xml | 2 +- src/intel/genxml/gen7.xml | 2 +- src/intel/genxml/gen75.xml | 2 +- src/intel/genxml/gen8.xml | 2 +- src/intel/genxml/gen9.xml | 2 +- 5 files

[Mesa-dev] [PATCH v2 10/16] anv/query: Break GPU query calculation into a helper

Reviewed-By: Lionel Landwerlin --- src/intel/vulkan/genX_query.c | 30 ++ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c index b8d4c55..6c26e6a 100644 ---

[Mesa-dev] [PATCH v2 09/16] genxml: Add pipeline statistics registers on gen7+

Reviewed-By: Lionel Landwerlin --- src/intel/genxml/gen7.xml | 44 src/intel/genxml/gen75.xml | 44 src/intel/genxml/gen8.xml | 44

[Mesa-dev] [PATCH v2 11/16] anv/query: Rework store_query_result

The new version is a nice GPU parallel to cpu_write_query_result and it nicely handles things like dealing with 32 vs. 64-bit offsets in the destination buffer. Reviewed-By: Lionel Landwerlin --- src/intel/vulkan/genX_query.c | 39

[Mesa-dev] [PATCH v2 08/16] anv/query: Add a helper for writing a query pool result

Reviewed-By: Lionel Landwerlin --- src/intel/vulkan/genX_query.c | 33 + 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c index 2d8f352..b8d4c55 100644 ---

[Mesa-dev] [PATCH v2 05/16] anv/query: Let 32-bit values wrap

From the Vulkan 1.0.39 Specification: "If VK_QUERY_RESULT_64_BIT is not set and the result overflows a 32-bit value, the value may either wrap or saturate." So we can either clamp or wrap. Wrapping is both easier and what the user gets if they use vkCmdCopyQueryPoolResults and we should

[Mesa-dev] [PATCH v2 07/16] anv/query: Use a variable-length slot size

Not all queries are the same. Even the two queries we support today require a different amount of data per slot. Once we introduce pipeline statistics queries, the size will vary wildly. Reviewed-By: Lionel Landwerlin --- src/intel/vulkan/anv_private.h | 9

[Mesa-dev] [PATCH v2 06/16] anv/query: Move the available bits to the front

We're about to make slots variable-length and always having the available bits at the front makes certain operations substantially easier once we do that. Reviewed-By: Lionel Landwerlin --- src/intel/vulkan/anv_private.h | 2 +- src/intel/vulkan/genX_query.c |

[Mesa-dev] [PATCH v2 03/16] anv/GetQueryPoolResults: Actually implement the spec

The Vulkan spec is fairly clear about when we should and should not write query pool results. We're also supposed to return VK_NOT_READY if VK_QUERY_RESULT_PARTIAL_BIT is not set and we come across any queries which are not yet finished. This fixes rendering corruptions on The Talos Principle

[Mesa-dev] [PATCH v2 04/16] genxml: Make MI_STORE_DATA_IMM have a single 64-bit data field

This is way more convenient than having two separate dword fields. Reviewed-By: Lionel Landwerlin --- src/intel/genxml/gen6.xml | 3 +-- src/intel/genxml/gen7.xml | 3 +-- src/intel/genxml/gen75.xml| 3 +-- src/intel/genxml/gen8.xml | 3 +--

[Mesa-dev] [PATCH v2 00/16] Queries!

This v2 of my earlier queries series fixes the bugs found by reviewers and the CTS. It now passes 100% of the CTS tests. New "features" include: - Clip statistics are now enabled - VF statistics are disabled for blits and gpu memcpy operations (other pipeline statistics were already

[Mesa-dev] [PATCH v2 02/16] anv/query: Invalidate the correct range

Reviewed-By: Lionel Landwerlin Cc: "17.0 13.0" --- src/intel/vulkan/genX_query.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c index

[Mesa-dev] [PATCH v2 01/16] anv/query: Fix the location of timestamp availability

Reviewed-By: Lionel Landwerlin Cc: "17.0 13.0" --- src/intel/vulkan/genX_query.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c index

Re: [Mesa-dev] [PATCH 02/23] nir: Fix misspellings.

Reviewed-by: Dylan Baker Quoting Matt Turner (2017-03-16 14:17:59) > --- > src/compiler/nir/nir.h | 2 +- > src/compiler/nir/nir_from_ssa.c | 6 +++--- > src/compiler/nir/nir_lower_returns.c | 2 +- >

Re: [Mesa-dev] [PATCH 03/23] nir: Fix syntax.

Reviewed-by: Dylan Baker Quoting Matt Turner (2017-03-16 14:18:00) > et is not an abbreviation. > --- > src/compiler/nir/nir_from_ssa.c | 10 +- > src/compiler/nir/nir_lower_vars_to_ssa.c | 2 +- > 2 files changed, 6 insertions(+), 6 deletions(-) > > diff

Re: [Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

On Thu, Mar 16, 2017 at 5:25 PM, Dylan Baker wrote: > Why bother, and why would we want this? >│~ > > First it's written in python, which means the potential developer base > is massive. And it provides a

[Mesa-dev] [RFC libdrm 1/2] Port build system to meson

This is a bit of a tech demo, a bit of a serious port to meson. This provides almost all of the build system, except for the ability to install the tests, it doesn't add -lrt for the clock (it's been in core glibc for some time), has basically no comments, and hasn't been tested on any platform

[Mesa-dev] [RFC libdrm 2/2] remove autotools build

This is mostly to demonstrate all of the code that would be deleted by removing the autotools build. This is *not* ready to land, since it deletes some files used by the android build (Makefile.sources). --- .editorconfig| 4 +- .gitignore | 82 +-

[Mesa-dev] [RFC libdrm 0/2] Replace the build system with meson

Why bother, and why would we want this? ???~ First it's written in python, which means the potential developer base is massive. And it provides a recursive view for humans, but a non-recursive view for the system. This is the best of

[Mesa-dev] [PATCH 08/23] nir: Return progress from nir_lower_var_copies().

--- src/compiler/nir/nir.h | 2 +- src/compiler/nir/nir_lower_var_copies.c | 18 +++--- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index a67879b..1c792f1 100644 --- a/src/compiler/nir/nir.h +++

[Mesa-dev] [PATCH 22/23] i965/fs: Return progress from demote_sample_qualifiers().

--- src/intel/compiler/brw_fs.cpp | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 099b09b..9dc21ac 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -6359,9 +6359,11 @@

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