Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/freedreno/a5xx/a5xx.xml.h | 3 ++-
src/gallium/drivers/freedreno/a5xx/fd5_emit.c | 32 ++-
2 files changed, 23 insertions(+), 12 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h
b/src/gallium/driv
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 71e84ce..4b2995f 100644
--- a/src/gallium/drivers/radeonsi/si_shader
From: Marek Olšák
For inputs and outputs, indirect indexing is lowered by the GLSL compiler.
For temporaries, use alloca and disable the "promote-alloca" pass.
In the future, we could switch all codepaths to alloca permanently and
just rely on the "promote-alloca" pass.
---
src/gallium/drivers/
From: Marek Olšák
This is much simpler.
---
src/gallium/drivers/radeonsi/si_shader.c | 100 ---
1 file changed, 39 insertions(+), 61 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 349e57b..ad1fb7b
From: Marek Olšák
---
src/amd/common/ac_llvm_util.c | 18 +-
src/amd/common/ac_llvm_util.h | 1 +
src/gallium/drivers/radeonsi/si_pipe.c | 2 +-
src/gallium/drivers/radeonsi/si_shader_internal.h | 2 --
.../drivers/radeonsi/si_sha
From: Marek Olšák
It's for initializing the native (x86) target.
---
src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index d5e988e..3f
From: Marek Olšák
This should fix exports of suballocated buffers.
---
src/gallium/drivers/radeon/r600_buffer_common.c | 3 ++-
src/gallium/drivers/radeon/r600_texture.c | 26 +
2 files changed, 28 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/rade
From: Marek Olšák
For clarity. It's only used by color interpolation.
---
src/gallium/drivers/radeonsi/si_shader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index ad1fb7b..157cb51 10064
From: Marek Olšák
Both loops now look simple.
---
src/gallium/drivers/radeonsi/si_shader.c | 162 +++
1 file changed, 78 insertions(+), 84 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 157cb51..71
From: Marek Olšák
there is only one user.
---
src/gallium/auxiliary/gallivm/lp_bld_misc.cpp | 23 ---
src/gallium/auxiliary/gallivm/lp_bld_misc.h | 3 ---
2 files changed, 8 insertions(+), 18 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
b/src/g
From: Marek Olšák
---
src/gallium/drivers/radeon/r600_texture.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index 2deb56a..f5f7d10 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/galli
From: Marek Olšák
Only the compatibility profile can set it.
It was done incorrectly when we split _NEW_TEXTURE.
---
src/mesa/main/texenv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/texenv.c b/src/mesa/main/texenv.c
index ee5171c..2fcaf7c 100644
--- a/src/
From: Marek Olšák
It can't parse "llu".
---
src/gallium/drivers/r600/r600_state_common.c| 4 +--
src/gallium/drivers/radeon/r600_pipe_common.h | 44 -
src/gallium/drivers/radeonsi/si_debug.c | 4 +--
src/gallium/drivers/radeonsi/si_shader.c| 2 +-
Fixes a bunch of gl_BackColor interpolation tests that had explicit
interpolation specified on the fragment shader gl_Color.
Signed-off-by: Ilia Mirkin
---
src/compiler/nir/nir_lower_two_sided_color.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/ni
On 2017-07-01 18:46, Marek Olšák wrote:
Instead of passing the function pointer through the queue, passing
just a call ID (uint16_t) is preferable.
If the switch statement is an issue, doing a function pointer lookup
from a static array should be OK.
OK, then let's drop this patch. gcc turns
Reviewed-by: Brian Paul
On 07/07/2017 04:15 PM, srol...@vmware.com wrote:
From: Roland Scheidegger
It could only handle indices 0/1, otherwise what happened was bad (accessing
array out of bounds, no crash but kind of random). This is enough for the gl
state tracker (primary/secondary color
Ian, it looks like we could want this patch (and the others from the
series when they land) in -stable (?)
On Tue, 2017-06-27 at 10:09 -0700, Ian Romanick wrote:
> From: Ian Romanick
>
> On NV20 (and probably also on earlier NV GPUs that lack
> GL_ARB_texture_border_clamp) fixes the following pi
On Fri, Jul 7, 2017 at 9:37 PM, Dave Airlie wrote:
> On 8 July 2017 at 04:07, Christian König wrote:
>> Am 07.07.2017 um 18:51 schrieb Marek Olšák:
>>>
>>> On Fri, Jul 7, 2017 at 11:18 AM, Christian König
>>> wrote:
What tilling format have the destination textures?
Sounds li
From: Roland Scheidegger
It could only handle indices 0/1, otherwise what happened was bad (accessing
array out of bounds, no crash but kind of random). This is enough for the gl
state tracker (primary/secondary color) but not enough for some other state
trackers (d3d9 has no limits on the number
From: Dave Airlie
This patch uses addrlib to workout the tile swizzles according
to the surface index. It seems to produce the same values as
amdgpu-pro for the deferred test.
This gets the deferred demo from 730->950fps on my rx480.
(dcc cmask elim predication patches get it further)
open ques
+Bruce
Andres,
VTK/Kitware has already modified their code to enable dual depth peeling for
Mesa version >= 17.2. From that perspective, it doesn’t matter if the change
goes into the 17.1.x releases or 17.2.
Having said that, we haven’t seen any issues with that check-in, so if it makes
it t
On Thu, Jul 06, 2017 at 01:11:27PM -0700, Nanley Chery wrote:
> This reverts commit 8aaa13467dc289d35dc7900ab9fab9a7689c4178, which was
> based on an incorrect assumption. Unlike the restriction placed on image
> views in the Vulkan API, OpenGL allows you to render to texture views
> whose formats
swr used to build and link the rasterizer to the driver, and to support
multiple architectures we needed to have multiple versions of the
driver/rasterizer combination, which needed to link in much of mesa.
Changing to having one instance of the driver and just building
architecture specific versi
Use the SWR rasterizer API through the table returned from
SwrGetInterface rather than referencing the functions directly.
This will allow us to move to a model of having the driver dynamically
load the appropriate swr architecture library.
---
src/gallium/drivers/swr/swr_clear.cpp | 6 ++---
s
These two patches allow us to change how we build and link the swr
driver; details are in the second patch commit message.
Change in disk space:
libGL.so6464 Kb -> 7000 Kb
libswrAVX.so 10068 Kb -> 5432 Kb
libswrAVX2.so 9828 Kb -> 5200 Kb
Total 26360 Kb -> 17632 Kb
Tim Ro
George, would we want this patch in -stable or we shouldn't bother ?
On Tue, 2017-06-20 at 11:42 -0500, George Kyriazis wrote:
> Consider the following RT attachment order:
> 1. Attach surfaces attachments 0 & 1, and render with them
> 2. Detach 0 & 1
> 3. Re-attach 0 & 1 to different surfaces
> 4
Quoting Jason Ekstrand (2017-07-07 21:37:29)
> The reason we were doing this was to ensure that the kernel did the
> appropriate cross-ring synchronization and flushing. However, the
> kernel only looks at EXEC_OBJECT_WRITE to determine whether or not to
> insert a fence. It only cares about the
The reason we were doing this was to ensure that the kernel did the
appropriate cross-ring synchronization and flushing. However, the
kernel only looks at EXEC_OBJECT_WRITE to determine whether or not to
insert a fence. It only cares about the domain for determining whether
or not it needs to clf
> On Jul 6, 2017, at 19:02, Connor Abbott wrote:
>
> On Thu, Jul 6, 2017 at 6:36 PM, Matt Arsenault wrote:
>>
>> On Jul 6, 2017, at 18:31, Connor Abbott wrote:
>>
>> After looking into it some more, I think LLVM won't promote allocas to
>> registers at all when there are non-constant indices
From: Dave Airlie
(this patch doesn't seem to work fully, hopefully AMD can tell us
more info on the rules, and how to calculate the magic).
It appears that to get full access to memory bandwidth with MRT
rendering the pro vulkan driver seems to offset each image by 0x3800.
I'm not sure how that
Quoting Ben Widawsky (2017-07-07 19:42:25)
> On 17-07-07 11:34:48, Chris Wilson wrote:
> >Quoting Ben Widawsky (2017-07-07 00:27:01)
> >> drivers/gpu/drm/i915/i915_drv.c | 3 +++
> >> drivers/gpu/drm/i915/i915_drv.h | 2 ++
> >> drivers/gpu/drm/i915/i915_pci.c | 13 +
> >> include/ua
On 8 July 2017 at 04:53, Bas Nieuwenhuizen wrote:
> Figured out the clear value when we have a combined depth stencil
> surface.
That corresponds to what I've read,
When you have depth, it's two 14-bit values and 8-bits,
When you have depth/stencil it's 14-bit value + 6-bit delta + 8-bit stencil
On 8 July 2017 at 04:07, Christian König wrote:
> Am 07.07.2017 um 18:51 schrieb Marek Olšák:
>>
>> On Fri, Jul 7, 2017 at 11:18 AM, Christian König
>> wrote:
>>>
>>> What tilling format have the destination textures?
>>>
>>> Sounds like the offset is just added so that we distribute memory
>>> a
On Fri, Jul 7, 2017 at 2:47 PM, Emil Velikov wrote:
> From: Emil Velikov
>
> The extension should be present (if applicable) in the list returned by
> getExtensions(). AFAICT no loader has ever looked for it in
> __driDriverExtensions/__driDriverGetExtensions.
>
> Signed-off-by: Emil Velikov
No
https://bugs.freedesktop.org/show_bug.cgi?id=101464
Brian Paul changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Figured out the clear value when we have a combined depth stencil
surface.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_meta_clear.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.
From: Emil Velikov
Analogous to previous commit.
Signed-off-by: Emil Velikov
---
src/mesa/drivers/dri/i915/intel_screen.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c
b/src/mesa/drivers/dri/i915/intel_screen.c
index 686cbf5ec12..882b139ff6a 10064
From: Emil Velikov
The extension should be in the list as returned by getExtensions().
Seems to have gone unnoticed since close to nobody wants to change the
vblank mode for the software driver.
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Emil Velikov
---
src/mesa/drivers/dri/swrast/s
From: Emil Velikov
The extension should be present (if applicable) in the list returned by
getExtensions(). AFAICT no loader has ever looked for it in
__driDriverExtensions/__driDriverGetExtensions.
Signed-off-by: Emil Velikov
---
src/gallium/state_trackers/dri/dri2.c | 1 -
1 file changed, 1
From: Emil Velikov
The option is only queried from the loader, which has access to the
dri "common" one in src/mesa/drivers/dri/common/.
One could grant the loader access to brw_config_options but even
then, having the same option in both places is not a good idea.
Signed-off-by: Emil Velikov
From: Emil Velikov
Analogous to previous commits.
Signed-off-by: Emil Velikov
---
src/mesa/drivers/dri/radeon/radeon_screen.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c
b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 79e388988a0..b097a
From: Emil Velikov
If device supports robustness (AKA PIPE_CAP_DEVICE_RESET_STATUS_QUERY)
then we're using dri_robust_screen_extensions.
Hence for such cases the DRI loader was not able to query the driver
options.
This went unnoticed since only r600/radeonsi drivers have the feature.
At the sam
On 17-07-07 09:23:26, Jason Ekstrand wrote:
On Fri, Jul 7, 2017 at 3:34 AM, Chris Wilson
wrote:
Quoting Ben Widawsky (2017-07-07 00:27:01)
> drivers/gpu/drm/i915/i915_drv.c | 3 +++
> drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 13 +
> include/uapi
On 17-07-07 11:34:48, Chris Wilson wrote:
Quoting Ben Widawsky (2017-07-07 00:27:01)
drivers/gpu/drm/i915/i915_drv.c | 3 +++
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 13 +
include/uapi/drm/i915_drm.h | 8
4 files changed, 22 insertio
>From: Brian Paul
>Sent: Friday, July 7, 2017 7:10 AM
>To: mesa-dev@lists.freedesktop.org
>Cc: Charmaine Lee; Neha Bhende; Olivier Lauffenburger
>Subject: [PATCH 2/2] mesa: finish implementing glPrimitiveRestartNV() for
>display lists
>If we try to build a display list with just a glPrimitiveRe
This can be used to guard support for EXT_memory_object and related
extensions.
v2: update gallium docs
Signed-off-by: Andres Rodriguez
---
src/gallium/docs/source/screen.rst | 1 +
src/gallium/drivers/etnaviv/etnaviv_screen.c | 1 +
src/gallium/drivers/freedreno/freedreno_scr
Thanks Ilia, I'll get that fixed up.
Regards,
Andres
On 2017-07-07 09:53 AM, Ilia Mirkin wrote:
This is missing the docs addition for what this cap does
(gallium/docs/source/screen.rst).
On Fri, Jul 7, 2017 at 12:24 AM, Andres Rodriguez wrote:
This can be used to guard support for EXT_memory
Hi all,
As you may have noticed, for a little while now we've had the release
plan on the mesa3d.org website [1].
Here is the current tentative schedule.
Jul 21 2017 - Feature freeze/Release candidate 1
Jul 28 2017 - Release candidate 2
Aug 04 2017 - Release candidate 3
Aug 11 2017 - Release
Am 07.07.2017 um 18:51 schrieb Marek Olšák:
On Fri, Jul 7, 2017 at 11:18 AM, Christian König
wrote:
What tilling format have the destination textures?
Sounds like the offset is just added so that we distribute memory accesses
more equally over memory channels.
You can't set an offset that is
Reviewed-by: Charmaine Lee
From: Brian Paul
Sent: Wednesday, July 5, 2017 7:56 PM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende
Subject: [PATCH] svga: adjust line subpixel position for HWv8
This fixes two regressions on HWv8:
Piglit
Series looks good.
Reviewed-by: Charmaine Lee
From: Brian Paul
Sent: Friday, July 7, 2017 7:11 AM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende
Subject: [PATCH 3/3] vbo: rename target->index in loopback code
Because it's a vertex att
Reviewed-by: Charmaine Lee
From: Brian Paul
Sent: Friday, July 7, 2017 7:11 AM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende
Subject: [PATCH] st/mesa: remove unused st_framebuffer::Private field
---
src/mesa/state_tracker/st_context.
Reviewed-by: Marek Olšák
Marek
On Thu, Jul 6, 2017 at 10:28 PM, Aleksander Morgado
wrote:
> The 'opencl_func_mutex' is destroyed in dri_destroy_screen_helper()
> unconditionally, so make sure it is always initialized to avoid any
> undefined behaviour.
>
> Signed-off-by: Aleksander Morgado
> -
Reviewed-by: Marek Olšák
Marek
On Fri, Jul 7, 2017 at 4:11 PM, Brian Paul wrote:
> ---
> src/mesa/state_tracker/st_context.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/src/mesa/state_tracker/st_context.h
> b/src/mesa/state_tracker/st_context.h
> index 5c7c58d..af9149e 100644
> --
On Fri, Jul 7, 2017 at 11:18 AM, Christian König
wrote:
> What tilling format have the destination textures?
>
> Sounds like the offset is just added so that we distribute memory accesses
> more equally over memory channels.
You can't set an offset that is not aligned. The hardware ignores the
lo
On Thu, Jul 6, 2017 at 4:27 PM, Ben Widawsky wrote:
> We don't yet have optimal MOCS settings, but we have enough to know how
> to at least determine when we might have non-optimal settings within our
> driver.
>
> Signed-off-by: Ben Widawsky
> ---
> src/intel/vulkan/anv_device.c |
On Fri, Jul 7, 2017 at 3:34 AM, Chris Wilson
wrote:
> Quoting Ben Widawsky (2017-07-07 00:27:01)
> > drivers/gpu/drm/i915/i915_drv.c | 3 +++
> > drivers/gpu/drm/i915/i915_drv.h | 2 ++
> drivers/gpu/drm/i915/i915_pci.c | 13 +
> > include/uapi/drm/i915_drm.h | 8
> >
When we have an interface block like:
layout (xfb_buffer = 0, xfb_offset = 0) out Block {
vec4 var1;
layout (xfb_stride = 48) vec4 var2;
vec4 var3;
};
According to ARB_enhanced_layouts spec:
"The *xfb_stride* qualifier specifies ho
Hi Matias,
You may want to review
https://www.mesa3d.org/submittingpatches.html
Particularly the "mailing patches" bit of it.
Cheers,
-ilia
On Fri, Jul 7, 2017 at 11:41 AM, Matias N. Goldberg
wrote:
> Hi!
>
> I just subscribed to this dev list.
>
>
> I wrote this patch (copy at the end of
Hi!I just subscribed to this dev list.
I wrote this patch (copy at the end of this
email)https://bugs.freedesktop.org/attachment.cgi?id=132462&action=edit
in order to fix bug Bug 101596 - Blender renders black UI elements
(https://bugs.freedesktop.org/show_bug.cgi?id=101596)Note that this bug may
>From KHR_fence_sync:
When the condition of the sync object is satisfied by the fence
command, the sync is signaled by the associated client API context,
causing any eglClientWaitSyncKHR commands (see below) blocking on
to unblock. The only condition currently supported is
EGL_SYNC_PRIO
Signed-off-by: Lionel Landwerlin
Reviewed-by: Ben Widawsky
---
src/mesa/drivers/dri/i965/brw_performance_query.c | 49 ---
1 file changed, 17 insertions(+), 32 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c
b/src/mesa/drivers/dri/i965/brw_perfor
We could have used a single integer to store that value, but
Cannonlake has different number of subslices per slice depending on
the GT.
v2: Add CFL subslice numbers (Lionel)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Ben Widawsky
---
src/intel/common/gen_device_info.c | 57
From: Ben Widawsky
Reduces IOCTL calls by 1, and provides a centralized place to override
such configurations if we have a need to do so.
Signed-off-by: Ben Widawsky
Reviewed-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_performance_query.c | 9 +
1 file changed, 1 insertion
Hi,
This is an already reviewed series (through IRC), updating what I've
sent earlier this week [1], just to have people comment publicly. If
no comments in a couple of (working) days, I'll push it.
Cheers,
[1] : https://patchwork.freedesktop.org/series/26894/
Ben Widawsky (1):
i965: Use alre
Hi,
On 28 June 2017 at 16:35, Lucas Stach wrote:
> Am Freitag, den 16.06.2017, 18:14 +0100 schrieb Daniel Stone:
>> if (dri2_dpy->capabilities & WL_DRM_CAPABILITY_PRIME) {
>> + struct wl_drm *wl_drm =
>> + dri2_surf ? dri2_surf->wl_drm_wrapper : dri2_dpy->wl_drm;
>
> This and...
Hi!I just subscribed to this dev list.
I wrote this patch (copy at the end of this
email)https://bugs.freedesktop.org/attachment.cgi?id=132462&action=edit
in order to fix bug Bug 101596 - Blender renders black UI elements
(https://bugs.freedesktop.org/show_bug.cgi?id=101596)Note that this bug may
On Wed, Jul 5, 2017 at 5:14 PM, Chad Versace wrote:
> On Fri 30 Jun 2017, Rob Herring wrote:
>> Add support for 32-bit RGBX/RGBA formats which are required for Android.
>>
>> The original patch (commit ccdcf91104a5) was reverted (commit
>> c0c6ca40a25e) in mesa as it broke GLX resulting in swapped
On Thu, Jul 6, 2017 at 12:22 AM, Chad Versace wrote:
> On Sat 01 Jul 2017, Marek Olšák wrote:
>> Hi Rob,
>>
>> It would be better to have a flag passed from libEGL to st/dri saying
>> that it's OK to expose those formats. I wouldn't like to have GLX
>> visuals that are unusable in practice because
On Fri, 2017-07-07 at 09:14 +0200, Samuel Pitoiset wrote:
>
> On 07/06/2017 08:06 PM, Andres Gomez wrote:
> > It looks like we could want patches 1 and 3-8 from this series into
> > -stable (?)
>
> These are not critical fixes, your call.
OK. I will leave them out by now, then.
Thanks for the f
On Thu, 2017-07-06 at 23:24 +0200, Marek Olšák wrote:
> On Thu, Jul 6, 2017 at 8:24 PM, Andres Gomez wrote:
> > Marek, would we want this series in -stable or we shouldn't bother ?
>
> Don't bother. Patch 1 isn't that important. Other patches are for
> features not enabled in 17.1.
OK. Thanks fo
On Thu, 2017-07-06 at 18:21 +0100, Emil Velikov wrote:
> On 3 July 2017 at 21:14, Andres Gomez wrote:
> > Actually, forgot to add -stable into CC.
> >
> > Forwarded Message
> > From: Andres Gomez
> > To: Anuj Phogat , mesa-dev@lists.freedesktop.org
> > Subject: Re: [Mesa-dev] [
On Thu, 2017-07-06 at 18:02 +0100, Emil Velikov wrote:
> On 6 July 2017 at 15:35, Andres Gomez wrote:
> > It looks like we could want this into -stable (?)
> >
>
> _mesa_update_draw_buffer_bounds is a no-op if the buffer pointer is NULL.
> There's no issue to fix, but making Coverity happy is no
---
src/mesa/state_tracker/st_context.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_context.h
b/src/mesa/state_tracker/st_context.h
index 5c7c58d..af9149e 100644
--- a/src/mesa/state_tracker/st_context.h
+++ b/src/mesa/state_tracker/st_context.h
@@ -295,7 +295,6 @
Trivial.
---
src/mesa/vbo/vbo_save_loopback.c | 116 +--
1 file changed, 64 insertions(+), 52 deletions(-)
diff --git a/src/mesa/vbo/vbo_save_loopback.c b/src/mesa/vbo/vbo_save_loopback.c
index 7410f18..773af93 100644
--- a/src/mesa/vbo/vbo_save_loopback.c
+++
This function always returned GL_TRUE. Just make it a void function.
Remove unreachable code following the call to vbo_save_NotifyBegin()
in save_Begin() in dlist.c
There were some stale comments that no longer applied since an earlier
code refactoring.
No Piglit regressions.
---
src/mesa/main/
If we try to build a display list with just a glPrimitiveRestartNV()
call, we'd crash because of a null GLvertexformat::PrimitiveRestartNV
pointer. This change fixes that case.
The previous patch fixed the case of calling glPrimitiveRestartNV()
inside a glBegin/End pair.
---
src/mesa/main/dlist.
From: Olivier Lauffenburger
glPrimitiveRestartNV crashes when it is called during the compilation
of a display list.
There are two reasons:
- ctx->Driver.CurrentSavePrimitive is not set to the current primitive
- save_PrimitiveRestartNV() calls _save_Begin() which only sets an
OpenGL error, in
Because it's a vertex attribute index.
---
src/mesa/vbo/vbo_save_loopback.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/src/mesa/vbo/vbo_save_loopback.c b/src/mesa/vbo/vbo_save_loopback.c
index 773af93..1dae91b 100644
--- a/src/mesa/vbo/vbo_save_l
This is missing the docs addition for what this cap does
(gallium/docs/source/screen.rst).
On Fri, Jul 7, 2017 at 12:24 AM, Andres Rodriguez wrote:
> This can be used to guard support for EXT_memory_object and related
> extensions.
>
> Signed-off-by: Andres Rodriguez
> ---
> src/gallium/drivers
On Fri, Jun 23, 2017 at 06:50:49PM +0300, alexandros.frant...@collabora.com
wrote:
> From: Alexandros Frantzis
>
> Improve the surface format support in the Wayland Vulkan WSI, by
> automating the matching between wl_drm and Vulkan formats. The same
> mechanism can be used to improve format supp
Currently, we use set_domain() to cause a stall on rendering. But the
set-domain ioctl has the side-effect of changing the kernel's cache
domain underneath the struct_mutex, which may perturb state if there was
no rendering to wait upon and in general is much heavier than the
lockless wait-ioctl. H
Quoting Kenneth Graunke (2017-07-07 07:08:16)
> On Thursday, July 6, 2017 10:51:49 PM PDT Kenneth Graunke wrote:
> > On Wednesday, July 5, 2017 2:24:55 PM PDT Chris Wilson wrote:
> > > Quoting Kenneth Graunke (2017-07-05 21:56:54)
> > > > ---
> > > > src/mesa/drivers/dri/i965/brw_bufmgr.c | 15 +++
On 7 July 2017 at 11:34, Chris Wilson wrote:
> Quoting Ben Widawsky (2017-07-07 00:27:01)
>> drivers/gpu/drm/i915/i915_drv.c | 3 +++
>> drivers/gpu/drm/i915/i915_drv.h | 2 ++
>> drivers/gpu/drm/i915/i915_pci.c | 13 +
>> include/uapi/drm/i915_drm.h | 8
>> 4 files ch
https://bugs.freedesktop.org/show_bug.cgi?id=101657
Eric Engestrom changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Quoting Daniel Vetter (2017-07-07 11:04:00)
> On Mon, Jun 19, 2017 at 11:06:48AM +0100, Chris Wilson wrote:
> > - if (target != batch->bo)
> > - add_exec_bo(batch, target);
> > + if (target != batch->bo) {
> > + unsigned int index = add_exec_bo(batch, target);
> > + struct drm_i9
https://bugs.freedesktop.org/show_bug.cgi?id=101334
--- Comment #21 from John ---
I believe that's a same generation card, so it would make sense to behave
similarly.
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Quoting Daniel Vetter (2017-07-07 11:31:46)
> On Mon, Jun 19, 2017 at 11:06:50AM +0100, Chris Wilson wrote:
> > Passing the index of the target buffer via the reloc.target_handle is
> > marginally more efficient for the kernel (it can avoid some allocations,
> > and can use a direct lookup rather t
I remember that DS had issues with CMAA (Conservative Morphological
Anti-Aliasing) on Baytrail or Braswell ChromeOS devices.
Would be worth a to see whether this series fixes that.
Thanks!
Acked-by: Lionel Landwerlin
On 05/07/17 21:56, Kenneth Graunke wrote:
Thanks to Chris Wilson for pointi
On Fri, Jul 07, 2017 at 11:23:36AM +0100, Chris Wilson wrote:
> Borrow a trick from anv, and use the last known index for the bo to skip
> a search of the batch->exec_bo when adding a new relocation. In defence
> against the bo being used in multiple batches simultaneously, we check
> that this slo
Quoting Ben Widawsky (2017-07-07 00:27:01)
> drivers/gpu/drm/i915/i915_drv.c | 3 +++
> drivers/gpu/drm/i915/i915_drv.h | 2 ++
> drivers/gpu/drm/i915/i915_pci.c | 13 +
> include/uapi/drm/i915_drm.h | 8
> 4 files changed, 22 insertions(+), 4 deletions(-)
>
> diff --g
On Mon, Jun 19, 2017 at 11:06:50AM +0100, Chris Wilson wrote:
> Passing the index of the target buffer via the reloc.target_handle is
> marginally more efficient for the kernel (it can avoid some allocations,
> and can use a direct lookup rather than a hash or search). It is also
> useful for ourse
On Mon, Jun 19, 2017 at 11:06:50AM +0100, Chris Wilson wrote:
> Passing the index of the target buffer via the reloc.target_handle is
> marginally more efficient for the kernel (it can avoid some allocations,
> and can use a direct lookup rather than a hash or search). It is also
> useful for ourse
On 5 July 2017 at 21:56, Kenneth Graunke wrote:
> I want to use these in the OpenGL driver as well.
>
> Cc: Jason Ekstrand
> ---
> src/intel/common/gen_clflush.h | 56
> ++
> src/intel/vulkan/anv_batch_chain.c | 2 +-
> src/intel/vulkan/anv_device.c
Borrow a trick from anv, and use the last known index for the bo to skip
a search of the batch->exec_bo when adding a new relocation. In defence
against the bo being used in multiple batches simultaneously, we check
that this slot exists and points back to us.
v2: Also update brw_batch_references(
On Mon, Jun 19, 2017 at 11:06:49AM +0100, Chris Wilson wrote:
> To avoid a forward declaration in the next patch, move the definition of
> add_exec_bo() earlier.
>
> Signed-off-by: Chris Wilson
> Cc: Kenneth Graunke
> Cc: Matt Turner
> Cc: Jason Ekstrand
Needs to be rebased when patch 2 is up
2017-07-06 23:18 GMT+02:00 Aleksander Morgado :
> Despite being a member of the etna_screen struct, 'refcnt' is used by
> the winsys-specific logic to track the reference count of the object
> managed in a hash table. When the count reaches zero, the pipe screen
> is removed from the table and dest
Hi Wladimir
2017-07-07 11:12 GMT+02:00 Wladimir :
> On Thu, Jul 6, 2017 at 4:01 PM, Wladimir wrote:
>
>> That the SRGB formats fail is expected (they're simply using RGB, this
>> is mentioned in the patch message), the discrepancy between
>> gc2000/gc3000 on RGB(A) is interesting, though, I'll l
On 7 July 2017 at 09:09, Lucas Stach wrote:
> Am Donnerstag, den 06.07.2017, 23:18 +0200 schrieb Aleksander Morgado:
>> Despite being a member of the etna_screen struct, 'refcnt' is used by
>> the winsys-specific logic to track the reference count of the object
>> managed in a hash table. When the
Hi,
On 28 June 2017 at 19:09, Jason Ekstrand wrote:
> On Wed, Jun 28, 2017 at 10:59 AM, Daniel Stone wrote:
>> i965 tries pretty hard to allocate sRGB images in the pre-DRIImage,
>> DRI2 (as in the X11 protocol named 'DRI2') codepath, but this isn't
>> used by Wayland, GBM, or DRI3.
>
> Except t
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