On Tue, Apr 21, 2015 at 02:57:11AM +0200, Tomas Vanek wrote:
Paul and others:
Do you think that
DEMCR can be reset internally by the MCU during SWD reconnection sequence?
Seems
weird...
Most probably change 2601 makes a bigger problem from a small one here.
I do not see how it might be the
Hey,
On Mon, Apr 20, 2015 at 02:26:28PM +0200, Andreas Färber wrote:
Am 20.04.2015 um 13:49 schrieb Andreas Färber:
xmc4500-application-kit-general.cfg with
http://openocd.zylin.com/#/c/2721/ :
These two logs clearly tell me srst_nogate is not appropriate for this
target. If you want to
On Mon, Apr 20, 2015 at 02:24:41PM +0200, Andreas Färber wrote:
Am 20.04.2015 um 13:49 schrieb Andreas Färber:
xmc4500-application-kit-sdram.cfg with http://openocd.zylin.com/#/c/2721/ :
[...]
reset init
SWD IDCODE 0x2ba01477
timed out while waiting for target halted
TARGET:
This is an automated email from Gerrit.
Paul Fertser (fercer...@gmail.com) just uploaded a new patch set to Gerrit,
which you can find at http://openocd.zylin.com/2726
-- gerrit
commit 518dfbff4440f7cb1b5d430c67756076244693fb
Author: Paul Fertser fercer...@gmail.com
Date: Tue Apr 21 17:33:57
