On Mon, Apr 20, 2015 at 02:24:41PM +0200, Andreas Färber wrote: > Am 20.04.2015 um 13:49 schrieb Andreas Färber: > > xmc4500-application-kit-sdram.cfg with http://openocd.zylin.com/#/c/2721/ : > > > [...] > >> reset init > > SWD IDCODE 0x2ba01477 > > timed out while waiting for target halted > > TARGET: xmc4500.cpu - Not halted > > in procedure 'reset' > > in procedure 'ocd_bouncer' > > > > > > Halt timed out, wake up GDB. > >> > > ../../bin/bin/openocd -f openocd.cfg -c init -c "reset init" -d3 2> > sdram-reset-init.log
This log looks like hardware SRST line on this target _fully_ resets it (as if it was power-cycled) so the special reset vector catch bit set before asserting SRST is lost and the target gets to run after deasserting. This looks surprisingly similar to what Dominic reports with LPC1857. Do you think you might find some official vendor recommendation on how to implement "halt on reset" operation? Can you probably call their support line of find that in the documentation please? -- Be free, use free (http://www.gnu.org/philosophy/free-sw.html) software! mailto:fercer...@gmail.com ------------------------------------------------------------------------------ BPM Camp - Free Virtual Workshop May 6th at 10am PDT/1PM EDT Develop your own process in accordance with the BPMN 2 standard Learn Process modeling best practices with Bonita BPM through live exercises http://www.bonitasoft.com/be-part-of-it/events/bpm-camp-virtual- event?utm_ source=Sourceforge_BPM_Camp_5_6_15&utm_medium=email&utm_campaign=VA_SF _______________________________________________ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
