On Wednesday 18 November 2009, Dean Glazeski wrote:
> The thing is that the first time I tried to do this:
>
> nand erase 0 0 2048
>
> I got presented with command usage and had no idea why it was failing. I
> looked into it a bit more and found out what the block size was. For my
> NAND chip i
Hi,
I've tried alot to bring up my board with the OOCD and Olimex JTAG, but it
doesn't work. Can somebody explane the problem and help me to solve it?
I installed the OOCD in it works with the Olimex Dev-Board STM32-P103. It also
works on my board with an medium density chip but on my new one i
On Wed, 2009-11-18 at 23:25 -0600, Dean Glazeski wrote:
> Hi all,
>
> Recent NAND file I/O changes are parsing the wrong argument for the
> size. Should be third argument, not second.
Pushed. Let me know if you find any other problems. Incidentally, does
the 'new verify' command work for you (
On Thu, Nov 19, 2009 at 1:03 PM, Øyvind Harboe wrote:
> Was this for the list?
Yeah it was, that Reply-to-all button seems to be hard to find sometimes.
>
> On Thu, Nov 19, 2009 at 12:34 AM, Andreas Fritiofson
> wrote:
>> On Wed, Nov 18, 2009 at 9:40 AM, Øyvind Harboe
>> wrote:
>>> On Wed, No
The examine() method has some conceptual breakage. Cope
with it by manually splitting out the run-once parts from
the after-each-reset parts ... this gets rid of memory
leaks and speeds up resets after the first one.
---
This passes in light testing, and it looks like the
after-each-reset logic is
On Wednesday 18 November 2009, Laurent Gauch wrote:
> I do not understand what is the advantage to work on 32bit buffers
> instead 8bit buffers for out_value and in_value.
For starters, in some contexts it's faster by a factor of more than
four ... one instruction moving N bits, not four (and the
On Wednesday 18 November 2009, Michael Bruck wrote:
> I would actually prefer an API that is tightly linked to an
> independent data structure that that builds up a jtag sequence in the
> target driver and then executes it. All the commands would then work
> on building up that structure and in the
Combine register names with other per-register data into a
single template structure. This saves space, and makes it
easier to change how registers get handled (by shrinking
the number of places that care about cache indices).
---
It happens that the ARM11 register code uses init templates
that lo
Just pre-allocate memory for the cached register value.
Shrinks heap overhead; increases locality-of-reference.
---
src/target/armv4_5.c |2 +-
src/target/armv4_5.h |1 +
2 files changed, 2 insertions(+), 1 deletion(-)
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -489,7 +489,7
On Thursday 19 November 2009, Christian Dumhart wrote:
> I've tried alot to bring up my board with the OOCD and Olimex JTAG,
> but it doesn't work. Can somebody explane the problem and help me to solve
> it?
My first reaction was that this looks like your JTAG clock
is too fast ... since a numbe
I think this is just me being stupid. I looked up the nand probe function
and it appears to have the correct detection mechanism in place. In fact, I
rebuilt after the daily pull from the repo and it seems to be working fine.
I must have just mistyped something somewhere along the line.
// Dean
Hiya,
I've found a few issues in OpenOCD and thought that I'd share before hacking a
solution together. The following revision is used:
commit 8f446fcf676e9cd13cf53d9946f0cae5d29a10ec
Date: Thu Nov 19 13:23:49 2009 -0800
When doing "flash write_image erase unlock image.bin 0x800 bin" on a
Hi all,
Add jtag/usb_common.[ch] to hold routines shared between the USB JTAG
interface drivers.
This series adds the first helper, jtag_usb_open that unifies the steps
required to probe the USB busses and devices, matching vid/pids, and
opening the selected device in the jtag_usb_open helper.
Rewrite armjtagwe_usb_open to use jtag_usb_open.
Signed-off-by: Zachary T Welch
---
src/jtag/arm-jtag-ew.c | 53 +++
1 files changed, 17 insertions(+), 36 deletions(-)
diff --git a/src/jtag/arm-jtag-ew.c b/src/jtag/arm-jtag-ew.c
index 18b353a..68fcb
Rewrite usbprob_jtag_open to use jtag_usb_open helper.
Signed-off-by: Zachary T Welch
---
src/jtag/usbprog.c | 43 +--
1 files changed, 13 insertions(+), 30 deletions(-)
diff --git a/src/jtag/usbprog.c b/src/jtag/usbprog.c
index 10dfe06..d6b45d1 100644
Rework rlink_init to use less indentation. Best viewed with diff -w.
Signed-off-by: Zachary T Welch
---
src/jtag/rlink/rlink.c | 109
1 files changed, 54 insertions(+), 55 deletions(-)
diff --git a/src/jtag/rlink/rlink.c b/src/jtag/rlink/rlink.
Rewrite vsllink_usb_open to use jtag_usb_open helper.
Eliminates spurious calls to exit().
Signed-off-by: Zachary T Welch
---
src/jtag/vsllink.c | 84 ++-
1 files changed, 30 insertions(+), 54 deletions(-)
diff --git a/src/jtag/vsllink.c b/src/
Rewrite logic to remove indentation in jlink_usb_open, in prep
for further surgery.
Signed-off-by: Zachary T Welch
---
src/jtag/jlink.c | 107 --
1 files changed, 55 insertions(+), 52 deletions(-)
diff --git a/src/jtag/jlink.c b/src/jtag/jlin
Rewrite jlink_usb_open to use jtag_usb_open helper.
Signed-off-by: Zachary T Welch
---
src/jtag/jlink.c | 76 ++---
1 files changed, 15 insertions(+), 61 deletions(-)
diff --git a/src/jtag/jlink.c b/src/jtag/jlink.c
index a69f09e..cf3f251 100644
Rewrite rlink_init routine to use jtag_usb_open helper. Eliminates
some spurious calls to exit().
Wraps a tremendously long line of comment to fit 80 columns too.
Signed-off-by: Zachary T Welch
---
src/jtag/rlink/rlink.c | 131 ++--
1 files changed,
Begins to consolidate code used by several USB JTAG interfaces.
This first patch provides the required build system changes and
a common jtag_usb_open routine, which will replace the guts for
probing the busses and devices for possible VID/PID matches.
The following patches convert each driver to u
nand verify is not working. I'm trying to trace it to the problem, but it
appears there is something wrong with the file struct that's reading the
file. Somehow the data read from the file doesn't match the actual data in
the file. The odd ball thing is that nand erase, followed by nand write,
f
On Wed, 2009-11-18 at 02:56 -0800, Zachary T Welch wrote:
> Hi all,
>
> This series improves on the patch sent previously to add bank names.
> It adds a 'name' field to the flash and nand bank structures.
>
> This name must be passed as the first argument to the 'flash bank' and
> 'nand device' c
After writing this email, I came across the bug. There are a few ways to
fix it and I'll leave it to you to decide. The dev.address needs to be
advanced with the file.address in the main verify loop. This might be
replaceable by just advancing dev and not file, or moving both, etc.
As another n
Thanks for the feedback. I will take a closer look at the code. I am
not entirely surprised by this bug in the new function (given the way
that I implemented it), but it's great to hear that I didn't cause any
other regressions with the existing commands.
--Z
On Thu, 2009-11-19 at 16:58 -0600,
On Thu, 2009-11-19 at 15:08 -0800, Zach Welch wrote:
> At the moment, I just want correctness. Thanks for doing the detective
> work, but you're also welcom.
Whoops... that one slipped away from me you're also welcome to put
together an initial patch for it. Similarly, you are welcome to s
Here's a patch to fix the increment. I'll mess around with error output
later. There are a lot of areas that I would like to visit to update error
output. So many errors don't present proper fault output. It makes it hard
to trace problems when regressions happen :) I'll spend some time with t
Thanks. I think David and I have both been improving the error handling
in places that we touch, but we need a more systematic approach to it.
I have been thinking about starting an automated test suite for 0.4.0,
as such might have prevented a few of the minor issues that we've seen.
Any contribu
i tried several versions of openocd, incl. latest from git. serveral
machines (x86 & amd64), as well as different usb cables ..
I am out of ideas and any hint ist appreciated:
sudo ./src/openocd -f /usr/local/share/openocd/scripts/board/openrd.cfg
-s /usr/local/share/openocd/scripts/ -c init -c o
This series seems to make command.c spew errors about "invalid command
argument". I traced it back to the parse##type macro or whatver that is
that is called from flash/common.c in the get_flash_name_index function that
is called from pretty much every nand * command. For my NAND devices, they
do
By '-c init' did you mean '-c openrd_init'?
// Dean Glazeski
On Thu, Nov 19, 2009 at 5:28 PM, :k wrote:
> i tried several versions of openocd, incl. latest from git. serveral
> machines (x86 & amd64), as well as different usb cables ..
>
> I am out of ideas and any hint ist appreciated:
>
> su
Another whoops. The changes to use '$_CHIPNAME.flash' were added after
I wrote that code, and I didn't consider the consequences thoroughly.
The attached patch should fix the issue. Let me know, and I'll push it.
--Z
On Thu, 2009-11-19 at 18:01 -0600, Dean Glazeski wrote:
> This series seems to
Why is there even a number appended?
Just let whoever defines the name define it however they want,
and insist only that it be unique.
That will get rid of lots of possible errors inthe code...
___
Openocd-development mailing list
Openocd-development@li
On Thu, 2009-11-19 at 19:47 -0700, David Brownell wrote:
> Why is there even a number appended?
>
> Just let whoever defines the name define it however they want,
> and insist only that it be unique.
>
> That will get rid of lots of possible errors inthe code...
Well, the code in question suppor
We *should* be able to read and write registers in any core mode,
instead of being stuck with whatever mode the core was when we
entered debug state. This patch makes them work.
Note that the current restore_context() only handles the current
mode; writing to other-mode registers is a NOP without
Create a generic register_cache_invalidate(), and use it to
replace three all-but-identical core-specific routines:
- armv4_5_invalidate_core_regs()
- armv7m_invalidate_core_regs
- mips32_invalidate_core_regs() too.
Make cache->num_regs be unsigned, avoiding various errors.
Net code shrink an
The previous version never wrote dirty registers
for non-current CPU modes ... fix that.
---
And with this ... Cortex-A8 is fairly well supporting all
the top level ARM operations, like ARM7 and ARM9 do.
There are various performance optimizations that can be
made, however. And it'd be nice if th
Don't forget to put NEWS updates in for the user-visible changes
you've made, like in the flash layer. Best to do such stuff while
it's fresh in your memory!
A bullet about improved error handling would make sense too; it
might belong in a new generic "scripting interface" category.
- Dave
_
I can verify that this patch makes the fake errors go away.
// Dean Glazeski
On Thu, Nov 19, 2009 at 8:16 PM, Zach Welch wrote:
> Another whoops. The changes to use '$_CHIPNAME.flash' were added after
> I wrote that code, and I didn't consider the consequences thoroughly.
> The attached patch
Hi all,
I found a chunk of code that was used by both the nand_[write|read]_page_raw
and I thought it might be helpful to NAND devices that implement the
read_page function. In my case, I don't want to copy the work like the
davinci driver does :P. Let me know if this is good for committing.
//
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