On 11/25/2010 06:13 AM, 韦东山 wrote:
For some flash, such as SST39VF6401B, it needs 3 step to enter CFI mode.
--- src/flash/nor/cfi.c.origin Thu Nov 11 05:42:00 2010
+++ src/flash/nor/cfi.c Thu Nov 25 12:31:18 2010
@@ -2264,6 +2264,24 @@
struct cfi_flash_bank *cfi_info =
Michael Schwingen is correct,
for example, S29GL064N need only write address 0x55 with data 0x98 to
enter CFI mode,
and have to
Exit command must be issued to reset the device into read mode; device
may otherwise be placed in an unknown state.
the way Michael Schwingen said is to add the
Jayabharath, Goluguri wrote, on 11/24/2010 10:05 AM:
2010/11/24 Nishanth Menon menon.nisha...@gmail.com
mailto:menon.nisha...@gmail.com
Nishanth Menon wrote, on 11/23/2010 08:43 PM:
folks,
Is there any attempts/plans on openOCD? flyswatter[1] was like
~50$ or
I can reliably reproduce this one with:
jtag_khz 1000
verify_image my_image.elf
# some prints about too high clock
reset init
# openocd aborts
Open On-Chip Debugger 0.5.0-dev-00620-g1892a2b (2010-11-25-15:32)
...
Error: 654 48021 adi_v5_jtag.c:335 jtagdp_transaction_endcheck():
MEM_AP_CSW
Try a lower clock speed. That looks like signal integrity issues. Either that,
or one of the wires isn't connected as solidly as it could be.
elex S elexs...@gmail.com wrote:
Hello,
I am new to JTAG and OpenOCD. I want to use Jlink-JTAG with my PHYTEC LPC3250
board.
Hence, I have downloaded
Joao Antonio wrote:
I'm interested in buying Actel's A2F-Eval-Kit and i'd like to know
if anyone was able to configure OpenOCD to work with it or if you
think it's achievable. By achievable I mean just by creating a tcl
script for it.
Nishanth Menon wrote:
Is there any attempts/plans on openOCD? flyswatter[1] was like ~50$ or
so.. or is openOCD more of a
would-be-useful-debugging-kernel-with-infinite-time thingy?
[1] http://www.tincantools.com/product.php?productid=16134
maybe someone can comment on this:
Domen Puncer wrote:
I can reliably reproduce this one with:
jtag_khz 1000
verify_image my_image.elf
# some prints about too high clock
reset init
# openocd aborts
It would be helpful if you could recompile openocd with debugging
symbols, and send a backtrace of the output from that.
Hi all,
I would like to ask for your help. I have a problem. I use olimex board
with procesor LPC2919. I am not able to write to the flash.
[ code ]
2000 kHz
trst_and_srst srst_pulls_trst srst_gates_jtag trst_push_pull srst_open_drain
jtag_nsrst_delay: 200
jtag_ntrst_delay: 200
use of
Try the openocd master branch.
--
Øyvind Harboe
Can Zylin Consulting help on your project?
US toll free 1-866-980-3434 / International +47 51 63 25 00
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
Hi Mirda,
--- mirda.d...@gmail.com mirda.d...@gmail.com schrieb am Do, 25.11.2010:
When I put flash probe 0 for first time I get
Unknown LPC29xx derivative
Can you send us a memory dump of 16 bytes at address 0xE100 of the LPC2919?
(0xE100...0xE10F)
Regards,
Rolf
FWIW I've used an Olimex JTAG-Tiny with a level shifter from Spectrum to
handle the 20pin-to-14pin issues.
On Thu, 2010-11-25 at 08:28 -0600, Nishanth Menon wrote:
~50$ or
so.. or is openOCD more of a
would-be-useful-debugging-kernel-with-infinite-time thingy?
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