--- On Fri, 12/3/10, Austin, Alex wrote:
> I imagine the problem is voltage,
> actually. The OMAP3530 and other similar devices run their
> JTAG ports at 1.8V,
True, and important. Thought I'm not sure
quite what you mean by "Similar". Don't
the Sitara chips run at 3V3 not 1V8? And
I though
On 04.12.2010 07:12, Austin, Alex wrote:
I imagine the problem is voltage, actually. The OMAP3530 and other similar
devices run their JTAG ports at 1.8V, and the ARM-USB-OCD doesn't like working
below 3V.
Therefore the Flyswatter
http://www.tincantools.com/product.php?productid=16134&cat=0&p
--- On Fri, 12/3/10, Spencer Oliver wrote:
> Date: Friday, December 3, 2010, 2:34 PM
> On 03/12/2010 17:24, David Brownell
> wrote:
> >
> >
> > --- On Fri, 12/3/10, Spencer Oliver
> wrote:
> Sorry i am slightly confused this patch as such has nothing to do with
> the standard reset_config.
I imagine the problem is voltage, actually. The OMAP3530 and other similar
devices run their JTAG ports at 1.8V, and the ARM-USB-OCD doesn't like working
below 3V.
From: openocd-development-boun...@lists.berlios.de
[openocd-development-boun...@lists.berli
If I have a bunch (say 65) of STM32 chips in a daisy chain, will it be
difficult to use OpenOCD to program them? Ideally I'd like to program
the first one from one object file, and all of the remaining ones from a
second object file.
Does anyone have a sample configuration file showing how to
Hi Freddie,
On 12/03/2010 11:11 PM, Freddie Chopin wrote:
How can this be unreliable? LPC23xx/LPC24xx after reset use 4MHz
internal clock. Doing "reset halt" sets that clock and prevents any
code from changing that (let's not talk about broken cases, because a
broken case can be found everywhe
On 12/03/2010 11:11 PM, Freddie Chopin wrote:
> How can this be unreliable? LPC23xx/LPC24xx after reset use 4MHz
> internal clock. Doing "reset halt" sets that clock and prevents any
> code from changing that (let's not talk about broken cases, because a
> broken case can be found everywhere), so w
On 2010-12-03 23:29, Spencer Oliver wrote:
On 03/12/2010 19:13, Freddie Chopin wrote:
On 2010-12-03 12:49, Spencer Oliver wrote:
On 02/12/2010 13:15, Spencer Oliver wrote:
How about something like this:
http://repo.or.cz/w/openocd/ntfreak.git/shortlog/refs/heads/stm32reset
No objections to
On 03/12/2010 17:24, David Brownell wrote:
--- On Fri, 12/3/10, Spencer Oliver wrote:
On 02/12/2010 12:42, freddie_cho...@op.pl
wrote:
"Spencer Oliver"
napisał(a):
As we know the current behaviour of cortex_m3
reset_config is to
override the std 'reset_config' setting -
I've lost tra
On 03/12/2010 19:13, Freddie Chopin wrote:
On 2010-12-03 12:49, Spencer Oliver wrote:
On 02/12/2010 13:15, Spencer Oliver wrote:
How about something like this:
http://repo.or.cz/w/openocd/ntfreak.git/shortlog/refs/heads/stm32reset
No objections to this then i will commit later today.
If I
On 2010-12-03 22:42, Michael Schwingen wrote:
On 12/03/2010 10:06 PM, Freddie Chopin wrote:
On 2010-12-03 21:39, Rolf Meeser wrote:
The clock parameter is vital for correct and reliable flash programming.
It must be possible for the user to select the frequency that he is
using.
I don't know h
On 12/03/2010 10:06 PM, Freddie Chopin wrote:
> On 2010-12-03 21:39, Rolf Meeser wrote:
>> The clock parameter is vital for correct and reliable flash programming.
>> It must be possible for the user to select the frequency that he is
>> using.
> I don't know how about you, but me (and 99% of "norm
On 12/03/2010 10:12 PM, Freddie Chopin wrote:
>
> Crazy idea nr 2 - why not set max frequency - this way this pulse will
> always be long enough (I don't see any reason for problems with longer
> pulse) - maybe this way this parameter would not be required too?
I don't know about the flash in the L
On 2010-12-03 21:39, Rolf Meeser wrote:
If for instance the flash is empty, the device will enter ISP mode
automatically. It will activate the PLL, and from then on run with
14.748 MHz. When in this situation you program the flash with the clock
parameter set to 4 MHz, the programming pulse will
On 2010-12-03 21:39, Rolf Meeser wrote:
On 12/03/2010 08:09 PM, Freddie Chopin wrote:
First of all, the chip frequency after reset actually is 4MHz due to
internal RC oscillator, so this "default frequency" assumption seems
pretty correct (actually it was probably me who added that script to
Ope
Hi Freddie,
On 12/03/2010 08:09 PM, Freddie Chopin wrote:
First of all, the chip frequency after reset actually is 4MHz due to
internal RC oscillator, so this "default frequency" assumption seems
pretty correct (actually it was probably me who added that script to
OpenOCD).
Incorrect. Yes, the
On 2010-12-03 12:49, Spencer Oliver wrote:
On 02/12/2010 13:15, Spencer Oliver wrote:
How about something like this:
http://repo.or.cz/w/openocd/ntfreak.git/shortlog/refs/heads/stm32reset
No objections to this then i will commit later today.
If I understand your path correctly - it removes
On 2010-12-03 14:31, Rolf Meeser wrote:
This patch allows a board script to specify the CPU clock of the LPC2478 target.
The clock frequency used to be fixed to 4 MHz. However, there is no default
frequency for this CPU. You mustn't assume prior knowledge of the clock
frequency, but rather dem
Hi everyone,
I've just plugged my trusty old Olimex ARM-USB-OCD (the Swiss Army
Knife of JTAG debuggers) into my shiny new S5PC100-based board and...
I'm struggling to see how to get it working even slightly.
Has anyone got anywhere with the s5pc100 or other CoreSight-based
Cortex A8s (apart
--- On Fri, 12/3/10, Spencer Oliver wrote:
> > On 02/12/2010 12:42, freddie_cho...@op.pl
> wrote:
> >> "Spencer Oliver"
> napisał(a):
> >> > As we know the current behaviour of cortex_m3
> reset_config is to
> >> > override the std 'reset_config' setting -
I've lost track of the discussion her
Gabi Voiculescu wrote:
> Do I actually need a new config file for the Logic 35x development board?
Quite possibly not. I have just added the CPU and adapter source/find
lines to openocd.cfg in some projects of mine.
> The only difference is the fact this board uses a 20 pin ARM JTAG
> connector
Do I actually need a new config file for the Logic 35x development board?
The CPU is the same OMAP3530. The JTAG header has 1.8V supply.
The only difference is the fact this board uses a 20 pin ARM JTAG connector
instead of the Ti-14 JTAG connector. As far as I see, this different header
only
it's embarrassing to see how long it took to explain my problem in a
message and how short you took to answer, but it's so. A "jtag_khz
4000" in my target script solved the problem and the TAP id now is
effectively the same reported in netx500.cfg.
Thank you a lot
Massimo
2010/12/3 Laurent Gauc
It's embarrassing to see how long it took to explain my problem in a
message and how short you took to answer, but it's so. A "jtag_khz
4000" in my target script solved the problem and the TAP id now is
effectively the same reported in netx500.cfg.
Thank you a lot
Massimo
2010/12/3 Laurent Gauch
Hello,
I have built and installed openocd-0.4 in a cygwin environment,
enabling the FTD2XX driver support.
I'd like to connect my jtagkey2 dongle to a NETX500 board.
Notice that it's not the NXSB100 board reported by Martin Kaul one year ago but
it's an application board containing, besides
Hello,
I have built and installed openocd-0.4 in a cygwin environment,
enabling the FTD2XX driver support.
I'd like to connect my jtagkey2 dongle to a NETX500 board.
Notice that it's not the NXSB100 board reported by Martin Kaul one year ago but
it's an application board containing, besides netx
Looks good to me.
--
Øyvind Harboe
Can Zylin Consulting help on your project?
US toll free 1-866-980-3434 / International +47 51 63 25 00
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
___
Openocd-
Hi,
This patch allows a board script to specify the CPU clock of the LPC2478 target.
The clock frequency used to be fixed to 4 MHz. However, there is no default
frequency for this CPU. You mustn't assume prior knowledge of the clock
frequency, but rather demand that the user (board script) spec
Will merge.
--
Øyvind Harboe
Can Zylin Consulting help on your project?
US toll free 1-866-980-3434 / International +47 51 63 25 00
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
___
Openocd-develo
Any objections to merging?
--
Øyvind Harboe
Can Zylin Consulting help on your project?
US toll free 1-866-980-3434 / International +47 51 63 25 00
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
___
Hi,
This is a new board support file for the Embedded Artists LPC2478 board with
32-bit SDRAM (V1.2)
Regards,
Rolf
From fd162eff391213c4c3c4ee3194feecb52e442a16 Mon Sep 17 00:00:00 2001
From: Rolf Meeser
Date: Fri, 3 Dec 2010 14:03:28 +0100
Subject: [PATCH 3/5] Add board config for Embedded Ar
You're the expert. I'll merge after cooloff.
--
Øyvind Harboe
Can Zylin Consulting help on your project?
US toll free 1-866-980-3434 / International +47 51 63 25 00
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
_
Hi,
Simple patch to change the name of the external flash of the Hitex LPC2929
board. Avoids a name conflict with the on-chip flash.
Regards,
Rolf
From b0a147ca2233f0b2a2972db36ef9d89c9ff96f0f Mon Sep 17 00:00:00 2001
From: Rolf Meeser
Date: Fri, 3 Dec 2010 13:54:47 +0100
Subject: [PATCH 2/5]
Hi,
This patch fixes the sector layout of the 512-KiB LPC2000 parts that use the
"lpc2000_v2" variant. This affects LPC2300/2400 devices.
Older devices (LPC213x) had only 27 sectors available (500 KiB), but the
LPC2300 have 28 sectors (504 KiB).
Regards,
Rolf
From dc19097c753aa3185fe8111b4408
On 02/12/2010 13:15, Spencer Oliver wrote:
On 02/12/2010 12:42, freddie_cho...@op.pl wrote:
"Spencer Oliver" napisał(a):
> As we know the current behaviour of cortex_m3 reset_config is to
> override the std 'reset_config' setting - this has undesired effects
> for people who expect srst for exam
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