On 01/11/2012 04:21 AM, Lluís Vilanova wrote:
Harsh Prateek Bora writes:
Signed-off-by: Harsh Prateek Bora
---
Makefile.objs|6 +-
Makefile.target | 10 +-
configure|7 +-
scripts/tracetool| 643 --
sc
Hi Stefan,
Thanks for an early review, I shall address your comments in next version.
Also, please confirm, whether I should work on top for qemu.git or your
tracing branch on repo.or.cz/stefanha.git ?
regards,
Harsh
On 01/10/2012 08:20 PM, Stefan Hajnoczi wrote:
On Tue, Jan 10, 2012 at 10:
Am 11.01.2012 06:44, schrieb David Gibson:
The pci_host_config_{read,write}_common() functions perform PCI config
accesses. They take a limit parameter which they appear to be supposed
to bounds check against, however the bounds checking logic, such as it is,
is completely broken.
Currently, it
Am 11.01.2012 06:44, schrieb David Gibson:
From: Benjamin Herrenschmidt
load_image_targphys() gets passed a max size for the file, but
doesn't enforce it at all. Add a check and return -1 (error) if
the file is too big, without loading it.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by:
The pci_host_config_{read,write}_common() functions perform PCI config
accesses. They take a limit parameter which they appear to be supposed
to bounds check against, however the bounds checking logic, such as it is,
is completely broken.
Currently, it takes the minimum of the supplied length and
On 01/10/2012 08:16 PM, Peter Maydell wrote:
On 23 December 2011 11:40, Evgeny Voevodin wrote:
+/*
+ * Hack: Map SECOND_CPU_BOOTREG, because it is in PMU USER5 register.
+ */
Shouldn't we be modelling the PMU then?
Power Management Unit (PMU) is quite tricky and not critical for
From: Benjamin Herrenschmidt
load_image_targphys() gets passed a max size for the file, but
doesn't enforce it at all. Add a check and return -1 (error) if
the file is too big, without loading it.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
hw/loader.c |2 ++
1 f
From: Benjamin Herrenschmidt
The kvm_get_dirty_pages_log_range() function uses two address
variables to step through the monitored memory region to update the
dirty log. However, these variables have type unsigned long, which
can overflow if running a 64-bit guest with a 32-bit qemu binary.
Thi
This patch adds several auto-generated files to .gitignore which were
previously missing.
Signed-off-by: David Gibson
---
.gitignore |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/.gitignore b/.gitignore
index 406f75f..f5aab2c 100644
--- a/.gitignore
+++ b/.gitignore
Hi Anthony,
Here are several simple non-target-specific bugfixes for qemu. Please apply.
On 01/10/2012 04:11 PM, Peter Maydell wrote:
+case UINTP:
+s->reg[I_(UINTP)]&= ~val;
+/* XXX: It's the assumption that it works in this way */
Can you expand this comment a little to clarify exactly what the
assumption you're making is?
It was not clear from documentation if
Am 10.01.2012 21:33, schrieb Mark Langsdorf:
> Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020,
> and create a configurable property for each defaulting to 96 and 64
> (respectively) so that device modelers can set the value appropriately
> for their SoC. Other ARM processo
At 01/10/2012 09:30 PM, Luiz Capitulino Wrote:
> On Wed, 04 Jan 2012 14:11:01 +0800
> Wen Congyang wrote:
>
>> Signed-off-by: Wen Congyang
>> ---
>> Makefile.target |8 +-
>> dump.c | 588
>> +++
>> dump.h |4 +
>>
> -Original Message-
> From: Paolo Bonzini [mailto:pbonz...@redhat.com]
> Sent: Tuesday, January 10, 2012 5:25 PM
> >> Also, I'm not sure if the update in progress flag still works.
> >> Clients are supposed to wait for UIP=0 before reading the RTC, and an
> >> update is supposed to be at l
On 11.01.2012, at 01:07, Anthony Liguori wrote:
> On 01/10/2012 06:07 PM, Alexander Graf wrote:
>> From: Benjamin Herrenschmidt
>>
>> The virtio config area in PIO space is a bit special. The initial
>> header is little endian but the rest (device specific) is guest
>> native endian.
>>
>> The
When accessing the device specific virtio config space, we memcpy
the data into a variable in QEMU. At that point we're basically
pulling host endianness into the game which is a really bad idea.
So instead, let's use the target specific load/store helpers for
memory pointers which fetch things in
From: Benjamin Herrenschmidt
The virtio config area in PIO space is a bit special. The initial
header is little endian but the rest (device specific) is guest
native endian.
The PIO accessors for PCI on machines that don't have native IO ports
assume that all PIO is little endian, which works fi
On 11/12/11 5:53 AM, Stefan Weil wrote:
> Am 11.12.2011 07:47, schrieb Brad Smith:
>> Public bug reported:
>>
>> Looking at the OpenBSD buildbot logs I noticed a warning that appears
>> to be a bug in the code.
>> OpenBSD has a 32-bit time_t on all archs at the moment (32-bit and
>> 64-bit).
>>
>>
On Wed, Jan 11, 2012 at 10:19:19AM +1100, Richard Henderson wrote:
> On 01/10/2012 09:27 PM, Edgar E. Iglesias wrote:
> > +++ b/target-microblaze/helper.h
> > @@ -5,6 +5,7 @@ DEF_HELPER_0(debug, void)
> > DEF_HELPER_FLAGS_3(carry, TCG_CALL_PURE | TCG_CALL_CONST, i32, i32, i32,
> > i32)
> > DEF_H
On 10.01.2012, at 23:43, Scott Wood wrote:
> On 01/10/2012 11:52 AM, Jan Kiszka wrote:
>> On 2012-01-10 18:43, Scott Wood wrote:
>>> On 01/10/2012 03:38 AM, Jan Kiszka wrote:
On 2012-01-10 00:17, Scott Wood wrote:
> On 01/09/2012 04:39 PM, Alexander Graf wrote:
>>
>> On 09.01.20
On 10.01.2012, at 23:52, Alexander Graf wrote:
>
> On 10.01.2012, at 23:49, Benjamin Herrenschmidt wrote:
>
>> On Tue, 2012-01-10 at 23:41 +0100, Alexander Graf wrote:
>>>
>>> No. Libhw shouldn't be able to know anything about target endianness.
>>> If a device is as brokenly spec'ed as virtio
On 10.01.2012, at 23:49, Benjamin Herrenschmidt wrote:
> On Tue, 2012-01-10 at 23:41 +0100, Alexander Graf wrote:
>>
>> No. Libhw shouldn't be able to know anything about target endianness.
>> If a device is as brokenly spec'ed as virtio and is coupled to the
>> "main CPU endianness", it clearly
On 01/10/2012 11:52 AM, Jan Kiszka wrote:
> On 2012-01-10 18:43, Scott Wood wrote:
>> On 01/10/2012 03:38 AM, Jan Kiszka wrote:
>>> On 2012-01-10 00:17, Scott Wood wrote:
On 01/09/2012 04:39 PM, Alexander Graf wrote:
>
> On 09.01.2012, at 22:23, Scott Wood wrote:
>> Alex, is there
On 10.01.2012, at 23:02, Anthony Liguori wrote:
> On 01/10/2012 05:35 AM, Benjamin Herrenschmidt wrote:
>> The virtio config area in PIO space is a bit special. The initial
>> header is little endian but the rest (device specific) is guest
>> native endian.
>>
>> The PIO accessors for PCI on mac
Am 10.01.2012 20:10, schrieb Anthony Liguori:
> Signed-off-by: Anthony Liguori
Reviewed-by: Andreas Färber
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Am 10.01.2012 09:35, schrieb Stefan Hajnoczi:
This reminds me of another questionable fall-through:
bt-host.c:bt_host_read():
while (s->len --)
switch (*pkt ++) {
...
case HCI_SCODATA_PKT:
if (s->len < 3)
goto bad_pkt;
pktlen = MIN(pkt[2] + 3, s->len);
s->len -= pktlen;
pkt += pktle
On 10.01.2012, at 22:04, Benjamin Herrenschmidt wrote:
> On Tue, 2012-01-10 at 21:46 +0100, Alexander Graf wrote:
>> On 10.01.2012, at 21:35, Andreas Färber wrote:
>>
>>> Am 10.01.2012 21:30, schrieb Alexander Graf:
Maybe the RTAS callbacks really want you to return stuff in little
>> endia
On 01/10/2012 02:55 PM, Luiz Capitulino wrote:
On Tue, 10 Jan 2012 13:18:41 -0600
Anthony Liguori wrote:
On 01/06/2012 01:42 PM, Luiz Capitulino wrote:
On Fri, 06 Jan 2012 09:08:19 -0600
We also need to look at this interface as a public interface whether we
technically committed it to or no
On 10.01.2012, at 21:35, Andreas Färber wrote:
> Am 10.01.2012 21:30, schrieb Alexander Graf:
>> Maybe the RTAS callbacks really want you to return stuff in little endian?
>
> IIRC all RTAS callbacks need to be in the same bitness and endianness
> (MSR LE+SB) as when instantiating RTAS from OF.
Am 10.01.2012 21:30, schrieb Alexander Graf:
> Maybe the RTAS callbacks really want you to return stuff in little endian?
IIRC all RTAS callbacks need to be in the same bitness and endianness
(MSR LE+SB) as when instantiating RTAS from OF.
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 904
On 10.01.2012, at 12:35, Benjamin Herrenschmidt wrote:
> The virtio config area in PIO space is a bit special. The initial
> header is little endian but the rest (device specific) is guest
> native endian.
>
> The PIO accessors for PCI on machines that don't have native IO ports
> assume that al
Nobody needs to run bamboo in 0.12 compat mode. Remove the machine.
Signed-off-by: Alexander Graf
---
hw/ppc440_bamboo.c | 22 +-
1 files changed, 1 insertions(+), 21 deletions(-)
diff --git a/hw/ppc440_bamboo.c b/hw/ppc440_bamboo.c
index c17f6f7..84e45b4 100644
--- a/hw/p
Tabs followed by spaces are a no-go. My editor shows it red, distracting
me from actual work! :)
Signed-off-by: Alexander Graf
---
hw/ppc440_bamboo.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/ppc440_bamboo.c b/hw/ppc440_bamboo.c
index 84e45b4..2369fba 10064
rbd: wire up snapshot removal and rollback functionality
Signed-off-by: Greg Farnum
Reviewed-by: Josh Durgin
---
block/rbd.c | 32
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/block/rbd.c b/block/rbd.c
index 7a2384c..f52c1ca 100644
--- a/blo
Signed-off-by: Anthony Liguori
---
Makefile |4 ++--
configure | 32
tests/Makefile | 11 ++-
3 files changed, 8 insertions(+), 39 deletions(-)
diff --git a/Makefile b/Makefile
index 4823144..e2ec3d6 100644
--- a/Makefile
+++ b/Makefile
Am 10.01.2012 00:44, schrieb Andreas Färber:
> Am 09.01.2012 12:29, schrieb Juan Quintela:
>> Please send in any agenda items you are interested in covering.
>
> Coordination of second QOM series: Who fixes what and til when.
Recapping this part of the call:
* Anthony will review and merge my pr
Signed-off-by: Anthony Liguori
---
check-qint.c | 68 ++
configure|4 +-
2 files changed, 23 insertions(+), 49 deletions(-)
diff --git a/check-qint.c b/check-qint.c
index 3af51f2..5a27119 100644
--- a/check-qint.c
+++ b/check-qint
This involves forcing the CPU into the halted state if qtest is enabled and
replacing the local APIC with the qtest interrupt controller.
It should be pretty straight forward to do the same for other machine types on
other architectures.
Signed-off-by: Anthony Liguori
---
hw/pc.c |7 ++
Now that we have the SoC init function in the same file, let's integrate
it with the board initialization.
While at it, also make use of the newly qdev'ified PCI host controller.
Signed-off-by: Alexander Graf
---
hw/ppc440_bamboo.c | 143 ++--
1
Signed-off-by: Anthony Liguori
---
check-qfloat.c | 47 ---
configure |4 ++--
2 files changed, 14 insertions(+), 37 deletions(-)
diff --git a/check-qfloat.c b/check-qfloat.c
index 3344057..cdc66ea 100644
--- a/check-qfloat.c
+++ b/check-qfl
This also includes a qtest wrapper script to make it easier to launch qtest
tests directly.
Signed-off-by: Anthony Liguori
---
scripts/qtest|5 +
tests/Makefile |2 +
tests/libqtest.c | 330 ++
tests/libqtest.h | 63 ++
Due to popular demand, this qdevifies the PCI host controller of 4xx SoCs
the same way as e500.
We have to introduce a small stub function for pci init that will be
removed in a later patch, once we qdev'ified the board, to keep the build
working.
Signed-off-by: Alexander Graf
---
hw/ppc440_bam
The separation of ppc440 and ppc440_bamboo makes some sense, since ppc440
is the SoC while ppc440_bamboo is the actual board. But the separation
makes things harder for us for no good reason, so let's just fold them
in together with each other.
Signed-off-by: Alexander Graf
---
Makefile.target
During discussions on the weekly QEMU call today Anthony brought up
the fact that bamboo isn't qdev'ified, which kept him from QOM'ing it.
This patch set cleans up bamboo for a bit and also qdev'ifies the PCI
parts of it. I'm not sure about the PIC and serial devices, since I
haven't found example
gtest does the right thing here so there's no need to comment these tests out.
Signed-off-by: Anthony Liguori
---
check-qjson.c |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/check-qjson.c b/check-qjson.c
index 430f53b..526e25e 100644
--- a/check-qjson.c
+++ b/check
Signed-off-by: Anthony Liguori
---
check-qlist.c | 74 ++--
configure |3 +-
2 files changed, 25 insertions(+), 52 deletions(-)
diff --git a/check-qlist.c b/check-qlist.c
index ee2454a..501ba26 100644
--- a/check-qlist.c
+++ b/check-q
On 10.01.2012, at 20:11, Andreas Färber wrote:
> Am 10.01.2012 00:44, schrieb Andreas Färber:
>> Am 09.01.2012 12:29, schrieb Juan Quintela:
>>> Please send in any agenda items you are interested in covering.
>>
>> Coordination of second QOM series: Who fixes what and til when.
>
> Recapping th
Signed-off-by: Anthony Liguori
---
Makefile | 37 ++---
tests/Makefile | 37 +
2 files changed, 39 insertions(+), 35 deletions(-)
create mode 100644 tests/Makefile
diff --git a/Makefile b/Makefile
index 0cbe7c2..48231
The idea behind qtest is pretty simple. Instead of executing a CPU via TCG or
KVM, rely on an external process to send events to the device model that the CPU
would normally generate.
qtest presents itself as an accelerator. In addition, a new option is added to
establish a qtest server (-qtest)
Signed-off-by: Anthony Liguori
---
check-qstring.c | 75 +-
configure |4 +-
2 files changed, 26 insertions(+), 53 deletions(-)
diff --git a/check-qstring.c b/check-qstring.c
index 93bd475..681bb68 100644
--- a/check-qstring.c
+++ b
Signed-off-by: Anthony Liguori
---
check-qjson.c | 330 +++--
configure |4 +-
2 files changed, 136 insertions(+), 198 deletions(-)
diff --git a/check-qjson.c b/check-qjson.c
index 36d4ac2..430f53b 100644
--- a/check-qjson.c
+++ b/chec
Signed-off-by: Anthony Liguori
---
tests/Makefile |2 +-
tests/rtc-test.c | 222 ++
2 files changed, 223 insertions(+), 1 deletions(-)
create mode 100644 tests/rtc-test.c
diff --git a/tests/Makefile b/tests/Makefile
index 63b835d..a90ea
This will run all tests through gtester. The main targets are:
$ make check
Which will run each unit test and:
$ make check-report.html
Which will generate a nice HTML report of the test status.
Signed-off-by: Anthony Liguori
---
scripts/gtester-cat | 32
test
Signed-off-by: Anthony Liguori
---
check-qdict.c | 246 ++---
configure |4 +-
2 files changed, 113 insertions(+), 137 deletions(-)
diff --git a/check-qdict.c b/check-qdict.c
index 5515773..fc0d276 100644
--- a/check-qdict.c
+++ b/chec
On 10.01.2012, at 18:52, Jan Kiszka wrote:
> On 2012-01-10 18:43, Scott Wood wrote:
>> On 01/10/2012 03:38 AM, Jan Kiszka wrote:
>>> On 2012-01-10 00:17, Scott Wood wrote:
On 01/09/2012 04:39 PM, Alexander Graf wrote:
>
> On 09.01.2012, at 22:23, Scott Wood wrote:
>> Alex, is th
On 10 January 2012 16:45, Mark Langsdorf wrote:
> This patch series adds support for the Calxeda Highbank SoC.
> It depends on my previous patch series "various ARM fixes for
> Calxeda Highbank" and "ahci: convert ahci_reset to use AHCIState".
> Some of the patches are carried voer from "Various A
On 10 January 2012 16:45, Mark Langsdorf wrote:
> From: Rob Herring
>
> Adds support for Calxeda's Highbank SoC.
> +static int highbank_regs_init(SysBusDevice *dev)
> +{
> + highbank_regs_state *s = FROM_SYSBUS(highbank_regs_state, dev);
> +
> + s->iomem = g_new(MemoryRegion, 1);
> + s->
Am 10.01.2012 17:45, schrieb Mark Langsdorf:
> The current comment says that the arm_timers are restricted to between
> 32 KHz and 1 MHz, but sp804 TRM does not specify those limits.
>
> Signed-off-by: Mark Langsdorf
Reviewed-by: Andreas Färber
Thanks,
Andreas
> ---
> Changes from v1
>
Am 10.01.2012 16:35, schrieb Peter Maydell:
> On 10 January 2012 12:45, Andreas Färber wrote:
>> Am 09.01.2012 17:59, schrieb Mark Langsdorf:
>>> Signed-off-by: Mark Langsdorf
>>> ---
>>> hw/arm_timer.c |3 ---
>>> 1 files changed, 0 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/hw/arm_
On 10 January 2012 16:45, Mark Langsdorf wrote:
> From: Rob Herring
>
> Signed-off-by: Rob Herring
> Signed-off-by: Mark Langsdorf
Reviewed-by: Peter Maydell
-- PMM
On Mon, Jan 09, 2012 at 10:59:04AM -0600, Mark Langsdorf wrote:
> This adds very basic support for XG-mac ethernet core from Synopsis and
> others. Missing things include:
>
> - statistics counters
> - WoL support
> - rx checksum offload
> - chained descriptors (only linear descriptor ring)
> - br
On 10 January 2012 16:45, Mark Langsdorf wrote:
> The current comment says that the arm_timers are restricted to between
> 32 KHz and 1 MHz, but sp804 TRM does not specify those limits.
>
> Signed-off-by: Mark Langsdorf
Reviewed-by: Peter Maydell
On 10 January 2012 16:45, Mark Langsdorf wrote:
> Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020,
> and create a configurable property for each defaulting to 96 and 64
> (respectively) so that device modelers can set the value appropriately
> for their SoC. Other ARM proc
Am 10.01.2012 17:45, schrieb Mark Langsdorf:
> From: Rob Herring
>
> Add support for ahci on sysbus.
>
> Signed-off-by: Rob Herring
> Signed-off-by: Mark Langsdorf
Reviewed-by: Andreas Färber
Thanks,
Andreas
> ---
> Changes from v4
> replaced all references to Plat|plat_ with sysbus_
On 01/10/2012 03:38 AM, Jan Kiszka wrote:
> On 2012-01-10 00:17, Scott Wood wrote:
>> On 01/09/2012 04:39 PM, Alexander Graf wrote:
>>>
>>> On 09.01.2012, at 22:23, Scott Wood wrote:
Alex, is there a better way to deal with the IRQ chip issue?
>>>
>>> To be honest, I'm not sure what the issue
On Sat, Jan 07, 2012 at 10:01:09PM +0100, Aurelien Jarno wrote:
> On Sat, Jan 07, 2012 at 08:36:12PM +, Blue Swirl wrote:
> > On Sat, Jan 7, 2012 at 20:16, Aurelien Jarno wrote:
> > > Fix .rel.plt sections in the output to not only include .rel.plt
> > > sections from the input but also the .r
On 10 January 2012 16:45, Mark Langsdorf wrote:
> This adds very basic support for XG-mac ethernet core from Synopsis and
> others. Missing things include:
>
> - statistics counters
> - WoL support
> - rx checksum offload
> - chained descriptors (only linear descriptor ring)
> - broadcast and mult
On Wed, Jan 04, 2012 at 03:13:06AM +0100, Alexander Graf wrote:
> Hi Anthony / Blue / Aurelien,
>
> This is my current patch queue for s390. Please pull.
>
> Alex
>
>
> The following changes since commit f3c6a169a39d188e98c17a0a0ebfa7f85e5aafdd:
> Anthony Liguori (1):
> Merge remote-t
On Tue, Jan 10, 2012 at 12:11:33AM +0100, Alexander Graf wrote:
>
> On 10.01.2012, at 00:06, Aurelien Jarno wrote:
>
> > On Mon, Jan 09, 2012 at 02:31:15PM +0100, Alexander Graf wrote:
> >>
> >> On 07.01.2012, at 21:16, Aurelien Jarno wrote:
> >>
> >>> Fix .rel.plt sections in the output to not
Hi Stefan,
* Stefan Hajnoczi (stefa...@gmail.com) wrote:
> On Tue, Jan 10, 2012 at 12:14 AM, Mathieu Desnoyers
> wrote:
> > This is needed to (very soon) add support for sdt.h in LTTng-UST 2.0, so
> > systemtap and gdb can hook into tracepoints declared by lttng-ust 2.0.
>
> If lttng supports sd
On 10 January 2012 16:54, andrzej zaborowski wrote:
> On 9 January 2012 12:24, Peter Maydell wrote:
>> Ping?
>>
>> (either I forgot to cc you, Andrzej, or the mailing list manager helpfully
>> dropped you off the cc list again. Sorry.)
>
> Thank you, now applied.
Thanks.
> I've been in CC but m
Ping^2 (slightly early but there's another patch on list which will
conflict so we ought to get one committed at least)
thanks
-- PMM
On 4 January 2012 10:41, Peter Maydell wrote:
> Ping?
>
> -- PMM
>
> On 19 December 2011 22:01, Peter Maydell wrote:
>> Implement save/load for the LAN9118.
>>
>
On 23 December 2011 11:40, Evgeny Voevodin wrote:
> +/* Perform byte/halfword/word swap of data according to WINCON */
> +static inline void fimd_swap_data(unsigned int swap_ctl, uint64_t *data)
> +{
> + int i;
> + uint64_t res;
> + uint64_t x = *data;
> +
> + if (swap_ctl & FIMD_WINC
Am 10.01.2012 16:41, schrieb Peter Maydell:
> On 10 January 2012 13:39, Andreas Färber wrote:
>> If you want an incentive, just put up a rule that every patch needs to
>> be reviewed by at least the submaintainer and one person apart from the
>> author (i.e., SoB + RB/AB + SoB). If a patch is lack
On 23 December 2011 11:40, Evgeny Voevodin wrote:
> SMDKC210 uses lan9215 chip, but lan9118 in 16-bit mode seems to
> be enough.
>
> Signed-off-by: Evgeny Voevodin
Reviewed-by: Peter Maydell
On 23 December 2011 11:40, Evgeny Voevodin wrote:
>
> Signed-off-by: Evgeny Voevodin
Reviewed-by: Peter Maydell
with the caveat that my patch
http://patchwork.ozlabs.org/patch/132321/
adding save/load support is likely to land first, in which case you'll
need to (a) rebase and (b) add your new
On 23 December 2011 11:40, Evgeny Voevodin wrote:
> + /*
> + * Hack: Map SECOND_CPU_BOOTREG, because it is in PMU USER5 register.
> + */
Shouldn't we be modelling the PMU then?
> + memory_region_init_ram(&s->bootreg_mem, NULL, "exynos4210.bootreg", 0x4);
> + memory_region_add_su
On 23 December 2011 11:40, Evgeny Voevodin wrote:
> +#define MCT_CFG_GET_PRESCALER(x) (x&0xFF)
> +#define MCT_CFG_GET_DIVIDER(x) (1<<(x>>8 & 7))
The macros in this file have the same bracket and spacing issues
as for the other patch.
> + case L0_TCON: case L1_TCON:
> + lt_i = (
On 10 January 2012 13:39, Andreas Färber wrote:
> If you want an incentive, just put up a rule that every patch needs to
> be reviewed by at least the submaintainer and one person apart from the
> author (i.e., SoB + RB/AB + SoB). If a patch is lacking that additional
> review, the author will pin
On Tue, Jan 10, 2012 at 03:37:51PM +, Peter Maydell wrote:
> On 10 January 2012 10:27, Edgar E. Iglesias wrote:
> > +uint32_t helper_clz(uint32_t t0)
> > +{
> > + if (t0 == 0) {
> > + return 32;
> > + }
> > + if (t0 == ~0) {
> > + return 0;
> > + }
> > + return clz
On 10 January 2012 10:27, Edgar E. Iglesias wrote:
> +uint32_t helper_clz(uint32_t t0)
> +{
> + if (t0 == 0) {
> + return 32;
> + }
> + if (t0 == ~0) {
> + return 0;
> + }
> + return clz32(t0);
> +}
I think clz32() handles both the 0 and 0x cases correctly,
so
On 10 January 2012 12:45, Andreas Färber wrote:
> Am 09.01.2012 17:59, schrieb Mark Langsdorf:
>> Signed-off-by: Mark Langsdorf
>> ---
>> hw/arm_timer.c | 3 ---
>> 1 files changed, 0 insertions(+), 3 deletions(-)
>>
>> diff --git a/hw/arm_timer.c b/hw/arm_timer.c
>> index 60e1c63..15d493f 10
From: Lars Persson
- Send EOP flags to the out channels.
- Send data descriptor metadata to the out channels.
Signed-off-by: Lars Persson
Signed-off-by: Edgar E. Iglesias
---
hw/etraxfs_dma.c | 28 ++--
hw/etraxfs_dma.h | 13 ++---
hw/etraxfs_eth.c |2 +
On 23 December 2011 11:40, Evgeny Voevodin wrote:
> Secondary CPU bootloader enables interrupt and issues wfi until start address
> is written to system controller. The position where to find this start
> address is hardcoded to 0x1030. This commit extends bootloader for
> secondary CPU to all
Signed-off-by: Edgar E. Iglesias
---
target-microblaze/translate.c | 12 +++-
1 files changed, 11 insertions(+), 1 deletions(-)
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 180ac84..96ce2ec 100644
--- a/target-microblaze/translate.c
+++ b/target-micr
Signed-off-by: Edgar E. Iglesias
---
target-microblaze/cpu.h |3 +++
target-microblaze/helper.h|1 +
target-microblaze/op_helper.c | 11 +++
target-microblaze/translate.c | 33 +
4 files changed, 48 insertions(+), 0 deletions(-)
diff
Signed-off-by: Benjamin MARSILI
---
Added my last name. Check that localaddr= is supplied with udp=,
it crashed when misused...
net.c |6 +++-
net/socket.c| 77 +-
qemu-options.hx |2 +
3 files changed, 82 insertions(+)
Forgot to CC Lars on this one.
Also note that this patch has tab issues due to the ETRAX DMA model beeing
written prior to CodingStyle.
Cheers
On Tue, Jan 10, 2012 at 11:27:27AM +0100, Edgar E. Iglesias wrote:
> From: Lars Persson
>
> - Send EOP flags to the out channels.
> - Send data descri
On Mon, Jan 09, 2012 at 07:23:42PM +0100, Stefan Weil wrote:
> The old code used sizeof(const struct cris_opcode **) where it should
> have used sizeof(const struct cris_opcode *). As both sizes give the
> same value, the resulting binary was ok, but static code analyzers
> like coverity and clang
Signed-off-by: Edgar E. Iglesias
---
target-microblaze/helper.h|1 +
target-microblaze/op_helper.c | 11 +++
target-microblaze/translate.c | 11 +++
3 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/target-microblaze/helper.h b/target-microblaze/helper.h
On 01/10/2012 07:33 AM, Kevin Wolf wrote:
Am 10.01.2012 14:22, schrieb Anthony Liguori:
On 01/10/2012 06:58 AM, Kevin Wolf wrote:
Probably we need to attack the reviewing problem first: That I review
all block patches myself worked well as long as we were two or three
people in that area, but t
* Harsh Bora (ha...@linux.vnet.ibm.com) wrote:
> On 01/10/2012 02:36 PM, Harsh Bora wrote:
>> On 01/10/2012 12:47 PM, Mathieu Desnoyers wrote:
>>> * Harsh Bora (ha...@linux.vnet.ibm.com) wrote:
On 01/10/2012 05:44 AM, Mathieu Desnoyers wrote:
> * Harsh Bora (ha...@linux.vnet.ibm.com) wrote
Am 10.01.2012 13:40, schrieb Peter Maydell:
> On 23 December 2011 11:40, Evgeny Voevodin wrote:
>> +
>> +#define TCNTB(x)(0xC*x)
>> +#define TCMPB(x)(0xC*x+1)
>> +#define TCNTO(x)(0xC*x+2)
>> +
>> +#define GET_PRESCALER(reg, x) ((reg&(0xFF<<(8*x)))>>8*x)
>> +#define
Am 10.01.2012 14:33, schrieb Kevin Wolf:
> Am 10.01.2012 14:22, schrieb Anthony Liguori:
>> On 01/10/2012 06:58 AM, Kevin Wolf wrote:
>>> Probably we need to attack the reviewing problem first: That I review
>>> all block patches myself worked well as long as we were two or three
>>> people in that
Justin,
Am 09.01.2012 19:00, schrieb Justin M. Forbes:
> Due to the repository move, holidays and other bits, we are a bit late
> getting out the door, but I want to get qemu 1.0.1 stable release done this
> week. We have a number of patches, but if you are sitting on anything or
> close to finis
On 01/10/2012 06:58 AM, Kevin Wolf wrote:
Probably we need to attack the reviewing problem first: That I review
all block patches myself worked well as long as we were two or three
people in that area, but today it doesn't scale any more without
lowering the review standards - and I don't want to
On 01/10/2012 03:17 AM, Gerd Hoffmann wrote:
Hi,
While being at it: The check should not be killed. It should be
replaced by one which checks whenever glib is new enough. Right now
qemu doesn't build on RHEL-5 because the glib shipped with it is too old
to run the tests.
Good point.
Rega
Am 09.01.2012 17:59, schrieb Mark Langsdorf:
> Signed-off-by: Mark Langsdorf
> ---
> hw/arm_timer.c |3 ---
> 1 files changed, 0 insertions(+), 3 deletions(-)
>
> diff --git a/hw/arm_timer.c b/hw/arm_timer.c
> index 60e1c63..15d493f 100644
> --- a/hw/arm_timer.c
> +++ b/hw/arm_timer.c
> @@ -
On 23 December 2011 11:40, Evgeny Voevodin wrote:
> Samsung exynos4210 Interrupt Combiner needs 512 IRQ sources.
>
> Signed-off-by: Evgeny Voevodin
Reviewed-by: Peter Maydell
On 23 December 2011 11:40, Evgeny Voevodin wrote:
> +
> +#define TCNTB(x) (0xC*x)
> +#define TCMPB(x) (0xC*x+1)
> +#define TCNTO(x) (0xC*x+2)
> +
> +#define GET_PRESCALER(reg, x) ((reg&(0xFF<<(8*x)))>>8*x)
> +#define GET_DIVIDER(reg, x) (1<<((0xF<<(4*x))>>(4*x)))
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