What is exactly the problem?
Peter's got an ARM specific KVM device he wants to stick in hw/kvm.
Can't it go in hw/arm/kvm (mimicking the final desired place, which
will be target-arm/hw/kvm)? And hw/kvm can be moved to hw/i386/kvm, or
we can leave it there for now until we're ready to
On 2012-06-23 00:56, Anthony Liguori wrote:
On 06/22/2012 05:27 PM, Jan Kiszka wrote:
On 2012-06-22 23:44, Anthony Liguori wrote:
1) unlock iothread before entering the do {} look in kvm_cpu_exec()
a) reacquire the lock after the loop
b) reacquire the lock in kvm_handle_io()
c)
On 2012-06-23 00:59, Anthony Liguori wrote:
On 06/22/2012 05:45 PM, Jan Kiszka wrote:
This sketches a possible path to get rid of the iothread lock on vmexits
in KVM mode. On x86, the the in-kernel irqchips has to be used because
we otherwise need to synchronize APIC and other per-cpu state
On 2012-06-23 02:22, Marcelo Tosatti wrote:
On Sat, Jun 23, 2012 at 12:55:49AM +0200, Jan Kiszka wrote:
Should have declared this [RFC] in the subject and CC'ed kvm...
On 2012-06-23 00:45, Jan Kiszka wrote:
This sketches a possible path to get rid of the iothread lock on vmexits
in KVM mode.
Hi all,
just stumbled over the memory_region_set_coalescing in pci_i82378_init:
What ISA devices are affected by this? It looks a bit strange to me as
the MMIO requests are apparently mapped on PIO requests, and we don't
have PIO coalescing on x86. Depending on the target device on PREP, this
may
Jan Kiszka wrote:
Hi Gerd,
I'm getting
qemu/hw/usb/core.c:410: usb_packet_complete: Assertion
`((ep-queue)-tqh_first) == p' failed.
with a passed-through USB headset (UHCI controller). This was with
current QEMU git head. Known issues? Anything I can do to debug it?
Jan
Hi all,
I get
On Sat, Jun 23, 2012 at 4:06 AM, Anthony Liguori anth...@codemonkey.ws wrote:
On 06/21/2012 09:49 AM, Liu Ping Fan wrote:
In order to break the big lock, using per-cpu_lock in kvm_cpu_exec()
to protect the race from other cpu's access to env-apic_state related
field in env.
Also, we need
On 2012-06-23 11:29, Erik Rull wrote:
Jan Kiszka wrote:
Hi Gerd,
I'm getting
qemu/hw/usb/core.c:410: usb_packet_complete: Assertion
`((ep-queue)-tqh_first) == p' failed.
with a passed-through USB headset (UHCI controller). This was with
current QEMU git head. Known issues? Anything I can
On 23.06.2012, at 02:45, Peter Crosthwaite wrote:
On Sat, Jun 23, 2012 at 7:14 AM, Alexander Graf ag...@suse.de wrote:
On 22.06.2012, at 15:17, Peter Crosthwaite wrote:
CC device-tree.c original contributors. (Jerome Young and Hollis Blanchard).
I cant find a maintainer for
On 23 June 2012 08:53, Paolo Bonzini pbonz...@redhat.com wrote:
Peter's got an ARM specific KVM device he wants to stick in hw/kvm.
Can't it go in hw/arm/kvm (mimicking the final desired place, which
will be target-arm/hw/kvm)? And hw/kvm can be moved to hw/i386/kvm, or
we can leave it there
On Fri, Jun 22, 2012 at 09:22:59PM -0300, Marcelo Tosatti wrote:
On Sat, Jun 23, 2012 at 12:55:49AM +0200, Jan Kiszka wrote:
Should have declared this [RFC] in the subject and CC'ed kvm...
On 2012-06-23 00:45, Jan Kiszka wrote:
This sketches a possible path to get rid of the iothread
On 2012-06-23 11:06, Marcelo Tosatti wrote:
On Fri, Jun 22, 2012 at 09:22:59PM -0300, Marcelo Tosatti wrote:
On Sat, Jun 23, 2012 at 12:55:49AM +0200, Jan Kiszka wrote:
Should have declared this [RFC] in the subject and CC'ed kvm...
On 2012-06-23 00:45, Jan Kiszka wrote:
This sketches a
Hi Jan,
Am 23.06.2012 11:28, schrieb Jan Kiszka:
just stumbled over the memory_region_set_coalescing in pci_i82378_init:
What ISA devices are affected by this? It looks a bit strange to me as
the MMIO requests are apparently mapped on PIO requests, and we don't
have PIO coalescing on x86.
On 2012-06-23 14:46, Andreas Färber wrote:
Hi Jan,
Am 23.06.2012 11:28, schrieb Jan Kiszka:
just stumbled over the memory_region_set_coalescing in pci_i82378_init:
What ISA devices are affected by this? It looks a bit strange to me as
the MMIO requests are apparently mapped on PIO requests,
Am 22.06.2012 21:36, schrieb Anthony Liguori:
The line between linux-user and softmmu is not very well defined right now.
linux-user really don't want to include devices and making CpuState a child of
DeviceState would require pulling lots of stuff into linux-user.
To solve this, we simply
I sent the patch on May 16 (http://lists.nongnu.org/archive/html/qemu-
devel/2012-05/msg02373.html). I haven't seen any response.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/806656
Title:
Tight
The new inline function qemu_log_vprintf should use this attribute.
Signed-off-by: Stefan Weil s...@weilnetz.de
---
qemu-log.h |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/qemu-log.h b/qemu-log.h
index 40f8b7b..db0f23d 100644
--- a/qemu-log.h
+++ b/qemu-log.h
@@ -51,7
On Fri, Jun 22, 2012 at 08:38:51PM -0700, Chris Wedgwood wrote:
I'm not sure I understand, wouldn't the filesystem need to be involved
at some level? How can the block layer differentiate lazilly discarded data
blocks from ones that are still in use without the aid of the
filesystem?
It
Commit eeacee4d865 changed the syntax of tcg_dump_ops, but didn't convert
all users (notably missing the ppc ones) to it. Fix them to the new syntax.
Signed-off-by: Alexander Graf ag...@suse.de
---
tcg/ppc/tcg-target.c |2 +-
tcg/ppc64/tcg-target.c |2 +-
2 files changed, 2
On Sun, 24 Jun 2012, Alexander Graf wrote:
Commit eeacee4d865 changed the syntax of tcg_dump_ops, but didn't convert
all users (notably missing the ppc ones) to it. Fix them to the new syntax.
Applied.
[..snip..]
--
mailto:av1...@comtv.ru
Hi Blue / Aurelien,
This is my current patch queue for ppc. Please pull.
Alex
The following changes since commit affe5189907f397514cdd4ee7446595c1246a0e9:
Alexander Graf (1):
TCG: Fix compile breakage in tcg_dump_ops
are available in the git repository at:
From: Blue Swirl blauwir...@gmail.com
When the code is moved together by the next patch, compiler
detects a possible uninitialized variable use. Avoid the warning
by initializing the variables.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c | 17 +
pc-bios/mpc8544ds.dts |9 -
2 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index a078e24..c7c16c1 100644
---
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 28c7c8c..a078e24 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -101,6 +101,7
We want to get rid of the concept of loading an external device tree and instead
generate our own. However, to do this we need to also create a device tree
template programatically.
This patch adds a helper to create an empty device tree in memory.
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c |8
pc-bios/mpc8544ds.dtb | Bin 1904 - 1810 bytes
pc-bios/mpc8544ds.dts |5 -
3 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index c68e994..5c2b6ab 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
From: Benjamin Herrenschmidt b...@kernel.crashing.org
This adds a qemu-specific hypervisor call to the pseries machine
which allows to do what amounts to memmove, memcpy and xor over
regions of physical memory such as the framebuffer.
This is the simplest way to get usable framebuffer speed from
Some times in the device tree, we find an array of 2 u32 cells that
really are a single u64 value. This patch adds a helper to make the
creation of these easy.
Signed-off-by: Alexander Graf ag...@suse.de
Reviewed-by: Peter Crosthwaite peter.crosthwa...@petalogix.com
---
device_tree.c |7
From: Blue Swirl blauwir...@gmail.com
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Blue Swirl blauwir...@gmail.com
Move decrementer and timebase helpers to a dedicated file.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Blue Swirl blauwir...@gmail.com
Add an explicit CPUPPCState parameter instead of relying on AREG0
and rename op_helper.c (which only contains load and store helpers)
to mem_helper.c. Remove AREG0 swapping in
tlb_fill().
Switch to AREG0 free mode. Use cpu_ld{l,uw}_code in translation
and
On 64bit capable systems, MAS2 can actually hold a 64bit virtual page
address. So increase the mask for its EPN.
Signed-off-by: Alexander Graf ag...@suse.de
---
target-ppc/cpu.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index
When generating serial port device tree nodes, we duplicate quite a bit
of code, because there are 2 of them in the mpc8544ds board we emulate.
Shove the generating code into a function, so we duplicate less code.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c | 54
If anyone outside of QEMU wants to mess with a QEMU generated device tree,
he needs to know which range phandles are valid in. So let's expose a
machine option that an external program can use to set the start allocate
id for phandles in QEMU.
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Blue Swirl blauwir...@gmail.com
Move MMU, TLB, SLB and BAT ops to mmu_helper.c.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Blue Swirl blauwir...@gmail.com
Move misc helpers from op_helper.c to misc_helpers.c.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
This patch adds e5500's CPU initialization to the TCG CPU initialization
code.
Signed-off-by: Alexander Graf ag...@suse.de
---
target-ppc/translate_init.c | 96 +-
1 files changed, 93 insertions(+), 3 deletions(-)
diff --git
From: Benjamin Herrenschmidt b...@kernel.crashing.org
We were incorrectly g_free'ing an object that isn't allocated
in one error path and failed to release it completely in another
This fixes qemu crashes with some cases of IO errors.
Signed-off-by: Benjamin Herrenschmidt
On the e500 series, accessing SPR_EPR magically turns into an access at
that CPU's IACK register on the MPIC. Implement that logic to get kernels
that make use of that feature work.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c |1 +
target-ppc/Makefile.objs |1
From: Benjamin Herrenschmidt b...@kernel.crashing.org
The core tcg/kvm code for ppc64 now has at least the outline
capability to support pagesizes beyond the standard 4k and 16MB. The
CPUState is initialized with information advertising the available
pagesizes and their correct encodings, and
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c |9 +
pc-bios/mpc8544ds.dts |6 --
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 5c2b6ab..03938b2 100644
--- a/hw/ppce500_mpc8544ds.c
The MAS registers on BookE are all 32 bit wide, except for MAS2, which
can hold up to 64 bit on 64 bit capable CPUs. Reflect this in the SPR
setting code, so that the guest can never write invalid values in them.
Signed-off-by: Alexander Graf ag...@suse.de
---
target-ppc/translate_init.c | 19
From: Blue Swirl blauwir...@gmail.com
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
Every time we use an address constant, it needs to potentially fit into
a 64bit physical address space. So let's define things accordingly.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c | 34 +-
1 files changed, 17 insertions(+), 17
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c |5 +
pc-bios/mpc8544ds.dtb | Bin 1972 - 1924 bytes
pc-bios/mpc8544ds.dts |5 -
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index
We want to be able to support = 4GB of RAM. To do so, we need to be able
to tell the guest OS how much RAM it has.
However, that information today is capped to 32bit. So let's extend the
offset and size fields to 64bit, so we can fit in big addresses and even
one day - if we wish to do so - map
From: Blue Swirl blauwir...@gmail.com
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
[fix unwanted whitespace line in Makefile.target]
Due to popular demand, we're updating the way we generate the MPIC
node and interrupt lines based on what the current state of art is.
Requested-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c | 33 ++---
From: Fabien Chouteau chout...@adacore.com
Do not call cpu_dump_state if logfile is NULL.
Signed-off-by: Fabien Chouteau chout...@adacore.com
[agraf: adjust to inline functions]
Signed-off-by: Alexander Graf ag...@suse.de
---
qemu-log.h |4 +++-
1 files changed, 3 insertions(+), 1
We have device tree helpers that allow us to create single cell (u32)
wide properties. However, when creating properties that contain an array of
cells, we need to jump through hoops, manually passing in an array with
converted endianness.
To ease the pain of this, create a generic macro helper
We're passing the ram size as uint32_t, capping it to 32 bits atm.
Change to target_phys_addr_t (uint64_t) to make sure we have all
the bits.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
Phandles are the fancy device tree name for pointer to another node.
To create a phandle property, we most likely want to reference to the
node we're pointing to by its path. So create a helper that allows
us to do so.
Signed-off-by: Alexander Graf ag...@suse.de
Reviewed-by: Peter Crosthwaite
From: Blue Swirl blauwir...@gmail.com
Move more misc helpers from helper.c to misc_helper.c.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
Recent u-boot has different defines for its gzip extract buffer, but the
common ground seems to be 64MB. So let's bump it up to that, enabling me
to load my test image again ;).
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/loader.c |4 ++--
1 files changed, 2 insertions(+), 2
We want to be able to override the automatically created device tree
by using the -dtb option. Implement this for the mpc8544ds machine.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c | 26 ++
1 files changed, 22 insertions(+), 4 deletions(-)
Our subnode creation helper can't handle creation of root subnodes,
like /memory. Fix this by allowing the parent node to be an empty
string, indicating the root node.
Signed-off-by: Alexander Graf ag...@suse.de
Reviewed-by: Peter Crosthwaite peter.crosthwa...@petalogix.com
---
device_tree.c |
From: Fabien Chouteau chout...@adacore.com
The size of EPN field in MAS2 depends on page size. This patch adds a
mask to discard invalid bits in EPN field.
Definition of EPN field from e500v2 RM:
EPN Effective page number: Depending on page size, only the bits
associated with a page boundary are
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c | 50
pc-bios/mpc8544ds.dtb | Bin 1810 - 72 bytes
pc-bios/mpc8544ds.dts | 46
3 files changed, 50 insertions(+), 46
From: Blue Swirl blauwir...@gmail.com
Lookup table 'hbrev' is never written to, so add a 'const' qualifier.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
The BookE variant of MSR_SF is MSR_CM. Implement everything it takes in TCG to
support running 64bit code with MSR_CM set.
Signed-off-by: Alexander Graf ag...@suse.de
---
target-ppc/cpu.h |9 +
target-ppc/excp_helper.c |9 +
target-ppc/mem_helper.c |2 +-
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c | 35 +++
pc-bios/mpc8544ds.dts | 26 --
2 files changed, 35 insertions(+), 26 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index
Now that we are dynamically creating the dtb, it's really useful to
be able to dump the created blob for debugging.
This patch implements a -machine dumpdtb=file option for e500 that
dumps the dtb exactly in the form the guest would get it to disk. It
can then be analyzed by dtc to get
This patch adds a helper to search for a node's phandle by its path. This
is especially useful when the phandle is part of an array, not just a single
cell in which case qemu_devtree_setprop_phandle would be the easy choice.
Signed-off-by: Alexander Graf ag...@suse.de
Reviewed-by: Peter
Whatever we pass in to qemu_devtree_setprop to put into the device tree
will not get modified by that function, so it can easily be declared const.
Signed-off-by: Alexander Graf ag...@suse.de
Reviewed-by: Peter Crosthwaite peter.crosthwa...@petalogix.com
---
device_tree.c |2 +-
Phandle references work by having 2 pieces:
- a phandle 1-cell property in the device tree node
- a reference to the same value in a property we want to point
to the other node
To generate the 1-cell property, we need an allocation mechanism that
gives us a unique number space. This
From: Blue Swirl blauwir...@gmail.com
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
The number of SPRs avaiable in different PowerPC chip is still increasing. Add
definitions for the MAS7_MAS3 SPR and all currently known bits in EPCR.
Signed-off-by: Alexander Graf ag...@suse.de
---
target-ppc/cpu.h | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
Device trees usually have a node /compatible, which indicate which machine
type we're looking at. For quick prototyping, it can be very useful to change
the contents of that node via the command line.
Thus, introduce a new option to -machine called dt_compatible, which when
set changes the
From: Benjamin Herrenschmidt b...@kernel.crashing.org
More recent Power server chips (i.e. based on the 64 bit hash MMU)
support more than just the traditional 4k and 16M page sizes. This
can get quite complicated, because which page sizes are supported,
which combinations are supported within
Now that we're moving all of the device tree generation from an external
pre-execution generated blob to runtime generation using libfdt, we absolutely
must have libfdt around.
This requirement was there before already, as the only way to not require libfdt
with e500 was to not use -kernel, which
We have a nice 64bit helper to ease the device tree generation and
make the code more readable when creating 64bit 2-cell parameters.
Use it when generating the device tree.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c |6 +++---
1 files changed, 3 insertions(+), 3
The initial TLB entry is supposed to help us run the guest -kernel payload.
This means the guest needs to be able to access its own memory, the initrd
memory and the device tree.
So far we only statically reserved a TLB entry from [0;256M[. This patch
fixes it to span from [0;dt_end[, allowing
From: Blue Swirl blauwir...@gmail.com
helper.c will be spilt by the next patches, fix
style issues before that.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
From: Kevin Wolf kw...@redhat.com
Move the declaration of s into the #ifdef sections that actually make
use of it.
Signed-off-by: Kevin Wolf kw...@redhat.com
Signed-off-by: Alexander Graf ag...@suse.de
---
block/raw-posix.c |9 -
1 files changed, 8 insertions(+), 1 deletions(-)
This reverts commit dt: temporarily disable subtree creation
failure check which was meant as a temporary solution to keep
external and dynamic device tree construction intact.
Now that we switched to fully dynamic dt construction, it's no
longer necessary.
Signed-off-by: Alexander Graf
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c |8
pc-bios/mpc8544ds.dtb | Bin 2028 - 1972 bytes
pc-bios/mpc8544ds.dts |5 -
3 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index
This patch moves the debug #ifdef'ed SPR trace generation into its
own function, so we can call it from multiple places.
Signed-off-by: Alexander Graf ag...@suse.de
---
target-ppc/translate_init.c | 30 ++
1 files changed, 18 insertions(+), 12 deletions(-)
diff
Now that all of the device tree bits are generated during runtime, we
can get rid of the device tree blob and instead start from scratch with
an empty device tree.
Signed-off-by: Alexander Graf ag...@suse.de
---
Makefile |1 -
hw/ppce500_mpc8544ds.c |8 +---
From: Blue Swirl blauwir...@gmail.com
Remove useless wrappers. In some cases 'int' parameters are
changed to uint32_t.
Make internal functions static.
Signed-off-by: Blue Swirl blauwir...@gmail.com
[agraf: fix kvm compilation]
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas
IVPR can either hold 32 or 64 bit addresses, depending on the CPU type. Let
the CPU initialization function pass in its mask itself, so we can easily
extend it.
Signed-off-by: Alexander Graf ag...@suse.de
---
target-ppc/translate_init.c |9 +
1 files changed, 5 insertions(+), 4
Due to popular demand, let's clean up the soc node a bit and use
more recent dt notions.
Requested-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c |9 -
1 files changed, 4 insertions(+), 5 deletions(-)
diff --git
From: Blue Swirl blauwir...@gmail.com
Add obviously missing 'break' statement.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
target-ppc/fpu_helper.c |1
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppce500_mpc8544ds.c |1 +
pc-bios/mpc8544ds.dtb | Bin 1924 - 1904 bytes
pc-bios/mpc8544ds.dts |3 ---
3 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index
Usually we want to know when creating a subtree fails. However, while
introducing this patch set we have to modify the device tree and some
times have the code to create a subtree in both the binary tree and
the dynamically created tree.
So ignore failures about this for now and enable them once
From: Blue Swirl blauwir...@gmail.com
Move exception helpers from op_helper.c to excp_helper.c.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Blue Swirl blauwir...@gmail.com
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl blauwir...@gmail.com
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber afaer...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
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