Re: [Qemu-devel] [PATCH v3 1/4] cpus: Define NMI callback

2014-06-10 Thread Alexey Kardashevskiy
On 06/11/2014 12:41 AM, Cornelia Huck wrote: > On Tue, 10 Jun 2014 09:39:51 -0400 > Luiz Capitulino wrote: > >> On Wed, 4 Jun 2014 18:08:47 +1000 >> Alexey Kardashevskiy wrote: >> >>> This introduces an NMI (non maskable interrupt) callback per CPU class >>> which QMP's "nmi" command may use to

Re: [Qemu-devel] [PATCH 3/6] qemu-char: move pty_chr_update_read_handler around

2014-06-10 Thread Fam Zheng
On Tue, 06/03 18:39, Paolo Bonzini wrote: > Signed-off-by: Paolo Bonzini Reviewed-by: Fam Zheng > --- > qemu-char.c | 32 > 1 file changed, 16 insertions(+), 16 deletions(-) > > diff --git a/qemu-char.c b/qemu-char.c > index 2bda2fb..b478a3d 100644 > --- a/qem

Re: [Qemu-devel] [PATCH 2/6] qemu-char: do not call chr_write directly

2014-06-10 Thread Fam Zheng
On Tue, 06/03 18:39, Paolo Bonzini wrote: > Make the mux always go through qemu_chr_fe_write, so that we'll get > the mutex for the underlying chardev. > > Signed-off-by: Paolo Bonzini Reviewed-by: Fam Zheng > --- > qemu-char.c | 14 +++--- > 1 file changed, 7 insertions(+), 7 deletio

Re: [Qemu-devel] [PATCH 1/6] qemu-char: introduce qemu_chr_alloc

2014-06-10 Thread Fam Zheng
On Tue, 06/03 18:39, Paolo Bonzini wrote: > The next patch will modify this function to initialize state that is > common to all backends. > > Signed-off-by: Paolo Bonzini Reviewed-by: Fam Zheng > --- > backends/baum.c | 2 +- > backends/msmouse.c| 2 +- > include/sysemu/char.h |

Re: [Qemu-devel] [PATCH] scsi: Report error when lun number is in use

2014-06-10 Thread Fam Zheng
On Tue, 06/10 10:18, Paolo Bonzini wrote: > Il 10/06/2014 08:55, Fam Zheng ha scritto: > >In the case that the lun number is taken by another scsi device, don't > >release the existing device siliently, but report an error to user. > > > >Signed-off-by: Fam Zheng > >--- > > hw/scsi/scsi-bus.c | 3

Re: [Qemu-devel] [PATCH v3 1/4] cpus: Define NMI callback

2014-06-10 Thread Paolo Bonzini
Il 11/06/2014 02:28, Alexander Graf ha scritto: Am 11.06.2014 um 02:23 schrieb Peter Maydell : On 10 June 2014 19:09, Alexander Graf wrote: I agree. I see two different paths forward: 1) Use the patches as they are - they seem pretty sound and take the existing x86/s390 only feature to sp

[Qemu-devel] [PATCH v4 4/9] virtio-blk: Drop VirtIOBlockRequest.read

2014-06-10 Thread Fam Zheng
Since it's set but not used. Signed-off-by: Fam Zheng Reviewed-by: Paolo Bonzini --- hw/block/dataplane/virtio-blk.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/block/dataplane/virtio-blk.c b/hw/block/dataplane/virtio-blk.c index 3d1e9e1..4e5e458 100644 --- a/hw/block/dataplane/virt

[Qemu-devel] [PATCH v4 9/9] virtio-blk: Fix and clean up the in_sg and out_sg check

2014-06-10 Thread Fam Zheng
out_sg is checked by iov_to_buf below, so it can be dropped. Add assert and iov_discard_back around in_sg, as the in_sg is handled in dataplane code. Signed-off-by: Fam Zheng --- hw/block/virtio-blk.c | 21 ++--- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/hw/

[Qemu-devel] [PATCH v4 8/9] virtio-blk: Fill in VirtIOBlockReq.out in dataplane code

2014-06-10 Thread Fam Zheng
VirtIOBlockReq is allocated in process_request, and freed in command functions. Signed-off-by: Fam Zheng Reviewed-by: Paolo Bonzini --- hw/block/dataplane/virtio-blk.c | 102 +--- 1 file changed, 44 insertions(+), 58 deletions(-) diff --git a/hw/block/datapl

[Qemu-devel] [PATCH v4 7/9] virtio-blk: Convert VirtIOBlockReq.out to structrue

2014-06-10 Thread Fam Zheng
The virtio code currently assumes that the outhdr is in its own iovec. This is not guaranteed by the spec, so we should relax this assumption. Convert the VirtIOBlockReq.out field to structrue so that we can use iov_to_buf and then discard the header from the beginning of iovec. Suggested-by: Pao

[Qemu-devel] [PATCH v4 6/9] virtio-blk: Use VirtIOBlockReq.in to drop VirtIOBlockReq.inhdr

2014-06-10 Thread Fam Zheng
In current virtio spec, inhdr is a single byte, and is unlikely to change for both functionality and compatibility considerations. Non-dataplane uses .in, and we are on the way to converge them. So let's unify it to get cleaner code. Remove .inhdr and use .in. Signed-off-by: Fam Zheng --- hw/bl

[Qemu-devel] [PATCH v4 1/9] virtio-blk: Move VirtIOBlockReq to header

2014-06-10 Thread Fam Zheng
For later reusing by dataplane code. Signed-off-by: Fam Zheng --- hw/block/virtio-blk.c | 11 --- include/hw/virtio/virtio-blk.h | 11 +++ 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c index 85aa871..a5bae4

[Qemu-devel] [PATCH v4 3/9] virtio-blk: Drop bounce buffer from dataplane code

2014-06-10 Thread Fam Zheng
The block layer will handle the unaligned request. Signed-off-by: Fam Zheng Reviewed-by: Paolo Bonzini --- hw/block/dataplane/virtio-blk.c | 25 - 1 file changed, 25 deletions(-) diff --git a/hw/block/dataplane/virtio-blk.c b/hw/block/dataplane/virtio-blk.c index c10b7b

[Qemu-devel] [PATCH v4 5/9] virtio-blk: Replace VirtIOBlockRequest with VirtIOBlockReq

2014-06-10 Thread Fam Zheng
Field "inhdr" is added temporarily for a more mechanical change, and will be dropped in the next commit. Signed-off-by: Fam Zheng Reviewed-by: Paolo Bonzini --- hw/block/dataplane/virtio-blk.c | 34 +++--- include/hw/virtio/virtio-blk.h | 4 2 files changed, 1

[Qemu-devel] [PATCH v4 2/9] virtio-blk: Convert VirtIOBlockReq.elem to pointer

2014-06-10 Thread Fam Zheng
This will make converging with dataplane code easier. Add virtio_blk_free_request to handle the freeing of request internal fields. Signed-off-by: Fam Zheng --- hw/block/virtio-blk.c | 85 +++--- include/hw/virtio/virtio-blk.h | 2 +- 2 files change

[Qemu-devel] [PATCH v4 0/9] virtio-blk: Converge VirtIOBlockRequest into VirtIOBlockReq

2014-06-10 Thread Fam Zheng
This unifies the request structure used by dataplane and non-dataplane code, while dropping unnessary fields for bounce buffer and read flag. v4: Address Stefan's comments as below, and add Paolo's rev-by lines to others. [01/09] virtio-blk: Move VirtIOBlockReq to header Include

Re: [Qemu-devel] [Xen-devel] [RFC PATCH V2 0/2] support xen HVM direct kernel boot

2014-06-10 Thread Chun Yan Liu
>>> On 6/4/2014 at 03:34 PM, in message <1401867299-7715-1-git-send-email-cy...@suse.com>, Chunyan Liu wrote: > After your valuable suggestions, I'll continue the work to support > stubdom. But since stubdom currently uses qemu-xen-traditional and > will switch to qemu upstream in future, in

Re: [Qemu-devel] [PATCH V2 3/3] virtio-net: announce self by guest

2014-06-10 Thread Jason Wang
On 06/10/2014 06:10 PM, Michael S. Tsirkin wrote: > On Tue, Jun 10, 2014 at 11:50:33AM +0530, Amit Shah wrote: >> On (Tue) 20 May 2014 [14:01:44], Jason Wang wrote: >>> It's hard to track all mac addresses and their configurations (e.g >>> vlan or ipv6) in qemu. Without this information, it's impos

[Qemu-devel] [PATCH v1] Add tracepoint for qemu_system_shutdown_request() and qemu_system_powerdown_request()

2014-06-10 Thread Yang Zhiyong
We have the experience that the guest doesn't stop successfully though it was instructed to shut down. The root cause may be not in QEMU mostly. However, QEMU is often suspected at the beginning just because the issue occurred in virtualization environment. Therefore, we need to affirm that QEM

Re: [Qemu-devel] [PULL 8/8] rules.mak: Rewrite unnest-vars

2014-06-10 Thread Fam Zheng
On Tue, 06/10 18:49, Paolo Bonzini wrote: > From: Fam Zheng > > The macro unnest-vars is the most important, complicated but hard to > track magic in QEMU's build system. > > Rewrite it in a (hopefully) clearer way, with more comments, to make it > easier to understand and maintain. > > Remove

Re: [Qemu-devel] [PATCH v3 00/32] target-arm: add Security Extensions for CPUs

2014-06-10 Thread Edgar E. Iglesias
On Wed, Jun 11, 2014 at 01:54:42AM +0200, Fabian Aggeler wrote: > Hi, > > this is round 3 of the Security Extension patches which started with > the TrustZone patchset by Samsung. Many patches were dropped or > got separated from this patchset. It shows yet another mechanism of > register banking

[Qemu-devel] [PATCH v3 20/32] target-arm: arrayfying fieldoffset for banking

2014-06-10 Thread Fabian Aggeler
Prepare ARMCPRegInfo to support specifying two fieldoffsets per register definition. This will allow us to keep one register definition for banked registers (different offsets for secure/ non-secure world). Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 16 +--- target-arm/h

[Qemu-devel] [PATCH v3 05/32] target-arm: reject switching to monitor mode

2014-06-10 Thread Fabian Aggeler
From: Sergey Fedorov ...from non-secure state. Signed-off-by: Sergey Fedorov Signed-off-by: Fabian Aggeler --- target-arm/helper.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index d8d6637..ace8d8b 100644 --- a/target-arm/helper.c +++ b/targ

[Qemu-devel] [PATCH v3 19/32] target-arm: insert Aarch32 cpregs twice into hashtable

2014-06-10 Thread Fabian Aggeler
Prepare for cp register banking by inserting every cp register twice, once for secure world and once for non-secure world. Signed-off-by: Fabian Aggeler --- target-arm/cpu.h | 14 +++--- target-arm/helper.c| 20 target-arm/translate.c | 19 +

Re: [Qemu-devel] [PATCH v2 08/17] target-arm: Add SCR_EL3

2014-06-10 Thread Edgar E. Iglesias
On Tue, Jun 10, 2014 at 10:06:31PM +, Aggeler Fabian wrote: > > On 09 Jun 2014, at 17:04, Edgar E. Iglesias wrote: > > > From: "Edgar E. Iglesias" > > > > Signed-off-by: Edgar E. Iglesias > > --- > > target-arm/cpu.h| 15 +++ > > target-arm/helper.c | 29 ++

[Qemu-devel] [PATCH v3 14/32] target-arm: Respect SCR.FW, SCR.AW and SCTLR.NMFI

2014-06-10 Thread Fabian Aggeler
bits when modifying CPSR. Signed-off-by: Fabian Aggeler --- target-arm/helper.c | 42 +++--- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 2fbecfa..f6ff4aa 100644 --- a/target-arm/helper.c +++ b/

[Qemu-devel] [PATCH v3 09/32] target-arm: extend Aarch32 async excp masking

2014-06-10 Thread Fabian Aggeler
This patch extends arm_excp_unmasked() according to ARM ARMv7 and ARM ARMv8 (all EL running in Aarch32) and adds comments. Signed-off-by: Fabian Aggeler --- target-arm/cpu.h | 77 1 file changed, 61 insertions(+), 16 deletions(-) diff --g

[Qemu-devel] [PATCH v3 08/32] target-arm: A32: Emulate the SMC instruction

2014-06-10 Thread Fabian Aggeler
Implements SMC instruction in Aarch32 using the A32 syndrome. When executing SMC instruction from monitor CPU mode SCR.NS bit is reset. Signed-off-by: Sergey Fedorov Signed-off-by: Fabian Aggeler --- target-arm/helper.c| 11 +++ target-arm/internals.h | 5 + target-arm/translat

[Qemu-devel] [PATCH v3 11/32] target-arm: add async excp target_el&mode function

2014-06-10 Thread Fabian Aggeler
Adds a dedicated function for IRQ and FIQ exceptions to determine target_el and mode (Aarch32) according to tables in ARM ARMv8 and ARM ARM v7. Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 3 ++ target-arm/helper.c | 137 2 files

[Qemu-devel] [PATCH v3 25/32] target-arm: make c2_mask and c2_base_mask banked

2014-06-10 Thread Fabian Aggeler
Since TTBCR is banked we will bank c2_mask and c2_base_mask too. This avoids recalculating them on switches from secure to non-secure world. Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 10 -- target-arm/helper.c | 19 --- 2 files changed, 20 insertions(+), 9 d

[Qemu-devel] [PATCH v3 24/32] target-arm: add TCR_EL3 and make TTBCR banked

2014-06-10 Thread Fabian Aggeler
Adds TCR_EL3 system register and makes existing TTBCR banked. Adjust translation functions to use TCR/TTBCR instance depending on CPU state. Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 11 ++- target-arm/helper.c | 46 ++ 2 files ch

Re: [Qemu-devel] [PATCH v3 1/4] cpus: Define NMI callback

2014-06-10 Thread Alexander Graf
> Am 11.06.2014 um 02:23 schrieb Peter Maydell : > >> On 10 June 2014 19:09, Alexander Graf wrote: >> I agree. I see two different paths forward: >> >> 1) Use the patches as they are - they seem pretty sound and take the >> existing x86/s390 only feature to spapr >> 2) Model an "NMI" button.

Re: [Qemu-devel] [PATCH v3 1/4] cpus: Define NMI callback

2014-06-10 Thread Peter Maydell
On 10 June 2014 19:09, Alexander Graf wrote: > I agree. I see two different paths forward: > > 1) Use the patches as they are - they seem pretty sound and take the > existing x86/s390 only feature to spapr > 2) Model an "NMI" button. That button would get instantiated by the > machine model. T

Re: [Qemu-devel] [PATCH v3 1/4] cpus: Define NMI callback

2014-06-10 Thread Alexander Graf
> Am 11.06.2014 um 02:12 schrieb Alexey Kardashevskiy : > >> On 06/11/2014 04:09 AM, Alexander Graf wrote: >>> On 06/10/2014 06:29 PM, Paolo Bonzini wrote: >>> Il 10/06/2014 16:48, Luiz Capitulino ha scritto: > The s390 restart interrupt is a per-vcpu interrupt, which we really > don't w

Re: [Qemu-devel] [PATCH v3 1/4] cpus: Define NMI callback

2014-06-10 Thread Alexey Kardashevskiy
On 06/11/2014 04:09 AM, Alexander Graf wrote: > On 06/10/2014 06:29 PM, Paolo Bonzini wrote: >> Il 10/06/2014 16:48, Luiz Capitulino ha scritto: >>> > The s390 restart interrupt is a per-vcpu interrupt, which we really >>> > don't want to inject on _all_ vcpus. OTOH, we want to inject that >>> > in

[Qemu-devel] [PATCH v3 31/32] target-arm: make VBAR banked

2014-06-10 Thread Fabian Aggeler
When EL3 is running in Aarch32 (or ARMv7 with Security Extensions) VBAR has a secure and a non-secure instance, which are mapped to VBAR_EL1 and VBAR_EL3. Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 12 +++- target-arm/helper-a64.c | 6 +- target-arm/helper.c | 1

[Qemu-devel] [PATCH v3 30/32] target-arm: make PAR banked

2014-06-10 Thread Fabian Aggeler
When EL3 is running in Aarch32 (or ARMv7 with Security Extensions) PAR has a secure and a non-secure instance. Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 10 +- target-arm/helper.c | 25 ++--- 2 files changed, 23 insertions(+), 12 deletions(-) diff --git

[Qemu-devel] [PATCH v3 29/32] target-arm: make IFAR/DFAR banked

2014-06-10 Thread Fabian Aggeler
When EL3 is running in Aarch32 (or ARMv7 with Security Extensions) IFAR and DFAR have a secure and a non-secure instance. Signed-off-by: Fabian Aggeler Conflicts: target-arm/helper.c --- target-arm/cpu.c| 2 +- target-arm/cpu.h| 21 - target-arm/help

[Qemu-devel] [PATCH v3 27/32] target-arm: make IFSR banked

2014-06-10 Thread Fabian Aggeler
When EL3 is running in Aarch32 (or ARMv7 with Security Extensions) IFSR has a secure and a non-secure instance. Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 10 +- target-arm/helper.c | 9 + 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/target-arm/cp

[Qemu-devel] [PATCH v3 32/32] target-arm: make c13 cp regs banked (FCSEIDR, ...)

2014-06-10 Thread Fabian Aggeler
When EL3 is running in Aarch32 (or ARMv7 with Security Extensions) FCSEIDR, CONTEXTIDR, TPIDRURW, TPIDRURO and TPIDRPRW have a secure and a non-secure instance. Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 45 - target-arm/helper.c | 27

[Qemu-devel] [PATCH v3 23/32] target-arm: add TTBR0_EL3 and make TTBR0/1 banked

2014-06-10 Thread Fabian Aggeler
Add TTBR0 and maps secure/non-secure instance of ttbr0 and ttbr1 accordingly (translation table base register). Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 21 +++-- target-arm/helper.c | 45 +++-- 2 files changed, 54 insertions

[Qemu-devel] [PATCH v3 28/32] target-arm: make DFSR banked

2014-06-10 Thread Fabian Aggeler
When EL3 is running in Aarch32 (or ARMv7 with Security Extensions) DFSR has a secure and a non-secure instance. Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 13 - target-arm/helper-a64.c | 17 ++--- target-arm/helper.c | 15 --- 3 files chan

[Qemu-devel] [PATCH v3 22/32] target-arm: make CSSELR banked

2014-06-10 Thread Fabian Aggeler
Rename CSSELR (cache size selection register) and add secure instance (Aarch32). Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 10 +- target-arm/helper.c | 9 + 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 90

[Qemu-devel] [PATCH v3 26/32] target-arm: make DACR banked

2014-06-10 Thread Fabian Aggeler
When EL3 is running in Aarch32 (or ARMv7 with Security Extensions) DACR has a secure and a non-secure instance. Signed-off-by: Fabian Aggeler --- hw/arm/pxa2xx.c | 2 +- target-arm/cpu.h| 13 +++-- target-arm/helper.c | 19 +++ 3 files changed, 23 insertions(+),

[Qemu-devel] [PATCH v3 21/32] target-arm: add SCTLR_EL3 and make SCTLR banked

2014-06-10 Thread Fabian Aggeler
Implements SCTLR_EL3 and uses secure/non-secure instance when needed. Signed-off-by: Fabian Aggeler --- hw/arm/pxa2xx.c| 2 +- target-arm/cpu.c | 5 ++-- target-arm/cpu.h | 13 - target-arm/helper.c| 78 +- target-

[Qemu-devel] [PATCH v3 04/32] target-arm: add arm_is_secure() function

2014-06-10 Thread Fabian Aggeler
arm_is_secure() function allows to determine CPU security state if the CPU implements Security Extensions/EL3. arm_is_secure_below_el3() returns true if CPU is in secure state below EL3. Signed-off-by: Sergey Fedorov Signed-off-by: Fabian Aggeler --- target-arm/cpu.h | 38 ++

[Qemu-devel] [PATCH v3 12/32] target-arm: use dedicated target_el function

2014-06-10 Thread Fabian Aggeler
Signed-off-by: Fabian Aggeler --- target-arm/helper.c | 24 ++-- 1 file changed, 6 insertions(+), 18 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 8333b52..b9b458e 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3429,14 +3429,10 @@ u

[Qemu-devel] [PATCH v3 06/32] target-arm: make arm_current_pl() return PL3

2014-06-10 Thread Fabian Aggeler
Make arm_current_pl() return PL3 for secure PL1 and monitor mode. Increase MMU modes since mmu_index is directly infered from arm_ current_pl(). Changes assertion in arm_el_is_aa64() to allow EL3. Signed-off-by: Fabian Aggeler --- target-arm/cpu.h | 15 +-- 1 file changed, 9 insertio

[Qemu-devel] [PATCH v3 18/32] target-arm: add macros to access banked registers

2014-06-10 Thread Fabian Aggeler
If EL3 is in Aarch32 state certain cp registers are banked (secure and non-secure instance). When reading or writing to coprocessor registers the following macros can be used. If the CPU is in monitor mode SCR.NS bit determines which instance is going to be accessed. - USE_SECURE_REG(env): to dete

[Qemu-devel] [PATCH v3 16/32] target-arm: add SDER definition

2014-06-10 Thread Fabian Aggeler
From: Sergey Fedorov Signed-off-by: Sergey Fedorov Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 1 + target-arm/helper.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index bc9edaa..c76a31c 100644 --- a/target-arm/cpu.h +++ b/target-arm/

[Qemu-devel] [PATCH v3 15/32] target-arm: add NSACR register

2014-06-10 Thread Fabian Aggeler
Implements NSACR register with corresponding read/write functions for ARMv7 and ARMv8. Signed-off-by: Sergey Fedorov Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 6 + target-arm/helper.c | 68 - 2 files changed, 73 insertions(+

[Qemu-devel] [PATCH v3 13/32] target-arm: implement IRQ/FIQ routing to Monitor mode

2014-06-10 Thread Fabian Aggeler
SCR.{IRQ/FIQ} bits allow to route IRQ/FIQ exceptions to monitor CPU mode. When taking IRQ exception to monitor mode FIQ exception is additionally masked. Signed-off-by: Sergey Fedorov Signed-off-by: Fabian Aggeler --- target-arm/helper.c | 9 + 1 file changed, 9 insertions(+) diff --gi

[Qemu-devel] [PATCH v3 17/32] target-arm: add MVBAR support

2014-06-10 Thread Fabian Aggeler
Use MVBAR register as exception vector base address for exceptions taken to CPU monitor mode. Signed-off-by: Sergey Fedorov Signed-off-by: Fabian Aggeler --- target-arm/cpu.h| 1 + target-arm/helper.c | 15 +-- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/tar

[Qemu-devel] [PATCH v3 02/32] target-arm: move Aarch32 SCR into security reglist

2014-06-10 Thread Fabian Aggeler
Define a new ARM CP register info list for the ARMv7 Security Extension feature. Register that list only for ARM cores with Security Extension/EL3 support. Moving Aarch32 SCR into Security Extension register group. Signed-off-by: Sergey Fedorov Signed-off-by: Fabian Aggeler --- target-arm/helpe

[Qemu-devel] [PATCH v3 03/32] target-arm: increase arrays of registers R13 & R14

2014-06-10 Thread Fabian Aggeler
Increasing banked_r13 and banked_r14 to store LR_mon and SP_mon (bank index 7). Signed-off-by: Fabian Aggeler --- target-arm/cpu.h | 4 ++-- target-arm/machine.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 060664f..903aa0

[Qemu-devel] [PATCH v3 07/32] target-arm: add non-secure Translation Block flag

2014-06-10 Thread Fabian Aggeler
From: Sergey Fedorov This patch is based on idea found in patch at git://github.com/jowinter/qemu-trustzone.git f3d955c6c0ed8c46bc0eb10b634201032a651dd2 by Johannes Winter . This flag prevents QEMU from executing TCG code generated for other CPU security state. It also allows to generate differe

[Qemu-devel] [PATCH v3 10/32] target-arm: extend Aarch64 SCR.{FIQ|IRQ} handling

2014-06-10 Thread Fabian Aggeler
If EL3 is using Aarch64 IRQ/FIQ masking is ignored in all exception levels other than EL3 if SCR.{FIQ|IRQ} is set to 1 (routed to EL3). Signed-off-by: Fabian Aggeler --- target-arm/cpu.h | 98 +--- 1 file changed, 72 insertions(+), 26 deletions

[Qemu-devel] [PATCH v3 00/32] target-arm: add Security Extensions for CPUs

2014-06-10 Thread Fabian Aggeler
Hi, this is round 3 of the Security Extension patches which started with the TrustZone patchset by Samsung. Many patches were dropped or got separated from this patchset. It shows yet another mechanism of register banking for EL3 running in Aarch32 mode. This version also conforms better with the

[Qemu-devel] [PATCH v3 01/32] target-arm: add cpu feature EL3 to CPUs with Security Extensions

2014-06-10 Thread Fabian Aggeler
Set ARM_FEATURE_EL3 feature for CPUs that implement Security Extensions. Signed-off-by: Fabian Aggeler --- target-arm/cpu.c | 4 1 file changed, 4 insertions(+) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index cd7a5df..bd581e6 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -

Re: [Qemu-devel] [PATCH 00/10 v4] bsd-user: update strace syscalls and breakout BSD distros

2014-06-10 Thread Peter Maydell
On 8 June 2014 17:57, Sean Bruno wrote: > Sean Bruno (9): > bsd-user: GPL v2 attribution update and style > bsd-user: Implement strace support for print_sysctl syscall > bsd-user: Implement strace support for print_ioctl syscall > bsd-user: Implement new syscall print_sysarch and add strac

Re: [Qemu-devel] [PATCH 10/10 v4] bsd-user: Add TARGET_HW_MACHINE TARGET_HW_MACHINE_ARCH for future use

2014-06-10 Thread Peter Maydell
On 8 June 2014 17:57, Sean Bruno wrote: "for future use" implies it should go in the patch (or at least the same patch series) as the code that uses these new defines :-) thanks -- PMM

Re: [Qemu-devel] [PATCH 05/10 v4] bsd-user: Implement new syscall print_sysarch and add strace support

2014-06-10 Thread Peter Maydell
On 8 June 2014 17:57, Sean Bruno wrote: > Signed-off-by: Sean Bruno > --- > bsd-user/freebsd/os-strace.h | 29 + > bsd-user/freebsd/strace.list | 2 +- > bsd-user/i386/syscall.h| 21 + > bsd-user/i386/target_arch_sysarch.h| 78 > +

Re: [Qemu-devel] [PATCH v2 08/17] target-arm: Add SCR_EL3

2014-06-10 Thread Aggeler Fabian
On 09 Jun 2014, at 17:04, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Signed-off-by: Edgar E. Iglesias > --- > target-arm/cpu.h| 15 +++ > target-arm/helper.c | 29 + > 2 files changed, 44 insertions(+) > > diff --git a/target-arm/cpu.h

[Qemu-devel] Using virtio for inter-VM communication

2014-06-10 Thread Henning Schild
Hi, i am working on the jailhouse[1] project and am currently looking at inter-VM communication. We want to connect guests directly with virtual consoles based on shared memory. The code complexity in the hypervisor should be minimal, it should just make the shared memory discoverable and provide

Re: [Qemu-devel] [PATCH] apb: Fix out-of-bounds array write access

2014-06-10 Thread Mark Cave-Ayland
On 09/06/14 15:19, Stefan Weil wrote: Hi Stefan, The array regs is declared with IOMMU_NREGS (3) elements and accessed using IOMMU_CTRL (0) and IOMMU_BASE (8). In most cases, those values are right shifted before being used as an index which results in indices 0 and 1. In one case, this right s

Re: [Qemu-devel] dataplane performance on s390

2014-06-10 Thread Paolo Bonzini
Il 10/06/2014 20:56, Karl Rister ha scritto: On 06/09/2014 08:40 PM, Fam Zheng wrote: On Mon, 06/09 15:43, Karl Rister wrote: Hi All I was asked by our development team to do a performance sniff test of the latest dataplane code on s390 and compare it against qemu.git. Here is a brief descrip

Re: [Qemu-devel] [PATCH v2 4/4] qemu-iotests: Test 0-length image for mirror

2014-06-10 Thread Eric Blake
On 06/08/2014 08:56 PM, Fam Zheng wrote: > All behavior and invariant should hold for images with 0 length, so > add a class to repeat all the tests in TestSingleDrive. > > Signed-off-by: Fam Zheng > --- > tests/qemu-iotests/041 | 9 ++--- > tests/qemu-iotests/041.out | 4 ++-- > 2 files

Re: [Qemu-devel] dataplane performance on s390

2014-06-10 Thread Karl Rister
On 06/09/2014 08:40 PM, Fam Zheng wrote: On Mon, 06/09 15:43, Karl Rister wrote: Hi All I was asked by our development team to do a performance sniff test of the latest dataplane code on s390 and compare it against qemu.git. Here is a brief description of the configuration, the testing done, a

Re: [Qemu-devel] [PATCH v2 2/4] mirror: Go through ready -> complete process for 0 len image

2014-06-10 Thread Eric Blake
On 06/08/2014 08:56 PM, Fam Zheng wrote: > When mirroring or active committing a zero length image, BLOCK_JOB_READY > is not reported now, instead the job completes because we short circuit > the mirror job loop. > > This is inconsistent with non-zero length images, and only confuses > management

Re: [Qemu-devel] [PATCH v2 1/4] blockjob: Add block_job_yield()

2014-06-10 Thread Eric Blake
On 06/08/2014 08:56 PM, Fam Zheng wrote: > This will unset busy flag and put coroutine to sleep, can be used to > wait for QMP complete/cancel. > > Signed-off-by: Fam Zheng > --- > blockjob.c | 14 ++ > include/block/blockjob.h | 8 > 2 files changed, 22 inser

[Qemu-devel] MPOL_MF_STRICT & hugetlbfs (was Re: [PATCH v3.1 25/31] hostmem: add properties for NUMAS memory policy)

2014-06-10 Thread Eduardo Habkost
On Mon, Jun 09, 2014 at 10:12:07AM +0800, Hu Tao wrote: [...] > > > > > > > mbind(ptr, sz, policy, maxnode ? backend->host_nodes : NULL, > > > > maxnode + 1, flags); > > > > > > > > > > > > (I am starting to wonder if it was worth dropping the libnuma > > > > requirement and implementing ou

Re: [Qemu-devel] [PATCH 1/3] virtio-blk: replace x-iothread with iothread link property

2014-06-10 Thread Paolo Bonzini
Il 10/06/2014 09:03, Stefan Hajnoczi ha scritto: @@ -193,6 +193,8 @@ static void s390_virtio_blk_instance_init(Object *obj) object_property_add_child(obj, "virtio-backend", OBJECT(&dev->vdev), NULL); object_unref(OBJECT(&dev->vdev)); qdev_alias_all_properties(DEVICE(&dev->vdev), ob

Re: [Qemu-devel] [PATCH 2/2] qom: add object_property_add_alias

2014-06-10 Thread Paolo Bonzini
Il 05/06/2014 13:23, Paolo Bonzini ha scritto: Similar to object_property_add_link, alias properties provide an alternative, non-canonical path to an object. In fact, external observers cannot distinguish alias properties from other links. Aliases differ from links in that they are immutable an

Re: [Qemu-devel] [PATCH v3 1/4] cpus: Define NMI callback

2014-06-10 Thread Alexander Graf
On 06/10/2014 06:29 PM, Paolo Bonzini wrote: Il 10/06/2014 16:48, Luiz Capitulino ha scritto: > The s390 restart interrupt is a per-vcpu interrupt, which we really > don't want to inject on _all_ vcpus. OTOH, we want to inject that > interrupt on any vcpu - we don't care which one it is. So I'd

Re: [Qemu-devel] Booting a guest with OVMF

2014-06-10 Thread Kashyap Chamarthy
On Tue, Jun 10, 2014 at 07:30:58PM +0200, Laszlo Ersek wrote: > On 06/10/14 19:16, Kashyap Chamarthy wrote: [. . .] > > > > Yes, I can, but will have to wait till tomorrow -- the contents of the > > script came down to 1.6G after trying to make an ISO as below. > > > > $ sudo dd bs=1k if=/d

Re: [Qemu-devel] Booting a guest with OVMF

2014-06-10 Thread Laszlo Ersek
On 06/10/14 19:16, Kashyap Chamarthy wrote: > On Tue, Jun 10, 2014 at 06:26:50PM +0200, Laszlo Ersek wrote: >> On 06/10/14 18:10, Kashyap Chamarthy wrote: > > [. . .] > >>> The USB stick is created with Fedora Rawhide image using this >>> script: http://people.freedesktop.org/~kay/installer/insta

[Qemu-devel] [PULL 20/25] cpu/x86: correctly set errors in x86_cpu_parse_featurestr

2014-06-10 Thread Michael Tokarev
From: Paolo Bonzini Because of the "goto out", the contents of local_err are leaked and lost. Signed-off-by: Paolo Bonzini Signed-off-by: Michael Tokarev --- target-i386/cpu.c | 17 +++-- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/target-i386/cpu.c b/target-i

[Qemu-devel] [PULL 15/25] target-microblaze: Delete unused sign_extend() function

2014-06-10 Thread Michael Tokarev
From: Peter Maydell The sign_extend() function is unused; delete it. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Signed-off-by: Michael Tokarev --- target-microblaze/translate.c | 13 - 1 file changed, 13 deletions(-) diff --git a/target-microblaze/translate.c

[Qemu-devel] [PULL 08/25] hw/sd/sd.c: Drop unused sd_acmd_type[] array

2014-06-10 Thread Michael Tokarev
From: Peter Maydell Drop the sd_acmd_type[] array: it is never used. (The equivalent sd_cmd_type[] array for normal commands is used to identify those commands whose argument includes the card address in the top 16 bits; but for app commands the card address is passed with the APP_CMD prefix, not

Re: [Qemu-devel] [PATCH v2] target-arm: implement PD0/PD1 bits for TTBCR

2014-06-10 Thread Peter Maydell
On 10 June 2014 18:00, Aggeler Fabian wrote: > Obviously not v2 but v3 (subject). Sorry for that, please ignore it as I am > going to resend. You don't need to resend just for that. Applied to target-arm.next. thanks -- PMM

[Qemu-devel] [PULL 09/25] util/qemu-sockets.c: Avoid unused variable warnings

2014-06-10 Thread Michael Tokarev
From: Peter Maydell The 'on' variable is never used, and 'off' is only used if IPV6_V6ONLY is defined; delete 'on' and move 'off' to the point where it is used. This avoids warnings from clang 3.4. Signed-off-by: Peter Maydell Signed-off-by: Michael Tokarev --- util/qemu-sockets.c |3 +--

Re: [Qemu-devel] Booting a guest with OVMF

2014-06-10 Thread Laszlo Ersek
On 06/10/14 18:10, Kashyap Chamarthy wrote: > This is disk image #3: > > > http://download.fedoraproject.org/pub/fedora/linux/updates/20/Images/x86_64/Fedora-x86_64-20-20140407-sda.qcow2 As I suspected, this disk image is inapproprite for UEFI virtual machines. $ guestfish --ro -a Fedora-x

Re: [Qemu-devel] [PATCH v2] rdma: Fix block during rdma migration

2014-06-10 Thread Juan Quintela
wrote: > From: Gonglei > > If the networking break or there's something wrong with rdma > device(ib0 with no IP) during rdma migration, the main_loop of > qemu will be blocked in rdma_destroy_id. I add rdma_ack_cm_event > to fix this bug. > > Signed-off-by: Mo Yuxiang > Signed-off-by: Gonglei >

Re: [Qemu-devel] Booting a guest with OVMF

2014-06-10 Thread Kashyap Chamarthy
On Tue, Jun 10, 2014 at 06:26:50PM +0200, Laszlo Ersek wrote: > On 06/10/14 18:10, Kashyap Chamarthy wrote: [. . .] > > The USB stick is created with Fedora Rawhide image using this > > script: http://people.freedesktop.org/~kay/installer/installer.sh > > > > $ sudo ./installer.sh /dev/sdb >

Re: [Qemu-devel] [PATCH v2 1/2] hw/arm/virt: Provide flash devices for boot ROMs

2014-06-10 Thread Paolo Bonzini
Il 10/06/2014 19:06, Peter Maydell ha scritto: Add two flash devices to the virt board, so that it can be used for running guests which want a bootrom image such as UEFI. We provide two flash devices to make it more convenient to provide both a read-only UEFI image and a read-write place to store

[Qemu-devel] [PULL 13/25] target-i386/translate.c: Remove unused tcg_gen_lshift()

2014-06-10 Thread Michael Tokarev
From: Peter Maydell The function tcg_gen_lshift() is unused; remove it. Signed-off-by: Peter Maydell Signed-off-by: Michael Tokarev --- target-i386/translate.c |8 1 file changed, 8 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 2359787..6fcd82

[Qemu-devel] [PULL 11/25] hw/intc/openpic: Remove unused function IRQ_testbit()

2014-06-10 Thread Michael Tokarev
From: Peter Maydell The IRQ_testbit() function is never used; remove it. Signed-off-by: Peter Maydell Signed-off-by: Michael Tokarev --- hw/intc/openpic.c |5 - 1 file changed, 5 deletions(-) diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c index 17136c9..08e0e19 100644 --- a/hw/in

[Qemu-devel] [PULL 18/25] vdi: remove double conversion

2014-06-10 Thread Michael Tokarev
From: Paolo Bonzini This should be a problem when running on big-endian machines. Signed-off-by: Paolo Bonzini Reviewed-by: Benoit Canet Reviewed-by: Stefan Weil Signed-off-by: Michael Tokarev --- block/vdi.c |1 - 1 file changed, 1 deletion(-) diff --git a/block/vdi.c b/block/vdi.c in

Re: [Qemu-devel] [PATCH v1 11/16] target-arm: Don't take interrupts targeting lower ELs

2014-06-10 Thread Aggeler Fabian
On 09 Jun 2014, at 01:43, Edgar E. Iglesias wrote: > On Sun, Jun 08, 2014 at 03:51:24PM +, Aggeler Fabian wrote: >> >> On 30 May 2014, at 09:28, Edgar E. Iglesias wrote: >> >>> From: "Edgar E. Iglesias" >>> >>> Signed-off-by: Edgar E. Iglesias >>> --- >>> target-arm/cpu.h | 7 +++

[Qemu-devel] [PATCH v2 1/2] hw/arm/virt: Provide flash devices for boot ROMs

2014-06-10 Thread Peter Maydell
Add two flash devices to the virt board, so that it can be used for running guests which want a bootrom image such as UEFI. We provide two flash devices to make it more convenient to provide both a read-only UEFI image and a read-write place to store guest-set UEFI config variables. The '-bios' com

[Qemu-devel] [PATCH v2 2/2] hw/arm/virt: Provide PL031 RTC

2014-06-10 Thread Peter Maydell
UEFI mandates that the platform must include an RTC, so provide one in 'virt', using the PL031. Signed-off-by: Peter Maydell --- hw/arm/virt.c | 30 ++ 1 file changed, 30 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index e658eb0..b60928e 100644 --- a/hw/

[Qemu-devel] [PATCH v2 0/2] hw/arm/virt: Add flash and RTC devices

2014-06-10 Thread Peter Maydell
These patches add a few extra devices to the 'virt' platform, mostly for the benefit of UEFI. * flash devices, so bootroms like UEFI have somewhere to live and somewhere to store their persistent variables * a PL031 RTC, since UEFI mandates an RTC I don't actually have a working UEFI image f

[Qemu-devel] [PATCH] hw/arm/vexpress: Forbid specifying flash contents in two ways at once

2014-06-10 Thread Peter Maydell
Detect attempts by the user to specify the contents fo the first flash device via both -bios and -drive if=pflash... simultaneously and print a helpful error message. Signed-off-by: Peter Maydell --- This rules out a nonsensical combination and matches what we're going to do with the 'virt' machi

Re: [Qemu-devel] [PATCH v2] target-arm: implement PD0/PD1 bits for TTBCR

2014-06-10 Thread Aggeler Fabian
Obviously not v2 but v3 (subject). Sorry for that, please ignore it as I am going to resend. Regards, Fabian On 10 Jun 2014, at 16:12, Fabian Aggeler wrote: > Corrected handling of writes to TTBCR for ARMv8 (previously UNK/SBZP > bits are not RES0) and ARMv7 (new bits PD0/PD1 for CPUs with Sec

Re: [Qemu-devel] [PULL 00/25] Trivial patches for 2014-06-10

2014-06-10 Thread Peter Maydell
", but I think such a really trivial > thing is fine ;) > > Please consider pulling. > > Thanks, > > /mjt > > The following changes since commit 3334e929ae2d01e47c3e64757ee7fcf975cede94: > > Merge remote-tracking branch 'remotes/kraxel/tags/pull-

[Qemu-devel] [PULL v3 0/8] build system and libcacard changes for 2014-06-10

2014-06-10 Thread Paolo Bonzini
The following changes since commit 7721a3044234c46cd6f5f899e7467dc9351f3c8d: Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140609-1' into staging (2014-06-09 17:04:13 +0100) are available in the git repository at: git://github.com/bonzini/qemu.git configure for yo

[Qemu-devel] [PULL 8/8] rules.mak: Rewrite unnest-vars

2014-06-10 Thread Paolo Bonzini
From: Fam Zheng The macro unnest-vars is the most important, complicated but hard to track magic in QEMU's build system. Rewrite it in a (hopefully) clearer way, with more comments, to make it easier to understand and maintain. Remove DSO_CFLAGS and module-objs-m that are not used. A bonus fix

[Qemu-devel] [PULL 25/25] virtio.c: fix error message

2014-06-10 Thread Michael Tokarev
Suggested-by: Peter Maydell Signed-off-by: Michael Tokarev --- hw/virtio/virtio.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 3557c17..a07ae8a 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -440,7 +440,7 @@ voi

Re: [Qemu-devel] [PATCH 1/2] hw/arm/virt: Provide flash devices for boot ROMs

2014-06-10 Thread Peter Maydell
On 10 June 2014 17:48, Paolo Bonzini wrote: > Il 10/06/2014 18:38, Peter Maydell ha scritto: >> Heh. How about: >> * if both bios_name and pflash drive 0 specified, this is an error >> * otherwise use whichever we have >> * (NB that bios_name + pflash drive 1 is a reasonable combination) > > >

Re: [Qemu-devel] [PULL 0/4] migration queue

2014-06-10 Thread Paolo Bonzini
Il 10/06/2014 18:31, Juan Quintela ha scritto: Hi This includes: - last two patches that remove version_minimum_id_old. - refactor of opening of files was already tested (this is test-vmstate only) - v4 of flags in ram_load from Peter. Please, apply. Juan. You missed the patch to change th

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