When running a helloworld program with qemu-i386 in linux-user
mode on Loongson 3A3000, it will crash. This patch fix the bug.
Signed-off-by: Jiang Biao
Signed-off-by: Richard Henderson
---
tcg/mips/tcg-target.inc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tcg
John Snow writes:
> On 07/07/2017 09:53 AM, Markus Armbruster wrote:
>> Vladimir Sementsov-Ogievskiy writes:
>>
>>> 07.07.2017 12:00, Markus Armbruster wrote:
"Daniel P. Berrange" writes:
> On Fri, Jul 07, 2017 at 10:05:22AM +0200, Markus Armbruster wrote:
>> Vladimir Sements
On 07/07/17 22:30, Eduardo Habkost wrote:
> object_resolve_path*() ambiguous path detection breaks when
> ambiguous==NULL and the object tree have 3 objects of the same type and
> only 2 of them are under the same parent. e.g.:
>
> /container/obj1 (TYPE_FOO)
> /container/obj2 (TYPE_FOO)
> /ob
On Fri, Jul 07, 2017 at 06:20:37PM -0300, Daniel Henrique Barboza wrote:
> "spapr: Remove 'awaiting_allocation' DRC flag" removed the flag that
> was originally was being used to prevent a race condition between
> hot unplug and hotplug. The DRC code base got simplified and more
> robust over time,
> > this section of code is to extend the addr_regl to 64bit, and use *base* as
> > temp
> > intermedia. The real intention could be to extend addr_regl into base, and
> > then
> > move base back to addr_regl for later use, but it wrongly assigning base to
> > addr_regl directly, which will
On 09.07.2017 09:49, Emilio G. Cota wrote:
> This check is redundant because it is already performed by the only
> caller of dump_exec_info -- the caller was updated by b7da97eef
> ("monitor: Check whether TCG is enabled before running the "info jit"
> code").
>
> Checking twice wouldn't necessari
On 07/09/2017 05:51 PM, Emilio G. Cota wrote:
On Sun, Jul 09, 2017 at 11:38:50 -1000, Richard Henderson wrote:
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
(snip)
I think it would be better to have a tb_htable_lookup_or_insert function,
which performs the insert iff a matching object isn't al
On 07/09/2017 05:15 PM, jiang.bi...@zte.com.cn wrote:
It lies in the following code,
> if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
> tcg_out_ext32u(s, base, addr_regl);
>addr_regl = base; //problem is here.
>}
this section of code is to extend the addr_regl to 64bi
On 07/09/2017 07:49 PM, Jiang Biao wrote:
When running a helloworld program with qemu-i386 in linux-user
mode on Loongson 3A3000, it will crash. The reasion is wrong
assigning from base to addr_regl directly. This patch fix the
bug.
Signed-off-by: Jiang Biao
Signed-off-by: Richard Henderson
--
When running a helloworld program with qemu-i386 in linux-user
mode on Loongson 3A3000, it will crash. The reasion is wrong
assigning from base to addr_regl directly. This patch fix the
bug.
Signed-off-by: Jiang Biao
Signed-off-by: Richard Henderson
---
tcg/mips/tcg-target.inc.c | 10 ++
在 7/9/2017 5:57 PM, Wang Dong 写道:
Hi,
I am new to QEMU. But I got some problem so that I want to figure it out.
So I try to debug qemu to see what happened.
And I found trace framework. I think this will help me understand the
point.
So I compiled qemu with option:
## *--enable-trace-back
On Sun, Jul 09, 2017 at 11:48:53 -1000, Richard Henderson wrote:
> On 07/09/2017 11:29 AM, Emilio G. Cota wrote:
(snip)
> >Exactly. Also, in user-mode "vCPU threads" (i.e. host threads) come and
> >go all the time, so this doesn't work well with having a single
> >code_gen_buffer, which I assumed w
On Sun, Jul 09, 2017 at 11:38:50 -1000, Richard Henderson wrote:
> On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
(snip)
> I think it would be better to have a tb_htable_lookup_or_insert function,
> which performs the insert iff a matching object isn't already there,
> returning the entry which *is*
> On 07/09/2017 04:04 PM, jiang.bi...@zte.com.cn wrote:
> > >> if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
> > >> tcg_out_ext32u(s, base, addr_regl)
> > >> -addr_regl = base
> > >> +tcg_out_mov(s, TCG_TYPE_PTR, addr_regl, base)
> > >> }
> > >> if
On 07/09/2017 04:04 PM, jiang.bi...@zte.com.cn wrote:
>> if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
>> tcg_out_ext32u(s, base, addr_regl);
>> -addr_regl = base;
>> +tcg_out_mov(s, TCG_TYPE_PTR, addr_regl, base);
>> }
>> if (guest_base == 0 && d
>> if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
>> tcg_out_ext32u(s, base, addr_regl)
>> -addr_regl = base
>> +tcg_out_mov(s, TCG_TYPE_PTR, addr_regl, base)
>> }
>> if (guest_base == 0 && data_regl != addr_regl) {
>> base = addr_regl
>
> Th
On Sun, 07/09 18:06, Peter Maydell wrote:
> The function vmdk_read_cid() can fail if the read on the underlying
> block device fails, or if there's a format error in the VMDK file.
> However its API doesn't provide a mechanism to report these errors,
> and in some cases we were returning a CID of 0
On 2017-07-07 23:26, Eric Blake wrote:
> On 07/07/2017 09:30 AM, Pavel Butsykin wrote:
>> This patch add shrinking of the image file for qcow2. As a result, this
>> allows
>> us to reduce the virtual image size and free up space on the disk without
>> copying the image. Image can be fragmented and
On 2017-07-07 16:30, Pavel Butsykin wrote:
> This patch add shrinking of the image file for qcow2. As a result, this allows
> us to reduce the virtual image size and free up space on the disk without
> copying the image. Image can be fragmented and shrink is done by punching
> holes
> in the image
Peter Maydell, on dim. 09 juil. 2017 22:21:01 +0100, wrote:
> Ping^2 ?
I'm sorry I'm still too busy ATM, it's still far in my mbox.
Samuel
On 07/09/2017 11:29 AM, Emilio G. Cota wrote:
On Sun, Jul 09, 2017 at 11:19:37 -1000, Richard Henderson wrote:
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
This allows us to generate TCG code in parallel. MTTCG already uses
it, although the next commit pushes down a lock to actually
perform pa
On 07/09/2017 11:14 AM, Emilio G. Cota wrote:
On Sun, Jul 09, 2017 at 10:45:55 -1000, Richard Henderson wrote:
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
+/* includes aborted translations because of exceptions */
+atomic_set(&prof->tb_count1, prof->tb_count1 + 1);
Again, atomic_set
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
+if (!have_tb_lock) {
+TranslationBlock *t;
+
+tb_lock();
+/*
+ * There's a chance that our desired tb has been translated while
+ * we were translating it.
+ */
+t = tb_htable_lookup(cpu, pc
On 2017-07-07 16:30, Pavel Butsykin wrote:
> Whenever l2/refcount table clusters are discarded from the file we can
> automatically drop unnecessary content of the cache tables. This reduces
> the chance of eviction useful cache data and eliminates inconsistent data
> in the cache with the data in
On Sun, Jul 09, 2017 at 11:19:37 -1000, Richard Henderson wrote:
> On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
> >This allows us to generate TCG code in parallel. MTTCG already uses
> >it, although the next commit pushes down a lock to actually
> >perform parallel generation.
> >
> >User-mode is
Ping^2 ?
thanks
-- PMM
On 26 June 2017 at 13:24, Peter Maydell wrote:
> Ping for review?
>
> thanks
> -- PMM
>
> On 5 June 2017 at 17:19, Peter Maydell wrote:
>> At the moment the slirp sosendoob() function doesn't properly
>> handle errors from slirp_send(), and its callers don't do
>> anythin
On 2017-07-07 23:12, Eric Blake wrote:
> On 07/07/2017 09:30 AM, Pavel Butsykin wrote:
>> The flag as additional precaution of data loss. Perhaps in the future the
>
> s/as/is/ s/of/against/
>
>> operation shrink without this flag will be blocked for all formats, but while
>
> s/while/for now/
>
On Sun, Jul 09, 2017 at 16:56:23 -0400, Emilio G. Cota wrote:
> On Sun, Jul 09, 2017 at 10:00:01 -1000, Richard Henderson wrote:
> > On 07/08/2017 09:49 PM, Emilio G. Cota wrote:
> > >+atomic_set(&env->tlb_flush_count, env->tlb_flush_count + 1);
> >
> > Want atomic_read here, so they're all th
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
This allows us to generate TCG code in parallel. MTTCG already uses
it, although the next commit pushes down a lock to actually
perform parallel generation.
User-mode is kept out of this: contention due to concurrent translation
is more commonly foun
On Sun, Jul 09, 2017 at 10:45:55 -1000, Richard Henderson wrote:
> On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
> >+/* includes aborted translations because of exceptions */
> >+atomic_set(&prof->tb_count1, prof->tb_count1 + 1);
>
> Again, atomic_set without atomic_read is pointless.
> Ei
Coverity (CID 1355236) points out that get_image_offset() doesn't check that
it actually succeeded in writing the updated block bitmap to the file.
Check the error return from bdrv_pwrite_sync() and propagate an error
response back up to the function which calls get_image_offset() for
a write so th
On Sun, Jul 09, 2017 at 10:48:27 -1000, Richard Henderson wrote:
> On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
> >@@ -409,6 +411,18 @@ void tcg_context_init(TCGContext *s)
> > }
> > /*
> >+ * Clone the initial TCGContext. Used by TCG threads to copy the TCGContext
> >+ * set up by their parent
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
I was not sure about tci_regs. From code inspection it seems that
they have to be per-thread, so I converted them, but I do not think
anyone has ever tried to get MTTCG working with TCI.
Yes, those should be per-thread.
Really, they should be on th
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
+static void code_gen_set_region_size(TCGContext *s)
+{
+size_t per_cpu = s->code_gen_buffer_size / smp_cpus;
+size_t div;
+
+assert(per_cpu);
+/*
+ * Use a single region if all we have is one vCPU.
+ * We could also use a sing
From: Pranavkumar Sawargaonkar
Let's provide the GPEX host bridge with the INTx/gsi mapping. This is
needed for INTx/gsi routing.
Signed-off-by: Pranavkumar Sawargaonkar
Signed-off-by: Tushar Jagad
Signed-off-by: Eric Auger
---
hw/arm/virt.c | 4
1 file changed, 4 insertions(+)
diff --
From: Pranavkumar Sawargaonkar
Now we are able to retrieve the gsi from the INTx pin, let's
enable intx_to_irq routing. From that point on, irqfd becomes
usable along with INTx when assigning a PCIe device.
Signed-off-by: Pranavkumar Sawargaonkar
Signed-off-by: Tushar Jagad
Signed-off-by: Eric
From: Pranavkumar Sawargaonkar
To implement INTx to gsi routing we need to pass the gpex host
bridge the gsi associated to each INTx index. Let's introduce
irq_num array and gpex_set_irq_num setter function.
Signed-off-by: Pranavkumar Sawargaonkar
Signed-off-by: Tushar Jagad
Signed-off-by: Eri
This series implements INTx to gsi routing for ARM VIRT/Gpex. This is
a respin of [1] which was lost in limbo.
ARM virt uses GPEX PCIe bridge. This latter does not implement INTx
to GSI routing. PCIe/INTx assignment works but the consequence is
irqfd is not used along with INTx interrupts and VFIO
On Sun, Jul 09, 2017 at 10:33:41 -1000, Richard Henderson wrote:
> On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
> > #if defined(DEBUG_TB_FLUSH)
> >+nb_tbs = g_tree_nnodes(tcg_ctx.tb_ctx.tb_tree);
> > printf("qemu: flush code_size=%ld nb_tbs=%d avg_tb_size=%ld\n",
> >(unsigned l
In case the MSI is translated by an IOMMU we need to fixup the
MSI route with the translated address.
Signed-off-by: Eric Auger
---
It is still unclear to me if we need to register an IOMMUNotifier
to handle any change in the MSI doorbell which would occur behind
the scene and would not lead to
From: Prem Mallappa
This patch builds the smmuv3 node in the ACPI IORT table.
The RID space of the root complex, which spans 0x0-0x1
maps to streamid space 0x0-0x1 in smmuv3, which in turn
maps to deviceid space 0x0-0x1 in the ITS group.
The guest must feature the IOMMU probe deferr
On Sun, Jul 09, 2017 at 10:00:01 -1000, Richard Henderson wrote:
> On 07/08/2017 09:49 PM, Emilio G. Cota wrote:
> >+atomic_set(&env->tlb_flush_count, env->tlb_flush_count + 1);
>
> Want atomic_read here, so they're all the same.
It's not needed. Note that this thread is the only one ever wri
For VFIO integration we need to update physical IOMMU mappings
each time the guest updates the vIOMMU translation structures.
For that, we rely on a special smmuv3 option, "tlbi-on-map"
which forces TLB invalidations on map (this mode is similar to
the Intel VTD caching Mode). The smmuv3 driver the
The new machine type allows smmuv3 instantiation. A new option
is introduced to turn the feature on/off (off by default).
Signed-off-by: Eric Auger
---
Another alternative would be to use the -device option as
done on x86. As the smmu is a sysbus device, we would need to
use the platform bus fr
This patch allows doing PCIe passthrough with a guest exposed
with a vSMMUv3. It implements the replay and notify_flag_changed
iommu ops. Also on TLB and data structure invalidation commands,
we replay the mappings so that the physical IOMMU implements
updated stage 1 settings (Guest IOVA -> Guest
From: Prem Mallappa
Add code to instantiate an smmu-v3 in mach-virt. A new boolean flag
is introduced in VirtMachineState to allow this instantiation. It
is currently false.
Signed-off-by: Prem Mallappa
Signed-off-by: Eric Auger
---
v4 -> v5:
- add dma-coherent property
v2 -> v3:
- vbi was r
From: Prem Mallappa
Introduces the SMMUv3 derived model. This is based on
System MMUv3 specification (v17).
Signed-off-by: Prem Mallappa
Signed-off-by: Eric Auger
---
v4 -> v5:
- change smmuv3_translate proto (IOMMUAccessFlags flag)
- has_stagex replaced by is_ste_stagex
- smmu_cfg_populate r
This series implements the emulation code for ARM SMMUv3.
This is the continuation of Prem's work [1].
This v5 mainly brings VFIO integration in DT mode. On guest kernel
side, this requires a quirk [1] to force TLB invalidation on map.
The following changes also are noticeable:
- fix SMMU_CMDQ_CO
Introduces the base device and class for the ARM smmu.
Implements VMSAv8-64 table lookup and translation. VMSAv8-32
is not implemented.
Signed-off-by: Eric Auger
Signed-off-by: Prem Mallappa
---
v4 -> v5:
- add initial level in translation config
- implement block pte
- rename must_translate in
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
@@ -409,6 +411,18 @@ void tcg_context_init(TCGContext *s)
}
/*
+ * Clone the initial TCGContext. Used by TCG threads to copy the TCGContext
+ * set up by their parent thread via tcg_context_init().
+ */
+void tcg_context_clone(TCGContext *s)
+
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
Will come in handy very soon.
Signed-off-by: Emilio G. Cota
---
tcg/tcg.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson
r~
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
+/* includes aborted translations because of exceptions */
+atomic_set(&prof->tb_count1, prof->tb_count1 + 1);
Again, atomic_set without atomic_read is pointless.
Either you're trying to give the compiler extra information, or you aren't.
A
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
Before we make TCGContext thread-local. Once that is done, iterating
over all TCG contexts will be quite useful; for instance we
will need it to gather profiling info from each TCGContext.
A possible alternative would be to keep an array of TCGContex
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
Before we make TCGContext thread-local.
Signed-off-by: Emilio G. Cota
---
include/exec/gen-icount.h | 7 +++
tcg/tcg.h | 2 ++
2 files changed, 5 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson
r~
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
Before TCGContext is made thread-local.
The hash table becomes read-only after it is filled in,
so we can save space by keeping just a global pointer to it.
Signed-off-by: Emilio G. Cota
---
tcg/tcg.h | 2 --
tcg/tcg.c | 10 +-
2 files
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
In order to use glib's binary search tree we embed a helper struct
in TranslationBlock to allow us to compare tb's based on their
tc_ptr as well as their tc_size fields.
Using an anon struct really doesn't help. You're effectively using two
differ
On 2017-06-13 22:20, Max Reitz wrote:
> === Series dependencies ===
>
> This series depends on v7 of Stefan's series
> "qemu-img: add measure sub-command"
> (http://lists.nongnu.org/archive/html/qemu-devel/2017-06/msg03035.html).
>
>
> === Actual cover letter ===
>
> This series adds preallocat
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
To avoid wasting a byte. I don't have any use in mind for this byte,
but I think it's good to leave this byte explicitly free for future use.
See this discussion for how the u16 came to be:
https://lists.gnu.org/archive/html/qemu-devel/2016-07/msg0
On 07/08/2017 09:50 PM, Emilio G. Cota wrote:
Signed-off-by: Emilio G. Cota
---
tcg/mips/tcg-target.inc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Richard Henderson
r~
On 07/08/2017 09:49 PM, Emilio G. Cota wrote:
Signed-off-by: Emilio G. Cota
---
tcg/i386/tcg-target.inc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Richard Henderson
r~
On 07/08/2017 09:49 PM, Emilio G. Cota wrote:
It is only used by this object, and it's not exported to any other.
Signed-off-by: Emilio G. Cota
---
accel/tcg/translate-all.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Richard Henderson
r~
On 07/08/2017 09:49 PM, Emilio G. Cota wrote:
Whenever there is an overflow in code_gen_buffer (e.g. we run out
of space in it and have to flush it), the code_time profiling counter
ends up with an invalid value (that is, code_time -= profile_getclock(),
without later on getting += profile_getclo
On 07/08/2017 09:49 PM, Emilio G. Cota wrote:
+atomic_set(&env->tlb_flush_count, env->tlb_flush_count + 1);
Want atomic_read here, so they're all the same.
Otherwise,
Reviewed-by: Richard Henderson
r~
On 07/08/2017 09:49 PM, Emilio G. Cota wrote:
This check is redundant because it is already performed by the only
caller of dump_exec_info -- the caller was updated by b7da97eef
("monitor: Check whether TCG is enabled before running the "info jit"
code").
Checking twice wouldn't necessarily be t
On 07/08/2017 09:49 PM, Emilio G. Cota wrote:
Commit e7b161d573 ("vl: add tcg_enabled() for tcg related code") adds
a check to exit the program when !tcg_enabled() while parsing the -tb-size
flag.
It turns out that when the -tb-size flag is evaluated, tcg_enabled() can
only return 0, since it is
On 2017-07-05 14:57, Stefan Hajnoczi wrote:
> v9:
> * Fix swapped fmt <-> output_fmt parameters in documentation [Max]
Oh, it was just the wrong way around there.
> * Clarify that backing file clusters also available in the new image
>file *may* be ommitted from the calculation [Max]
[...]
On 2017-07-08 01:21, Alistair Francis wrote:
> Convert all uses of error_report("[Ww]arning:"... to use warn_report()
> instead. This helps standardise on a single method of printing warnings
> to the user.
>
> All of the warnings were changed using this command:
> find ./* -type f -exec sed -
On Sun, Jul 09, 2017 at 03:49:52 -0400, Emilio G. Cota wrote:
> The series applies on top of the current master (b11365867568).
It's a lot of patches -- you can fetch them from:
https://github.com/cota/qemu/commits/multi-tcg
Note that there's a patch in the branch there that is not part
of the
In a fork_exec() error path we try to closesocket(s) when s might
be a negative number because the thing that failed was the
qemu_socket() call. Add a guard so we don't do this.
(Spotted by Coverity: CID 1005727 issue 1 of 2.)
Signed-off-by: Peter Maydell
---
Issue 2 of 2 in CID 1005727 is trick
On 2017-07-06 16:30, Markus Armbruster wrote:
> Max Reitz writes:
>
>> This generic function (along with its implementations for different
>> types) determines whether two QObjects are equal.
>>
>> Signed-off-by: Max Reitz
>> ---
>> Markus also proposed just reporting two values as unequal if th
On 2017-07-05 22:05, Eric Blake wrote:
> On 07/05/2017 02:04 PM, Max Reitz wrote:
>> Add a new test file (check-qobject.c) for unit tests that concern
>> QObjects as a whole.
>>
>> Its only purpose for now is to test the qobject_is_equal() function.
>>
>> Signed-off-by: Max Reitz
>> ---
>> tests/
On 2017-07-05 21:49, Eric Blake wrote:
> On 07/05/2017 02:04 PM, Max Reitz wrote:
>> This generic function (along with its implementations for different
>> types) determines whether two QObjects are equal.
>>
>> Signed-off-by: Max Reitz
>> ---
>> Markus also proposed just reporting two values as u
On 13 June 2017 at 17:46, Kevin Wolf wrote:
> Am 13.06.2017 um 18:12 hat Peter Maydell geschrieben:
>> On 7 June 2017 at 18:50, Kevin Wolf wrote:
>> > diff --git a/block/commit.c b/block/commit.c
>> > index a3028b2..af6fa68 100644
>> > --- a/block/commit.c
>> > +++ b/block/commit.c
>> > @@ -89,6
The function vmdk_read_cid() can fail if the read on the underlying
block device fails, or if there's a format error in the VMDK file.
However its API doesn't provide a mechanism to report these errors,
and in some cases we were returning a CID of 0 and in some cases a
CID of 0x, either of
Check the return status of the xen_host_pci_get_* functions we call in
xen_pt_msix_init(), and fail device init if the reads failed rather than
ploughing ahead. (Spotted by Coverity: CID 777338.)
Signed-off-by: Peter Maydell
---
Disclaimer: compile tested only!
The only other Xen-related Coverit
I just made a documentation page for the LatticeMicro32 target. I need to know
its current status, how much of this system is implemented, what software runs
on it. If anyone could supply more information that would be appreciated.
Pictures of this target running would be great as well. Thanks.
Hi,
I am new to QEMU. But I got some problem so that I want to figure it out.
So I try to debug qemu to see what happened.
And I found trace framework. I think this will help me understand the point.
So I compiled qemu with option:
## *--enable-trace-backends=simple*
And did as the docs/tra
On Thu, Jul 06, 2017 at 16:26:52 -0400, Emilio G. Cota wrote:
> On Tue, Jul 04, 2017 at 13:12:02 +0200, Paolo Bonzini wrote:
> > Reviewed-by: Richard Henderson
> > Signed-off-by: Paolo Bonzini
(snip)
> > +++ b/accel/tcg/translate-all.c
> > @@ -1851,6 +1851,11 @@ void dump_exec_info(FILE *f, fprin
In preparation for having multiple TCG threads.
The naive solution here is to split code_gen_buffer statically
among the TCG threads; this however results in poor utilization
if translation needs are different across TCG threads.
What we do here is to add an extra layer of indirection, assigning
This is a prerequisite for having threads generate code on separate
buffers, which will help scalability when booting multiple cores
under MTTCG.
For this we need a new field (.tc_size) in TranslationBlock to keep
track of the size of the translated code. This field is added into
a 4-byte hole tha
Before we make TCGContext thread-local. Once that is done, iterating
over all TCG contexts will be quite useful; for instance we
will need it to gather profiling info from each TCGContext.
A possible alternative would be to keep an array of TCGContext pointers.
However this option however is not t
Before we make TCGContext thread-local.
Signed-off-by: Emilio G. Cota
---
tcg/tcg.h | 1 +
tcg/tcg.c | 14 ++
2 files changed, 15 insertions(+)
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 2a64ee2..be5f3fd 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -778,6 +778,7 @@ static inline void *t
Reviewed-by: Richard Henderson
Signed-off-by: Emilio G. Cota
---
include/exec/exec-all.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 8096d64..8326e7d 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-a
To avoid wasting a byte. I don't have any use in mind for this byte,
but I think it's good to leave this byte explicitly free for future use.
See this discussion for how the u16 came to be:
https://lists.gnu.org/archive/html/qemu-devel/2016-07/msg04564.html
We could use a bool but in some systems
Will come in handy very soon.
Signed-off-by: Emilio G. Cota
---
tcg/tcg.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index c19c473..2f003a0 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -115,6 +115,8 @@ static int tcg_target_const_match(tcg_target_lo
This opens up a 4-byte hole to be used by upcoming work.
Note that moving this field to the 2nd cache line of the struct
does not affect performance: tb->page_addr is in the 2nd cache
line as well, and both are accessed during code lookup. Besides,
the tb->invalid check is easily predicted.
Signe
Whenever there is an overflow in code_gen_buffer (e.g. we run out
of space in it and have to flush it), the code_time profiling counter
ends up with an invalid value (that is, code_time -= profile_getclock(),
without later on getting += profile_getclock() due to the goto).
Fix it by using the ti v
Before TCGContext is made thread-local.
The hash table becomes read-only after it is filled in,
so we can save space by keeping just a global pointer to it.
Signed-off-by: Emilio G. Cota
---
tcg/tcg.h | 2 --
tcg/tcg.c | 10 +-
2 files changed, 5 insertions(+), 7 deletions(-)
diff --g
Before TCGContext is made thread-local.
Reviewed-by: Richard Henderson
Signed-off-by: Emilio G. Cota
---
include/exec/tb-context.h | 2 ++
tcg/tcg.h | 2 --
accel/tcg/cpu-exec.c | 2 +-
accel/tcg/translate-all.c | 57 +++
linux
Original RFC here:
https://lists.nongnu.org/archive/html/qemu-devel/2017-06/msg06874.html
I included Richard's feedback (Thanks!) from the original RFC, and
added quite a few things. This is now a proper PATCHset since it is
a lot more mature.
Highlights:
- It works! I tested single/multi-threa
This allows us to generate TCG code in parallel. MTTCG already uses
it, although the next commit pushes down a lock to actually
perform parallel generation.
User-mode is kept out of this: contention due to concurrent translation
is more commonly found in full-system mode.
This patch is fairly sma
This check is redundant because it is already performed by the only
caller of dump_exec_info -- the caller was updated by b7da97eef
("monitor: Check whether TCG is enabled before running the "info jit"
code").
Checking twice wouldn't necessarily be too bad, but here the check also
returns with tb_
Each vCPU can now generate code with TCG in parallel. Thus,
drop tb_lock around code generation in softmmu.
Note that we still have to take tb_lock after code translation,
since there is global state that we have to update.
Nonetheless holding tb_lock for less time provides significant performanc
Commit e7b161d573 ("vl: add tcg_enabled() for tcg related code") adds
a check to exit the program when !tcg_enabled() while parsing the -tb-size
flag.
It turns out that when the -tb-size flag is evaluated, tcg_enabled() can
only return 0, since it is set (or not) much later by configure_accelerato
Before we make TCGContext thread-local.
Signed-off-by: Emilio G. Cota
---
include/exec/gen-icount.h | 7 +++
tcg/tcg.h | 2 ++
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index 9b3cb14..489aff7 100644
--
Signed-off-by: Emilio G. Cota
---
tcg/mips/tcg-target.inc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index 8cff9a6..790b4fc 100644
--- a/tcg/mips/tcg-target.inc.c
+++ b/tcg/mips/tcg-target.inc.c
@@ -2323,7 +2323,7 @@
Commit f0aff0f124 ("cputlb: add assert_cpu_is_self checks") buried
the increment of tlb_flush_count under TLB_DEBUG. This results in
"info jit" always (mis)reporting 0 TLB flushes when !TLB_DEBUG.
Besides, under MTTCG tlb_flush_count is updated by several threads,
so in order not to lose counts we
It is only used by this object, and it's not exported to any other.
Signed-off-by: Emilio G. Cota
---
accel/tcg/translate-all.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 72ce445..2fa9f65 100644
--- a/accel/tcg/
TCGContext is about to be made thread-local. To avoid scalability issues
when profiling info is enabled, this patch makes the profiling info counters
distributed via the following changes:
1) Consolidate profile info into its own struct, TCGProfile, which
TCGContext also includes. Note that tcg
Since commit 6e3b2bfd6 ("tcg: allocate TB structs before the
corresponding translated code") we are not fully utilizing
code_gen_buffer for translated code, and therefore are
incorrectly reporting the amount of translated code as well as
the average host TB size. Address this by:
- Making the cons
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