Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

❦ 8 janvier 2018 21:19 -0200, Eduardo Habkost  : >> > GET_SUPPORTED_CPUID seems to still return PCID as supported >> > without EPT, doesn't it? >> >> Indeed it is! It will also be useful for KPTI performance without >> INVPCID, but it won't be useful without EPT. > > Well, I can live with "not

[Qemu-devel] [PATCH x86-next v2] target-i386: add PCID flag to Westmere, Sandy Bridge and Ivy Bridge

PCID has been introduced in Westmere and, since Linux 3.6 (ad756a1603c5), KVM exposes PCID flag if host has it. Update CPU model for Westmere, Sandy Bridge and Ivy Bridge accordingly. Ensure compat 2.11 keeps PCID disabled by default for those models and document the new requirement for host kerne

Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

❦ 8 janvier 2018 20:56 -0200, Eduardo Habkost  : > (BTW, is PCID useful for KPTI performance without INVPCID?) It seems it is: https://mail-archive.com/linux-kernel@vger.kernel.org/msg1576774.html -- Don't use conditional branches as a substitute for a logical expression. - The E

Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

❦ 8 janvier 2018 17:37 -0500, Paolo Bonzini  : >> One possible way to work around this problem is to declare that >> QEMU 2.12 with KVM will require Linux v3.6 and newer (because we >> need Linux kernel commit ad756a1603c5 "KVM: VMX: Implement >> PCID/INVPCID for guests with EPT"). > > Note that

Re: [Qemu-devel] [Qemu-block] [PATCH 0/2] qemu-img: Let "info" warn and go ahead without -U

On Mon, 01/08 18:57, Kevin Wolf wrote: > I'm not sure if going back to the old behaviour for a while now would be > helpful, you'd just end up with an even more confusing set of qemu > versions, for example: > > <= 2.9 - works without a warning > 2.10 and 2.11 - errors out >

Re: [Qemu-devel] [PATCH] irq: fix memory leak

On Mon, Dec 25, 2017 at 10:47:04AM +0800, linzhecheng wrote: > entry is moved from list but is not freed. > > Signed-off-by: linzhecheng Makes sense. Reviewed-by: Michael S. Tsirkin > diff --git a/target/i386/kvm.c b/target/i386/kvm.c > index 351b64f77c..3c920db79a 100644 > --- a/target/i386

Re: [Qemu-devel] [PULL 00/25] pc, pci, virtio: features, fixes, cleanups

On Mon, Jan 08, 2018 at 09:14:41AM +, Peter Maydell wrote: > On 21 December 2017 at 23:43, Michael S. Tsirkin wrote: > >> you also need to drop "hw/pci: remove obsolete PCIDevice->init()" > >> (applied in your tree as 18951fce55d5aa58cd1629b4cb704ee51bab4420) > >> else the not-yet-QOM'ified NV

Re: [Qemu-devel] [PULL 00/25] pc, pci, virtio: features, fixes, cleanups

On Tue, Jan 09, 2018 at 12:10:10PM +1100, David Gibson wrote: > On Mon, Jan 08, 2018 at 08:10:23PM +0200, Michael S. Tsirkin wrote: > > On Mon, Jan 08, 2018 at 09:14:41AM +, Peter Maydell wrote: > > > On 21 December 2017 at 23:43, Michael S. Tsirkin wrote: > > > >> you also need to drop "hw/pc

Re: [Qemu-devel] [qemu-web PATCH] add a blog post about "Spectre"

On Thu, 01/04 18:56, Paolo Bonzini wrote: > +be required for non-x86 processors. If so, they will also posted to the Hi Paolo, they will also "be" posted? Fam

[Qemu-devel] [RFC PATCH v2 9/9] hw/arm/xlnx-zynqmp: use Linux FDT names

Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/xlnx-zynqmp.c | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 325642058b..fdcd6801b6 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -24,6 +24,7 @

[Qemu-devel] [RFC PATCH v2 8/9] hw/dma/xlnx_dpdma: add 'xlnx, axi-dpdma-1.0' FDT alias

Signed-off-by: Philippe Mathieu-Daudé --- hw/dma/xlnx_dpdma.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/dma/xlnx_dpdma.c b/hw/dma/xlnx_dpdma.c index 8ceb21ddb3..d1b508cfe3 100644 --- a/hw/dma/xlnx_dpdma.c +++ b/hw/dma/xlnx_dpdma.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #incl

[Qemu-devel] [RFC PATCH v2 6/9] hw/usb/hcd-ehci: add 'xlnx, ps7-usb' FDT aliases

Signed-off-by: Philippe Mathieu-Daudé --- hw/usb/hcd-ehci-sysbus.c | 8 1 file changed, 8 insertions(+) diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c index 3b83beb140..0c1a995c2f 100644 --- a/hw/usb/hcd-ehci-sysbus.c +++ b/hw/usb/hcd-ehci-sysbus.c @@ -16,6 +16,7 @@

[Qemu-devel] [RFC PATCH v2 7/9] hw/ssi/xlnx-spips: add 'xlnx.zynq-qspi' FDT alias

Signed-off-by: Philippe Mathieu-Daudé --- hw/ssi/xilinx_spips.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index d8187fadd1..9f7edc7a14 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -24,6 +24,7 @@ #include "qemu/osdep

[Qemu-devel] [RFC PATCH v2 4/9] hw/timer/cadence_ttc: add FDT aliases

Signed-off-by: Philippe Mathieu-Daudé --- hw/timer/cadence_ttc.c | 8 1 file changed, 8 insertions(+) diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c index 5e65fdb5a0..9aff19d3a5 100644 --- a/hw/timer/cadence_ttc.c +++ b/hw/timer/cadence_ttc.c @@ -18,6 +18,7 @@ #include

[Qemu-devel] [RFC PATCH v2 5/9] hw/dma/axidma: add 'xlnx, eth-dma' FDT alias

Signed-off-by: Philippe Mathieu-Daudé --- hw/dma/xilinx_axidma.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index 9b48103574..2359d5c114 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -24,6 +24,7 @@ #include "qemu/

[Qemu-devel] [RFC PATCH v2 2/9] hw/char/cadence_uart: add FDT aliases

Signed-off-by: Philippe Mathieu-Daudé --- hw/char/cadence_uart.c | 12 1 file changed, 12 insertions(+) diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c index 6143494060..f164cee61d 100644 --- a/hw/char/cadence_uart.c +++ b/hw/char/cadence_uart.c @@ -23,6 +23,7 @@ #in

[Qemu-devel] [RFC PATCH v2 0/9] resolv device by Flattened Device Tree alias name

Hi, This RFC series is intended to simplify Flattened Device Tree support, in particular the 'compatible' FDT entry, when Linux names mismatches QEMU ones, but this is the same device modelled. So far this is only a 'proof of concept'. To see how the qtests perform, I only modified the Xilinx Zy

[Qemu-devel] [RFC PATCH v2 3/9] hw/net/cadence_gem: add FDT aliases

Signed-off-by: Philippe Mathieu-Daudé --- hw/net/cadence_gem.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 3943187572..34ff738bf7 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -25,6 +25,7 @@ #include "qemu/os

[Qemu-devel] [RFC PATCH v2 1/9] hw/sysbus: add helpers to register FDT aliases

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/sysbus-fdt.h | 18 ++ hw/core/sysbus-fdt.c| 30 ++ hw/core/Makefile.objs | 1 + 3 files changed, 49 insertions(+) create mode 100644 include/hw/sysbus-fdt.h create mode 100644 hw/core/sysbus-

Re: [Qemu-devel] [PULL 00/25] pc, pci, virtio: features, fixes, cleanups

On Mon, Jan 08, 2018 at 08:10:23PM +0200, Michael S. Tsirkin wrote: > On Mon, Jan 08, 2018 at 09:14:41AM +, Peter Maydell wrote: > > On 21 December 2017 at 23:43, Michael S. Tsirkin wrote: > > >> you also need to drop "hw/pci: remove obsolete PCIDevice->init()" > > >> (applied in your tree as

Re: [Qemu-devel] What's needed to pass pciid cpu flag to guest?

> Am 08.01.2018 um 19:58 schrieb Stefan Priebe - Profihost AG > : > > Hello, > > for meltdown mitigation and performance it's important to have the pcid > flag passed down to the guest (f.e. > https://groups.google.com/forum/m/#!topic/mechanical-sympathy/L9mHTbeQLNU). > > My host shows the fl

Re: [Qemu-devel] [PATCH] hw/block: Fix pin-based interrupt behaviour of NVMe

Thank you for applying my patch. > I had to resolve conflicts with the tracing patches and chose to keep > the trace points from pci_irq_pulse() for pci_irq_assert(), but didn't > add them to pci_irq_deassert(). Please check if this makes sense to you. It makes sense for now. I will send another

Re: [Qemu-devel] [PATCH v6 04/29] hw/arm: Replace fprintf(stderr, "*\n" with error_report()

On Tue, Jan 2, 2018 at 4:59 AM, Markus Armbruster wrote: > Alistair Francis writes: > >> On Fri, Dec 22, 2017 at 12:30 PM, Markus Armbruster >> wrote: >>> Alistair Francis writes: >>> On Fri, Dec 22, 2017 at 9:17 AM, Thomas Huth wrote: > On 22.12.2017 16:37, Markus Armbruster wrote:

Re: [Qemu-devel] [PATCH v3 33/42] hw/arm/bcm2835_peripherals: implement SDHCI Spec v3

> From: Philippe Mathieu-Daudé [mailto:philippe.mathieu.da...@gmail.com] > Sent: Friday, 29 December 2017 09:49 > > Signed-off-by: Philippe Mathieu-Daudé > --- > > Note, the bcm2835 seems to have 1KB minimum blocksize, however the > current > model is implemented with 512B. > > Can someone with

Re: [Qemu-devel] [PATCH] linux-user: MIPS set cpu to r6 CPU if binary is R6

Peter, Riku, what do you think of the idea of using the ELF header to select the CPU to emulate? Thanks, Laurent Le 19/12/2017 à 12:50, YunQiang Su a écrit : > MIPS r6 is not just simple super set for pre-R6, > it also drops some instruction and even changes encoding for some. > But r6 binary ha

Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

On Mon, Jan 08, 2018 at 06:09:30PM -0500, Paolo Bonzini wrote: > > > - Original Message - > > From: "Eduardo Habkost" > > To: "Paolo Bonzini" > > Cc: "Vincent Bernat" , "Richard Henderson" > > , qemu-devel@nongnu.org > > Sent: Monday, January 8, 2018 11:56:25 PM > > Subject: Re: [PATCH

[Qemu-devel] [PATCH 6/6] target/m68k: add HMP command "info tlb"

Dump MMU state and address mappings. Signed-off-by: Laurent Vivier --- CC: Dr. David Alan Gilbert hmp-commands-info.hx | 2 +- target/m68k/cpu.h | 1 + target/m68k/helper.c | 216 ++ target/m68k/monitor.c | 13 +++ 4 files changed, 231

[Qemu-devel] [PATCH 1/6] accel/tcg: add size paremeter in tlb_fill()

The MC68040 MMU provides the size of the access that triggers the page fault. This size is set in the Special Status Word which is written in the stack frame of the access fault exception. So we need the size in m68k_cpu_unassigned_access() and m68k_cpu_handle_mmu_fault(). To be able to do that,

[Qemu-devel] [PATCH 5/6] target/m68k: add pflush/ptest

Signed-off-by: Laurent Vivier --- target/m68k/cpu.h | 3 +++ target/m68k/helper.c| 72 + target/m68k/helper.h| 2 ++ target/m68k/monitor.c | 1 + target/m68k/op_helper.c | 1 + target/m68k/translate.c | 33 +++

[Qemu-devel] [PATCH 4/6] target/m68k: add moves

and introduce SFC and DFC control registers. Signed-off-by: Laurent Vivier --- target/m68k/cpu.h | 2 ++ target/m68k/helper.c| 82 + target/m68k/helper.h| 2 ++ target/m68k/monitor.c | 2 ++ target/m68k/op_helper.c | 4 +-- targ

[Qemu-devel] [PATCH 2/6] target/m68k: add MC68040 MMU

Only add MC68040 MMU page table processing and related registers (Special Status Word, Translation Control Register, User Root Pointer and Supervisor Root Pointer). Transparent Translation Registers, DFC/SFC and pflush/ptest will be added later. Signed-off-by: Laurent Vivier --- target/m68k/cpu

[Qemu-devel] [PATCH 0/6] target/m68k: supervisor mode (part 2)

This series introduces the MC68040 MMU. But first of all, we need to modify the prototype of tlb_fill() and handle_mmu_fault handler to pass the size of the access. MC68040 stores this value in the exception stack frame. Following patches add: - MMU page table and fault handlers, - Transparent Tr

[Qemu-devel] [PATCH 3/6] target/m68k: add Transparent Translation

Add ittr0, ittr1, dttr0, dttr1 and manage Transparent Translations Signed-off-by: Laurent Vivier --- target/m68k/cpu.h | 18 +++ target/m68k/helper.c| 79 + target/m68k/monitor.c | 4 +++ target/m68k/translate.c | 3 ++ 4 file

Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

- Original Message - > From: "Eduardo Habkost" > To: "Paolo Bonzini" > Cc: "Vincent Bernat" , "Richard Henderson" > , qemu-devel@nongnu.org > Sent: Monday, January 8, 2018 11:56:25 PM > Subject: Re: [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge > > On Mon, Jan 08,

Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

On Mon, Jan 08, 2018 at 05:37:16PM -0500, Paolo Bonzini wrote: > > > - Original Message - > > From: "Eduardo Habkost" > > To: "Vincent Bernat" > > Cc: "Paolo Bonzini" , "Richard Henderson" > > , qemu-devel@nongnu.org > > Sent: Monday, January 8, 2018 10:16:23 PM > > Subject: Re: [PATCH

Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

- Original Message - > From: "Eduardo Habkost" > To: "Vincent Bernat" > Cc: "Paolo Bonzini" , "Richard Henderson" > , qemu-devel@nongnu.org > Sent: Monday, January 8, 2018 10:16:23 PM > Subject: Re: [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge > > On Mon, Jan 08,

Re: [Qemu-devel] [PATCH v5 04/31] sdhci: add clock capabilities (Spec v1)

On 01/08/2018 07:22 PM, Alistair Francis wrote: > On Mon, Jan 8, 2018 at 7:42 AM, Philippe Mathieu-Daudé > wrote: >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> include/hw/sd/sdhci.h | 2 ++ >> hw/sd/sdhci.c | 52 >> +++ >> 2 files c

Re: [Qemu-devel] [Qemu-arm] [PATCH v5 02/31] sdhci: add basic Spec v1 capabilities

On 01/08/2018 07:00 PM, Alistair Francis wrote: > On Mon, Jan 8, 2018 at 7:42 AM, Philippe Mathieu-Daudé > wrote: >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> hw/sd/sdhci-internal.h | 22 ++- >> include/hw/sd/sdhci.h | 6 ++ >> hw/sd/sdhci.c | 58 >> +++

Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

On Mon, Jan 08, 2018 at 11:22:36PM +0100, Vincent Bernat wrote: > ❦ 8 janvier 2018 20:14 -0200, Eduardo Habkost  : > > >> What are the consequences of running a too old kernel? Would KVM just > >> hide PCID flag? > > > > On an old kernel, the SandyBridge and IvyBridge CPU models will > > be unex

Re: [Qemu-devel] [PATCH v5 04/31] sdhci: add clock capabilities (Spec v1)

On Mon, Jan 8, 2018 at 7:42 AM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > include/hw/sd/sdhci.h | 2 ++ > hw/sd/sdhci.c | 52 > +++ > 2 files changed, 34 insertions(+), 20 deletions(-) > > diff --git a/

Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

❦ 8 janvier 2018 20:14 -0200, Eduardo Habkost  : >> What are the consequences of running a too old kernel? Would KVM just >> hide PCID flag? > > On an old kernel, the SandyBridge and IvyBridge CPU models will > be unexpectedly become not runnable. But, isn't it the same for more recent models t

Re: [Qemu-devel] [PATCH v5 03/31] sdhci: add max-block-length capability (Spec v1)

On Mon, Jan 8, 2018 at 7:42 AM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/sd/sdhci-internal.h | 1 - > include/hw/sd/sdhci.h | 1 + > hw/sd/sdhci.c | 38 +- > 3 files

Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

On Mon, Jan 08, 2018 at 10:51:48PM +0100, Vincent Bernat wrote: > ❦ 8 janvier 2018 19:16 -0200, Eduardo Habkost  : > > > One possible way to work around this problem is to declare that > > QEMU 2.12 with KVM will require Linux v3.6 and newer (because we > > need Linux kernel commit ad756a1603c5

Re: [Qemu-devel] [PULL 00/17] M68k for 2.12 patches

On 4 January 2018 at 16:42, Laurent Vivier wrote: > The following changes since commit 281f327487c9c9b1599f93c589a408bbf4a651b8: > > Merge remote-tracking branch > 'remotes/vivier/tags/m68k-for-2.12-pull-request' into staging (2017-12-22 > 00:11:36 +) > > are available in the Git repositor

Re: [Qemu-devel] [PATCH 2/2] find_ram_offset: Align ram_addr_t allocation on long boundaries

"Dr. David Alan Gilbert (git)" wrote: > From: "Dr. David Alan Gilbert" > > The dirty bitmaps are built from 'long'sand there is fast-path code > for synchronising the case where the RAMBlock is aligned to the start > of a long boundary. Align the allocation to this boundary > to cause the fast p

Re: [Qemu-devel] [PATCH 1/2] find_ram_offset: Add comments and tracing

"Dr. David Alan Gilbert (git)" wrote: > From: "Dr. David Alan Gilbert" > > Add some comments so I can understand the various nested loops. > Add some tracing so I can see what they're doing. > > Signed-off-by: Dr. David Alan Gilbert Reviewed-by: Juan Quintela

Re: [Qemu-devel] how to pass pcid to guest?

On 01/08/2018 02:03 PM, Stefan Priebe - Profihost AG wrote: > Hello, > > for meltdown mitigation and performance it's important to have the pcid > flag passed down to the guest (f.e. > https://groups.google.com/forum/m/#!topic/mechanical-sympathy/L9mHTbeQLNU). Indeed; you are still waiting on the

Re: [Qemu-devel] [PATCH v5 02/31] sdhci: add basic Spec v1 capabilities

On Mon, Jan 8, 2018 at 7:42 AM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/sd/sdhci-internal.h | 22 ++- > include/hw/sd/sdhci.h | 6 ++ > hw/sd/sdhci.c | 58 > -- > 3 files chan

Re: [Qemu-devel] [PATCH v5 17/31] sdhci: rename the hostctl1 register

On Mon, Jan 8, 2018 at 7:42 AM, Philippe Mathieu-Daudé wrote: > As per the Spec v3.00 > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > include/hw/sd/sdhci.h | 2 +- > hw/sd/sdhci.c | 14 +++--- > 2 files changed, 8 insertions(+), 8 del

Re: [Qemu-devel] [PATCH v5 08/31] hw/sd: clean/reorder the Makefile adding few comments

On Mon, Jan 8, 2018 at 7:42 AM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/sd/Makefile.objs | 9 +++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/hw/sd/Makefile.objs b/hw/sd/Makefile.objs

Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

❦ 8 janvier 2018 19:16 -0200, Eduardo Habkost  : > One possible way to work around this problem is to declare that > QEMU 2.12 with KVM will require Linux v3.6 and newer (because we > need Linux kernel commit ad756a1603c5 "KVM: VMX: Implement > PCID/INVPCID for guests with EPT"). I have propose

Re: [Qemu-devel] [PATCH v2 12/25] sdcard: use a 16-bit integer for the 16-bit RCA register

On Wed, Jan 3, 2018 at 1:24 PM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/sd/sd.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/sd/sd.c b/hw/sd/sd.c > index e0550cd174..e6a6e0b2ad 1006

[Qemu-devel] [PATCH] fw_cfg: fix memory corruption when all fw_cfg slots are used

When all the fw_cfg slots are used, a write is made outside the bounds of the fw_cfg files array as part of the sort algorithm. Fix it by avoiding an unnecessary array element move. Fix also an assert while at it. Signed-off-by: Marcel Apfelbaum --- hw/nvram/fw_cfg.c | 6 -- 1 file changed,

Re: [Qemu-devel] [PATCH v2 04/25] sdcard: define SDCARD_CMD_MAX instead of using the magic '64'

On Wed, Jan 3, 2018 at 1:24 PM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/sd/sd.c | 23 +-- > 1 file changed, 17 insertions(+), 6 deletions(-) > > diff --git a/hw/sd/sd.c b/hw/sd/sd.c > index f0

Re: [Qemu-devel] [PATCH v2 09/25] sdcard: use G_BYTE from cutils

On Wed, Jan 3, 2018 at 1:24 PM, Philippe Mathieu-Daudé wrote: > code is now easier to read. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/sd/sd.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/sd/sd.c b/hw/sd/sd.c >

Re: [Qemu-devel] [PATCH v2 01/25] sdcard: reorder SDState struct members

On Wed, Jan 3, 2018 at 1:24 PM, Philippe Mathieu-Daudé wrote: > place card registers first, this will ease further code movements. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/sd/sd.c | 9 ++--- > 1 file changed, 6 insertions(+), 3 deletions

Re: [Qemu-devel] [PATCH v5 01/31] sdhci: add a spec_version property

On Mon, Jan 8, 2018 at 7:42 AM, Philippe Mathieu-Daudé wrote: > default to Spec v2.00 > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/sd/sdhci-internal.h | 4 ++-- > include/hw/sd/sdhci.h | 3 +++ > hw/sd/sdhci.c | 19 +-

Re: [Qemu-devel] [PATCH 5/6] hw/sd/ssi-sd: expose a SDBus and connect the SDCard to it

On Wed, Jan 3, 2018 at 8:23 AM, Philippe Mathieu-Daudé wrote: > using the sdbus_*() API. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/sd/ssi-sd.c | 27 +++ > 1 file changed, 19 insertions(+), 8 deletions(-) > > diff --git

Re: [Qemu-devel] [PULL 0/2] Dump patches

On 2 January 2018 at 14:06, Marc-André Lureau wrote: > The following changes since commit 281f327487c9c9b1599f93c589a408bbf4a651b8: > > Merge remote-tracking branch > 'remotes/vivier/tags/m68k-for-2.12-pull-request' into staging (2017-12-22 > 00:11:36 +) > > are available in the Git reposi

Re: [Qemu-devel] [PATCH 4/6] hw/sd/pl181: expose a SDBus and connect the SDCard to it

On Wed, Jan 3, 2018 at 8:23 AM, Philippe Mathieu-Daudé wrote: > using the sdbus_*() API. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/sd/pl181.c | 27 --- > 1 file changed, 20 insertions(+), 7 deletions(-) > > diff --git

Re: [Qemu-devel] [PATCH 3/6] hw/sd/milkymist-memcard: expose a SDBus and connect the SDCard to it

On Wed, Jan 3, 2018 at 8:23 AM, Philippe Mathieu-Daudé wrote: > using the sdbus_*() API. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/sd/milkymist-memcard.c | 34 +- > 1 file changed, 21 insertions(+), 13 deletion

Re: [Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

On Mon, Jan 08, 2018 at 09:50:52PM +0100, Vincent Bernat wrote: > PCID has been introduced in Sandy Bridge and, currently, KVM doesn't > object exposing it to VM as long as it is present on the host. Update > CPU model for both Sandy Bridge and Ivy Bridge accordingly. > > Signed-off-by: Vincent Be

Re: [Qemu-devel] [PULL v2 0/8] tcg queued patches

On 29 December 2017 at 20:56, Richard Henderson wrote: > Ho hum. While rebasing I accidentally used a constrained build > tree that didn't build sh4-linux-user, and an extra reference to > the removed TCGV_IS_UNUSED had crept in in the meantime. > > I have pushed a revised tag with the same name.

Re: [Qemu-devel] [PATCH] configure: Fix incorrect string comparison operator

On 8 January 2018 at 17:16, Philippe Mathieu-Daudé wrote: > On 01/08/2018 02:10 PM, Peter Maydell wrote: >> In commit c97d6d2cdf97ed we accidentally added code to configure >> that uses '==' for string equality testing. This is a bashism -- >> the portable way to write this is '='. >> >> This fixe

Re: [Qemu-devel] [PATCH] MAINTAINERS: update Dmitry Fleytman email

On 01/08/2018 04:21 PM, Dmitry Fleytman wrote: > Thanks Philippe, > > My patch is hanging on the list for some time already: > http://lists.nongnu.org/archive/html/qemu-trivial/2017-12/msg00189.html Oops Ok I didn't notice it.

[Qemu-devel] [PATCH] target-i386: add pcid to both Sandy Bridge and Ivy Bridge

PCID has been introduced in Sandy Bridge and, currently, KVM doesn't object exposing it to VM as long as it is present on the host. Update CPU model for both Sandy Bridge and Ivy Bridge accordingly. Signed-off-by: Vincent Bernat --- target/i386/cpu.c | 5 +++-- 1 file changed, 3 insertions(+), 2

Re: [Qemu-devel] [SPARC] question on LEON IRQMP interrupt controller.

Le 08/01/2018 à 20:56, Mark Cave-Ayland a écrit : Thanks for the patch! I'm afraid I don't really have any experience with LEON as my focus is sun4m/sun4u, however I'm happy to take patches Acked/Reviewed by Fabien as the current LEON maintainer I am waiting for Fabien feedback after my experi

Re: [Qemu-devel] [PATCH v2] linux-user/mmap.c: Avoid choosing NULL as start address

On 01/06/2018 05:01 PM, Maximilian Riemensberger wrote: > mmap() is required by the linux kernel ABI and POSIX to return a > non-NULL address when the implementation chooses a start address for the > mapping. > > The current implementation of mmap_find_vma_reserved() can return NULL > as start add

Re: [Qemu-devel] [PATCH v1 04/19] include/fpu/softfloat: implement float16_set_sign helper

On 01/08/2018 04:58 AM, Alex Bennée wrote: > > Alex Bennée writes: > >> Richard Henderson writes: >> >>> On 12/11/2017 04:56 AM, Alex Bennée wrote: +static inline float16 float16_set_sign(float16 a, int sign) +{ +return make_float16((float16_val(a) & 0x7fff) | (sign << 15));

Re: [Qemu-devel] [PATCH 01/12] slirp: remove QEMU_PACKED from structures with don't require it

On 08.01.2018 18:28, Philippe Mathieu-Daudé wrote: > theses structures are not serialized and often store host pointers. Patch looks fine at a quick glance... did you check that migration still works (while there is network traffic going on in the guest)? Thomas

Re: [Qemu-devel] [PATCH 04/12] slirp: add in6_multicast() and use it instead of IN6_IS_ADDR_MULTICAST()

On 08.01.2018 18:28, Philippe Mathieu-Daudé wrote: > Host: Mac OS 10.12.5 > Compiler: Apple LLVM version 8.1.0 (clang-802.0.42) > > slirp/ip6_icmp.c:79:32: warning: taking address of packed member 'ip_src' > of class or > structure 'ip6' may result in an unaligned pointer value >

[Qemu-devel] how to pass pcid to guest?

Hello, for meltdown mitigation and performance it's important to have the pcid flag passed down to the guest (f.e. https://groups.google.com/forum/m/#!topic/mechanical-sympathy/L9mHTbeQLNU). My host shows the flag: # grep ' pcid ' /proc/cpuinfo | wc -l 56 But the guest does not: # grep pcid /pr

[Qemu-devel] What's needed to pass pciid cpu flag to guest?

Hello, for meltdown mitigation and performance it's important to have the pcid flag passed down to the guest (f.e. https://groups.google.com/forum/m/#!topic/mechanical-sympathy/L9mHTbeQLNU). My host shows the flag: # grep ' pcid ' /proc/cpuinfo | wc -l 56 But the guest does not: # grep pcid /pr

Re: [Qemu-devel] [PATCH v1 1/1] block: Add numeric errno field to BLOCK_IO_ERROR events

Hi Kevin. On 2017-12-22 05:52, Kevin Wolf wrote: Am 22.12.2017 um 01:11 hat Jack Schwartz geschrieben: BLOCK_IO_ERROR events currently contain a "reason" string which is strerror(errno) of the error. This enhancement provides those events with the numeric errno value as well, since it is easie

Re: [Qemu-devel] [SPARC] question on LEON IRQMP interrupt controller.

On 02/01/18 11:13, Jean-Christophe DUBOIS wrote: Hi Mark, Artyom, I am wondering if the IRQMP code in hw/intc/grlib_irqmp.c is correct when it comes to acknowledging interrupts. With the actual code an interrupt can be lowered/acked only by an "ack" from the processor which means that the t

Re: [Qemu-devel] [PATCH 00/12] add HOST_SUPPORTS_UNALIGNED_ACCESS, reduce slirp warnings

Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20180108172904.8772-1-f4...@amsat.org Subject: [Qemu-devel] [PATCH 00/12] add HOST_SUPPORTS_UNALIGNED_ACCESS, reduce slirp warnings === TEST SCRIPT BEGIN === #!/bin/bash BA

[Qemu-devel] [PULL] qemu-sparc updates

Hi Peter, Here is the first set of SPARC updates for 2.12. Please pull. ATB, Mark. The following changes since commit 4124ea4f5bd367ca6412fb2dfe7ac4d80e1504d9: Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20171229' into staging (2018-01-08 16:17:04 +) are available in the

Re: [Qemu-devel] [PATCH] MAINTAINERS: update Dmitry Fleytman email

Thanks Philippe, My patch is hanging on the list for some time already: http://lists.nongnu.org/archive/html/qemu-trivial/2017-12/msg00189.html ~Dmitry. > On 8 Jan 2018, at 20:34, Philippe Mathieu-Daudé wrote: > > gently asked by his automatic reply :) > > Signed-off-by: Philippe Mathieu-Dau

[Qemu-devel] [Bug 1310714] Re: User mode networking SLIRP rapid memory leak

** Changed in: qemu Status: Incomplete => Triaged -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1310714 Title: User mode networking SLIRP rapid memory leak Status in QEMU: Triaged Bug de

Re: [Qemu-devel] [PATCH] Remove MemoryRegionSection check code from sparc_cpu_get_phys_page_debug()

On 06/12/17 20:24, Jean-Christophe DUBOIS wrote: Le 04/12/2017 à 21:45, Mark Cave-Ayland a écrit : On 27/11/17 20:19, Jean-Christophe DUBOIS wrote: Hello Mark, Did you get any second opinion on this? Also do you need me to resend the patch with the SPARC keyword in the patch subject line?

Re: [Qemu-devel] [PATCH 08/12] slirp: removed unused code

On 08.01.2018 18:29, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > slirp/ip.h | 13 - > 1 file changed, 13 deletions(-) > > diff --git a/slirp/ip.h b/slirp/ip.h > index e29ccd3c9f..71c3642cfe 100644 > --- a/slirp/ip.h > +++ b/slirp/ip.h > @@ -233,17 +2

Re: [Qemu-devel] [PATCH 07/12] slirp: remove unnecessary

The subject is missing a word or two. Thomas

[Qemu-devel] [Bug 1721220] Re: qemu crashes with assertion error `!mr->container' failed

As per previous comments, this bug was fixed by commit https://git.qemu.org/?p=qemu.git;a=commitdiff;h=d659d94013390238961fac741572306c95496bf5 (released in QEMU v2.11.0): commit d659d94013390238961fac741572306c95496bf5 Author: Aleksandr Bezzubikov Date: Mon Sep 25 02:21:58 2017 +0300 hw/p

Re: [Qemu-devel] [PATCH 06/12] slirp: remove unused header

On 08.01.2018 18:28, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > slirp/slirp.h | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/slirp/slirp.h b/slirp/slirp.h > index 9a7287e7cc..447dc045a8 100644 > --- a/slirp/slirp.h > +++ b/slirp/slirp.h > @@ -1,7 +1,6

Re: [Qemu-devel] Getting rid of phys_mem_set_alloc

On 08/01/2018 18:05, Cornelia Huck wrote: On Sun, 7 Jan 2018 14:32:21 +0200 Marcel Apfelbaum wrote: Looking at the churn below... Hi Cornelia, Thanks for looking at the patch. diff --git a/exec.c b/exec.c index 4722e521d4..247f8bd0c0 100644 --- a/exec.c +++ b/exec.c @@ -1278,7 +1278,7 @@

Re: [Qemu-devel] [PATCH 7/7] i386/pc: use the QEMU_ALIGNED() macro

On 08/01/2018 20:02, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 3fcf318a95..85d9454c71 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -93,12 +93

Re: [Qemu-devel] [PATCH v5 7/7] vhost: Merge and delete unused callbacks

* Igor Mammedov (imamm...@redhat.com) wrote: > On Mon, 18 Dec 2017 20:13:40 + > "Dr. David Alan Gilbert (git)" wrote: > > > From: "Dr. David Alan Gilbert" > > > > Now that the olf vhost_set_memory code is gone, the _nop and _add > > callbacks are identical and can be merged. The _del callb

[Qemu-devel] [PATCH] MAINTAINERS: update Dmitry Fleytman email

gently asked by his automatic reply :) Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 73a735..8050499ec5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1157,7 +1157,7 @@ F: hw/s

Re: [Qemu-devel] [RFC PATCH 6/7] net/eepro100: reduce alignment to DWORD (32bit)

On 01/08/2018 03:10 PM, Paolo Bonzini wrote: > On 08/01/2018 19:02, Philippe Mathieu-Daudé wrote: >> /* Data in mem is always in the byte order of the controller (le). >> * It must be dword aligned to allow direct access to 32 bit values. */ >> -uint8_t mem[PCI_MEM_SIZE] QEMU_ALIGNED

Re: [Qemu-devel] [PATCH 10/12] configure: disable unaligned access warning on x86 arch

On 01/08/2018 02:32 PM, Peter Maydell wrote: > On 8 January 2018 at 17:29, Philippe Mathieu-Daudé wrote: >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> configure | 17 + >> 1 file changed, 17 insertions(+) > > This doesn't seem like the right approach to me. We > want this s

Re: [Qemu-devel] [RFC PATCH 6/7] net/eepro100: reduce alignment to DWORD (32bit)

On 08/01/2018 19:02, Philippe Mathieu-Daudé wrote: > /* Data in mem is always in the byte order of the controller (le). > * It must be dword aligned to allow direct access to 32 bit values. */ > -uint8_t mem[PCI_MEM_SIZE] QEMU_ALIGNED(8); > +uint8_t mem[PCI_MEM_SIZE] QEMU_ALIGNED

Re: [Qemu-devel] [PULL 00/25] pc, pci, virtio: features, fixes, cleanups

On Mon, Jan 08, 2018 at 09:14:41AM +, Peter Maydell wrote: > On 21 December 2017 at 23:43, Michael S. Tsirkin wrote: > >> you also need to drop "hw/pci: remove obsolete PCIDevice->init()" > >> (applied in your tree as 18951fce55d5aa58cd1629b4cb704ee51bab4420) > >> else the not-yet-QOM'ified NV

[Qemu-devel] [PATCH 7/7] i386/pc: use the QEMU_ALIGNED() macro

Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 3fcf318a95..85d9454c71 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -93,12 +93,12 @@ struct e820_entry { uint64_t address;

[Qemu-devel] [PATCH v2] cocoa.m: Fix scroll wheel support

When using a mouse's scroll wheel in a guest with the cocoa front-end, the mouse pointer moves up and down instead of scrolling the window. This patch fixes this problem. Signed-off-by: John Arbuckle --- ui/cocoa.m | 27 +++ 1 file changed, 19 insertions(+), 8 deletions(-

[Qemu-devel] [RFC PATCH 6/7] net/eepro100: reduce alignment to DWORD (32bit)

as suggested in the comment. Signed-off-by: Philippe Mathieu-Daudé --- hw/net/eepro100.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c index 61d767524f..abb44710d9 100644 --- a/hw/net/eepro100.c +++ b/hw/net/eepro100.c @@ -266,7 +266,7

Re: [Qemu-devel] [PATCH v5 4/7] vhost: Merge sections added to temporary list

* Igor Mammedov (imamm...@redhat.com) wrote: > On Mon, 18 Dec 2017 20:13:37 + > "Dr. David Alan Gilbert (git)" wrote: > > > From: "Dr. David Alan Gilbert" > > > > As sections are reported by the listener to the _nop and _add > > methods, add them to the temporary section list but now merge

[Qemu-devel] [PATCH 4/7] net/rocker: move struct rocker_desc to C file

this is the only user. Signed-off-by: Philippe Mathieu-Daudé --- hw/net/rocker/rocker_hw.h | 13 - hw/net/rocker/rocker_desc.c | 13 + 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/hw/net/rocker/rocker_hw.h b/hw/net/rocker/rocker_hw.h index 8b4ce250d5

[Qemu-devel] [PATCH 5/7] net/eepro100: use QEMU_ALIGNED() macro

Signed-off-by: Philippe Mathieu-Daudé --- hw/net/eepro100.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c index a07a63247e..61d767524f 100644 --- a/hw/net/eepro100.c +++ b/hw/net/eepro100.c @@ -266,7 +266,7 @@ typedef struct { /*

[Qemu-devel] [PATCH 3/7] net/rocker: use QEMU_PACKED and QEMU_ALIGNED() macros

Signed-off-by: Philippe Mathieu-Daudé --- hw/net/rocker/rocker_hw.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/net/rocker/rocker_hw.h b/hw/net/rocker/rocker_hw.h index 1786323fa4..8b4ce250d5 100644 --- a/hw/net/rocker/rocker_hw.h +++ b/hw/net/rocker/rocker_hw.h @@

[Qemu-devel] [PATCH 2/7] net/eth: use the QEMU_PACKED macro

--- include/net/eth.h | 26 +- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/include/net/eth.h b/include/net/eth.h index 09054a506d..87c6499f18 100644 --- a/include/net/eth.h +++ b/include/net/eth.h @@ -36,12 +36,12 @@ struct eth_header { uint8_t h_d

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