On 01/15/2018 02:56 PM, Jason Wang wrote:
On 2018年01月12日 18:18, Stefan Hajnoczi wrote:
I just fail understand why we can't do software defined network or
storage with exist virtio device/drivers (or are there any
shortcomings that force us to invent new infrastructure).
Existing
NVMe 1.3 specification(http://nvmexpress.org/resources/specifications/)
introduced a new Admin command:
Doorbell Buffer Config, which designed for emulated NVMe controllers only,
Linux kernel 4.12 added the
support of Doorbell Buffer Config. With this feature, when NVMe driver issues
new
NVMe 1.3 specification introduces a new NVMe ADMIN command:
doorbell buffer config, which can write shadow doorbell buffer
instead of MMIO registers, so it can improve the Guest performance
a lot for emulated NVMe devices inside VM.
Similar with existing vhost-user-scsi solution, this commit
On 01/12/2018 06:18 PM, Stefan Hajnoczi wrote:
On Fri, Jan 12, 2018 at 11:32:56AM +0800, Jason Wang wrote:
On 2018年01月11日 23:23, Stefan Hajnoczi wrote:
On Thu, Jan 11, 2018 at 06:57:03PM +0800, Jason Wang wrote:
On 2018年01月11日 00:14, Stefan Hajnoczi wrote:
Looks not, if I read the code
On 15/01/2018 08:27, David Gibson wrote:
> fa98fbfc "PC: KVM: Support machine option to set VSMT mode" introduced the
> "vsmt" parameter for the pseries machine type, which controls the spacing
> of the vcpu ids of thread 0 for each virtual core. This was done to bring
> some consistency and
On 15/01/2018 08:27, David Gibson wrote:
> We recently had some discussions that were sidetracked for a while, because
> nearly everyone misapprehended the purpose of the 'max_threads' field in
> the compatiblity modes table. It's all about guest expectations, not host
> expectations or support
The vlan concept is marked as deprecated, so we should not use
this for examples in the documentation anymore.
Signed-off-by: Thomas Huth
---
qemu-options.hx | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/qemu-options.hx b/qemu-options.hx
index
On 2018年01月10日 22:32, Thomas Huth wrote:
QEMU can emulate hubs to connect NICs and netdevs. This is currently
primarily used for the mis-named 'vlan' feature of the networking
subsystem. Now the 'vlan' feature has been marked as deprecated, since
its name is rather confusing and the users
fa98fbfc "PC: KVM: Support machine option to set VSMT mode" introduced the
"vsmt" parameter for the pseries machine type, which controls the spacing
of the vcpu ids of thread 0 for each virtual core. This was done to bring
some consistency and stability to how that was done, while still allowing
Here are some follow on fixes to Ziviani's proposed changes to VSMT
handling. This should fix migration of POWER8 compat mode guests
between POWER8 and POWER9 hosts.
The changes are simple, the rationale's rather more complex.
David Gibson (2):
target/ppc: Clarify compat mode max_threads
We recently had some discussions that were sidetracked for a while, because
nearly everyone misapprehended the purpose of the 'max_threads' field in
the compatiblity modes table. It's all about guest expectations, not host
expectations or support (that's handled elsewhere).
In an attempt to
On 2018年01月12日 15:30, Jay Zhou wrote:
If netdev_add tap,id=net0,vhost=on failed in net_init_tap_one(),
the followed up device_add virtio-net-pci,netdev=net0 will fail
too, prints:
TUNSETOFFLOAD ioctl() failed: Bad file descriptor TUNSETOFFLOAD
ioctl() failed: Bad file descriptor
The
> > From: Chao Peng
> >
> > Expose Intel Processor Trace feature to guest.
> >
> > Signed-off-by: Chao Peng
> > Signed-off-by: Luwei Kang
> > ---
> > target/i386/cpu.c | 19 ++- target/i386/cpu.h |
Add three new kvm capabilities used to represent the level of host support
for three corresponding workarounds.
Host support for each of the capabilities is queried through the
new ioctl KVM_PPC_GET_CPU_CHAR which returns four uint64 quantities. The
first two, character and behaviour, represent
On 2018年01月12日 18:18, Stefan Hajnoczi wrote:
Form what I'm understanding, vhost-pci tries to build a scalable V2V private
datapath. But according to what you describe here, virito-vhost-user tries
to make it possible to implement the device inside another VM. I understand
the goal of vhost-pci
On Sun, Jan 14, 2018 at 05:23:49PM -0200, Jose Ricardo Ziviani wrote:
> QEMU currently checks whether SMT passed is valid or not. However, it
> doesn't check if KVM supports such mode when kvm is enabled.
That's not really true - the attempt to actually set the vsmt mode in
KVM later on in
On 15.01.2018 03:35, Alexey Kardashevskiy wrote:
> Even with --disable-git-update, ./configure tries updating the capstone
> submodule instead of marking it "no"; this disables capstone submodule
> if git update is disabled.
>
> Signed-off-by: Alexey Kardashevskiy
> ---
>
* Cornelia Huck [2018-01-11 15:16:59 +0100]:
Hi Conny,
> On Thu, 11 Jan 2018 04:04:19 +0100
> Dong Jia Shi wrote:
>
> > This introduces a new region for vfio-ccw to provide subchannel
> > information for user space.
> >
> > Signed-off-by: Dong
Add new tristate cap cap-ibs to represent the indirect branch
serialisation capability.
Signed-off-by: Suraj Jitindar Singh
---
hw/ppc/spapr.c | 2 ++
hw/ppc/spapr_caps.c| 39 +++
include/hw/ppc/spapr.h | 5 -
3
Add new tristate cap cap-cfpc to represent the cache flush on privilege
change capability.
Signed-off-by: Suraj Jitindar Singh
---
hw/ppc/spapr.c | 2 ++
hw/ppc/spapr_caps.c| 40
include/hw/ppc/spapr.h | 5 -
3
The new H-Call H_GET_CPU_CHARACTERISTICS is used by the guest to query
behaviours and available characteristics of the cpu.
Implement the handler for this new H-Call which formulates its response
based on the setting of the spapr_caps cap-cfpc, cap-sbbc and cap-ibs.
Signed-off-by: Suraj Jitindar
Add three new kvm capabilities used to represent the level of host support
for three corresponding workarounds.
Host support for each of the capabilities is queried through the
new ioctl KVM_PPC_GET_CPU_CHAR which returns four uint64 quantities. The
first two, character and behaviour, represent
spapr_caps are used to represent the level of support for various
capabilities related to the spapr machine type. Currently there is
only support for boolean capabilities.
Add support for tristate capabilities by implementing their get/set
functions. These capabilities can have the values 0, 1 or
Add new tristate cap cap-sbbc to represent the speculation barrier
bounds checking capability.
Signed-off-by: Suraj Jitindar Singh
---
hw/ppc/spapr.c | 2 ++
hw/ppc/spapr_caps.c| 39 +++
include/hw/ppc/spapr.h | 5 -
The following patch series adds 3 new tristate capabilities and their
associated handling.
A new H-Call is implemented which a guest will use to query the
requirement for and availability of workarounds for certain cpu
behaviours.
Applies on top of David's tree: ppc-for-2.12
The first patch
On Sun, Jan 14, 2018 at 05:23:48PM -0200, Jose Ricardo Ziviani wrote:
> Increases the max smt mode to 8 for Power9. That's because KVM supports
> smt emulation in this platform so QEMU should allow users to use it as
> well.
>
> Today if we try to pass -smp ...,threads=8, QEMU will silently
It looks like this bug affects only QEMU for Windows.
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https://bugs.launchpad.net/bugs/1743214
Title:
OS/2 Warp 3 support broken in 2.11
Status in QEMU:
New
Bug description:
scsi_disk_emulate_command calls
scsi_build_sense(NULL, 0, outbuf, r->buflen,
(req->cmd.buf[1] & 1) == 0);
But scsi_convert_sense doesn't handle the case when in_buf is NULL
or in_len is 0, which will lead to segfault.
Signed-off-by: linzhecheng
On 03/01/18 04:51, Paolo Bonzini wrote:
> On 02/01/2018 06:28, Alexey Kardashevskiy wrote:
>> This is my current queue of the in-kernel TCE acceleration
>> enablement.
>>
>> Changes since
>> https://lists.gnu.org/archive/html/qemu-devel/2017-12/msg01918.html :
>> * 3 patches instead of one, one
Ping? It is quite simple...
On 02/01/18 14:40, Alexey Kardashevskiy wrote:
> On 15/12/17 20:46, Darren Kenny wrote:
>> On Fri, Dec 15, 2017 at 04:23:26PM +1100, Alexey Kardashevskiy wrote:
>>> This adds a tracepoint to trace the KVM_SET_USER_MEMORY_REGION ioctl
>>> parameters which is quite
On 13-Jan-18 00:14, Greg Kurz wrote:
> On Fri, 12 Jan 2018 19:32:10 +0800
> Antonios Motakis wrote:
>
>> Hello all,
>>
>
> Hi Antonios,
>
> I see you have attached a patch to this email... this really isn't the
> preferred
> way to do things since it prevents to
On 11/01/18 06:01, Alex Williamson wrote:
> v1: https://lists.gnu.org/archive/html/qemu-devel/2017-12/msg03350.html
>
> See patch 5/5 for a thorough description. v2 changes the 'auto'
> behavior as we've determined that there's no algorithm which has even
> a likely chance of success. Instead,
On 14/01/18 23:20, CheneyLin wrote:
> Hi, Paolo,
>
> Alexey
> commit 967dc9b
>
> commit 967dc9b
>
>
> commit 967dc9b
>
> commit 967dc9b Share FlatView's and dispatch trees between address spaces
>
> commit 967dc9b.
>
> .
>
> I'm wondering why we have to shares flatviews between different
On 01/14/2018 05:14 PM, p...@cmp.felk.cvut.cz wrote:
> From: Deniz Eren
>
> Signed-off-by: Deniz Eren
> Signed-off-by: Pavel Pisa
> ---
> hw/can/Makefile.objs | 1 +
> hw/can/can_pcm3680_pci.c | 336
>
On 2018年01月12日 13:20, Yang, Zhiyong wrote:
Both vhost-pci and virtio-vhost-user work using shared memory access
to the guest RAM of the other VM. Therefore they can poll virtqueues
and avoid vmexit. They do also support cross-VM interrupts, thanks to
QEMU setting up irqfd/ioeventfd
On 01/14/2018 05:14 PM, p...@cmp.felk.cvut.cz wrote:
> From: Pavel Pisa
>
> Signed-off-by: Pavel Pisa
> ---
> default-configs/pci.mak | 1 +
> hw/can/Makefile.objs| 1 +
> hw/can/can_kvaser_pci.c | 375
>
On 01/14/2018 05:14 PM, p...@cmp.felk.cvut.cz wrote:
> From: Pavel Pisa
>
> The core SJA1000 support is independent of following
> patches which map SJA1000 chip to PCI boards.
>
> The work is based on Jin Yang GSoC 2013 work funded
> by Google and mentored in frame of
Hi Pavel,
I'm CC'ing the QEMU Sockets maintainer to ask them a quick review of the
socket part.
On 01/14/2018 05:14 PM, p...@cmp.felk.cvut.cz wrote:
> From: Pavel Pisa
>
> Connection to the real host CAN bus network through
> SocketCAN network interface is available only
On Fri, Jan 12, 2018 at 04:33:42PM +1100, Suraj Jitindar Singh wrote:
> The following patch series reworks the implementation of spapr_caps
> to allow for a increased number of possible values in the internal
> representation.
>
> It also adds 3 new tristate capabilities.
>
> A new H-Call is
On Fri, Jan 12, 2018 at 9:08 PM, Alistair Francis
wrote:
> On Thu, Jan 11, 2018 at 12:56 PM, Philippe Mathieu-Daudé
> wrote:
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> hw/sd/sdhci-internal.h | 21 +
>>
Even with --disable-git-update, ./configure tries updating the capstone
submodule instead of marking it "no"; this disables capstone submodule
if git update is disabled.
Signed-off-by: Alexey Kardashevskiy
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Hi Peter,
On 12/08/2017 11:12 AM, Peter Maydell wrote:
> The Configurable Fault Status Register for ARMv7M and v8M is
> supposed to be byte and halfword accessible, but we were only
"aligned halfword"
> implementing word accesses. Add support for the other access
> sizes, which are used by the
On Sat, Jan 13, 2018 at 11:04:12PM -0300, Philippe Mathieu-Daudé wrote:
1;5002;0c> changes generated using the following Coccinelle patch:
>
> @@
> type DeviceParentClass;
> DeviceParentClass *pc;
> DeviceClass *dc;
> identifier parent_fn;
> identifier child_fn;
> @@
> (
>
This patch adds three new capabilities:
cap-cfpc -> safe_cache
cap-sbbc -> safe_bounds_check
cap-ibs -> safe_indirect_branch
Each capability is tristate with the possible values "broken",
"workaround" or "fixed". Add generic getter and setter functions for
this new capability type. Add these new
Coverity found that the variable tx_rx in the function
xilinx_spips_flush_txfifo was being used uninitialized (CID 1383841). This
patch corrects this by always initializing tx_rx to zeros.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 4 +++-
1 file
On Sun, 14 Jan 2018, Stefan Weil wrote:
Zoltan, did you run the test with KVM enabled?
I get a crash when I run the image with latest QEMU on Linux with TCG.
No, I've used the same command as in the bug report. Now I've retried with
explicit -M pc,accel=tcg and -M pc,accel=kvm and it boots
Please see discussion at https://github.com/anholt/libepoxy/issues/148
regarding a recent breakage between QEMU and the nvidia driver.
The gist seems to be that commit
86c0522c63e84ee9a98b9cd9cf6588faba1bac23 introduces mechanisms that
check for EGL extensions at build time instead of runtime.
This bug is no longer fixed. See also bug #1743191
** Changed in: qemu
Status: Fix Released => In Progress
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https://bugs.launchpad.net/bugs/1654137
Title:
Ctrl-A b not
Am 14.01.2018 um 14:24 schrieb BALATON Zoltan:
> On Sun, 14 Jan 2018, MVoloshin wrote:
>> Hello, I used to run OS/2 Warp 3 on QEMU with the following command
>> line: qemu-system-i386 -vga cirrus -soundhw sb16 -hda os2warp3v2.img
>> -boot c. It runs OK on QEMU 2.10, but immediately gives TRAP 0006
From: Deniz Eren
Signed-off-by: Deniz Eren
Signed-off-by: Pavel Pisa
---
hw/can/Makefile.objs | 1 +
hw/can/can_mioe3680_pci.c | 336 ++
2 files changed, 337 insertions(+)
From: Pavel Pisa
Signed-off-by: Pavel Pisa
---
docs/can.txt | 78
1 file changed, 78 insertions(+)
create mode 100644 docs/can.txt
diff --git a/docs/can.txt b/docs/can.txt
new file mode
From: Pavel Pisa
Signed-off-by: Pavel Pisa
---
default-configs/pci.mak | 1 +
hw/can/Makefile.objs| 1 +
hw/can/can_kvaser_pci.c | 375
3 files changed, 377 insertions(+)
create mode 100644
From: Deniz Eren
Signed-off-by: Deniz Eren
Signed-off-by: Pavel Pisa
---
hw/can/Makefile.objs | 1 +
hw/can/can_pcm3680_pci.c | 336 +++
2 files changed, 337 insertions(+)
From: Pavel Pisa
Connection to the real host CAN bus network through
SocketCAN network interface is available only for Linux
host system. Mechanism is generic, support for another
CAN API and operating systems can be implemented in future.
Signed-off-by: Pavel Pisa
From: Pavel Pisa
The core SJA1000 support is independent of following
patches which map SJA1000 chip to PCI boards.
The work is based on Jin Yang GSoC 2013 work funded
by Google and mentored in frame of RTEMS project GSoC
slot donated to QEMU.
Rewritten for QEMU-2.0+
From: Pavel Pisa
The CanBusState state structure is created for each
emulated CAN channel. Individual clients/emulated
CAN interfaces or host interface connection registers
to the bus by CanBusClientState structure.
The CAN core is prepared to support connection to the
From: Pavel Pisa
Basic emulation of CAN bus controller and interconnection for QEMU.
Patches version 4:
Resolve comments longer than 80 characters to suppress
all warnings reported by scripts/checkpatch.pl.
Follow all suggestions from Frederic Konrad review.
Replace all
QEMU currently checks whether SMT passed is valid or not. However, it
doesn't check if KVM supports such mode when kvm is enabled.
This patch relies on KVM_CAP_PPC_SMT_POSSIBLE to make it sure that QEMU
will either set a valid SMT mode or warn an error message and quit.
Signed-off-by: Jose
v2:
- divided in two patches:
(1) enables smt8 mode to P9 guests
(2) checks if host supports the # of threads/core required
limitation: doesn't check guest running in compat mode
This patchset contains 2 changes:
(1) A P9 guest defined like -smp sockets=1,cores=1,threads=8 will
Increases the max smt mode to 8 for Power9. That's because KVM supports
smt emulation in this platform so QEMU should allow users to use it as
well.
Today if we try to pass -smp ...,threads=8, QEMU will silently truncate
it to smt4 mode and may cause a crash if we try to perform a cpu
hotplug.
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180114104751.21965-1-mark.cave-ayl...@ilande.co.uk
Subject: [Qemu-devel] [PATCH 00/11] sun4u: APB tidy-up/rename and tracepoint
conversions
=== TEST SCRIPT BEGIN ===
On 01/07/2018 11:45 PM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/isa/superio.h | 17 +
> hw/isa/isa-superio.c | 45 +
> MAINTAINERS | 2 ++
>
On 01/14/2018 12:34 PM, Peter Maydell wrote:
> On 14 January 2018 at 02:45, Philippe Mathieu-Daudé wrote:
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> hw/i2c/core.c | 12 ++--
>> 1 file changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git
On 01/14/2018 12:32 PM, Peter Maydell wrote:
> On 14 January 2018 at 02:52, Philippe Mathieu-Daudé wrote:
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> hw/core/sysbus.c | 11 ++-
>> 1 file changed, 6 insertions(+), 5 deletions(-)
>>
>> diff --git
warning: redirection vers https://people.debian.org/~sthibault/qemu.git/
The following changes since commit 7398166ddf7c6dbbc9cae6ac69bb2feda14b40ac:
Merge remote-tracking branch 'remotes/kraxel/tags/vnc-20180112-pull-request'
into staging (2018-01-12 16:01:30 +)
are available in the Git
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Signed-off-by: Samuel Thibault
---
slirp/ip.h | 13 -
1 file changed, 13 deletions(-)
diff --git
From: Philippe Mathieu-Daudé
Host: Mac OS 10.12.5
Compiler: Apple LLVM version 8.1.0 (clang-802.0.42)
slirp/ip6_icmp.c:80:38: warning: taking address of packed member 'ip_src' of
class or
structure 'ip6' may result in an unaligned pointer value
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Samuel Thibault
---
slirp/libslirp.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/slirp/libslirp.h b/slirp/libslirp.h
index
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Samuel Thibault
---
slirp/dhcpv6.h | 3 +++
slirp/udp6.c | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/slirp/dhcpv6.h
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Tested-by: Thomas Huth
Signed-off-by: Samuel Thibault
---
slirp/slirp.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/slirp/slirp.h
On 14/01/2018 15:32, Philippe Mathieu-Daudé wrote:
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
Signed-off-by: Mark Cave-Ayland
Not sure this is worth a separate commit (I'd squash it in the next
patch), still:
I agree, no need to add a new directory to the
On 14 January 2018 at 02:45, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/i2c/core.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/hw/i2c/core.c b/hw/i2c/core.c
> index
On 14 January 2018 at 02:52, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/core/sysbus.c | 11 ++-
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c
> index
Hi Peter, Andy,
> On 8 December 2017 at 14:13, Peter Maydell wrote:
>> For PMSAv7, the v7A/R Arm ARM defines that setting AP to 0b111
>> is an UNPREDICTABLE reserved combination. However, for v7M
>> this value is documented as having the same behaviour as 0b110:
>>
We should set ioeventfd_update_pending same as memory_region_update_pending.
Signed-off-by: linzhecheng
---
memory.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/memory.c b/memory.c
index 4b41fb8..0cf39d0 100644
--- a/memory.c
+++ b/memory.c
@@ -1091,6 +1091,7 @@ void
Hi, Paolo,
Alexey
Alexey
Alexey
Alexey
Alexey
Alexey
Alexey
Alexey
Alexey
Alexey:
commit 967dc9b
commit 967dc9b
commit 967dc9b
commit 967dc9b Share FlatView's and dispatch trees between address spaces
commit 967dc9b.
.
I'm wondering why we have to shares flatviews between different ASes. In
I used QEMU 2.11 for Windows from Stephan Weil
(http://qemu.weilnetz.de/). I have Windows 10 (v1709) x64.
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https://bugs.launchpad.net/bugs/1743214
Title:
OS/2 Warp 3 support broken in
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/sparc64/sparc64.c| 85
> -
> hw/sparc64/trace-events | 18 +++
> 2 files changed, 52 insertions(+), 51
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/pci-host/sabre.c | 32 ++--
> hw/pci-host/trace-events | 10 ++
> 2 files changed, 20 insertions(+), 22 deletions(-)
>
> diff
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland
Not sure this is worth a separate commit (I'd squash it in the next
patch), still:
Reviewed-by: Philippe Mathieu-Daudé
> CC: Michael S. Tsirkin
>
Hi Mark,
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> This is the final stage in correcting the naming convention with respect to
> sabre, APB and PBM. It is effectively a file rename from apb.c to sabre.c
> along with touching up a few constants to remove the remaining references
> to APB.
On 01/14/2018 08:21 AM, Mark Cave-Ayland wrote:
> On 14/01/18 11:15, no-re...@patchew.org wrote:
>> Hi,
>>
>> This series seems to have some coding style problems. See output below
>> for
>> more information:
>>
>> Type: series
>> Message-id: 20180114104751.21965-1-mark.cave-ayl...@ilande.co.uk
>>
On Sun, 14 Jan 2018, MVoloshin wrote:
Hello, I used to run OS/2 Warp 3 on QEMU with the following command
line: qemu-system-i386 -vga cirrus -soundhw sb16 -hda os2warp3v2.img
-boot c. It runs OK on QEMU 2.10, but immediately gives TRAP 0006
(invalid opcode?) on QEMU 2.11 (see screenshot).
If
Hi Mark,
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> In order to reflect the previous change of TYPE_APB to TYPE_SABRE, update
> the corresponding variable names to keep the terminology consistent.
>
> Signed-off-by: Mark Cave-Ayland
> ---
>
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> Similarly rename the corresponding APBState typedef to SabreState.
>
> Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/pci-host/apb.c | 30
Hi Mark,
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland
This device is already QOM'ified, but now the QOM abstract inheritance
is clearer, so:
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/pci-host/apb.c
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> This is the proper name for the PBM host bridge as referenced in the Sun
> documentation.
>
> Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/pci-host/apb.c | 12
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> As hinted in the comment at the top of the file, the naming convention for the
> APB types/QOM functions isn't correct. As a starting point we can at least
> rename the APB type and related functions to improve the readability of apb.c.
comment
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> Here we rename PBMPCIBridge to SimbaPCIBridge and the QOM type from
> TYPE_PBM_PCI_BRIDGE to TYPE_SIMBA_PCI_BRIDGE in improve the clarity
> of the device name.
>
> Also touch up the relevant spots in apb.c and various other function
> names as
Hi Mark,
On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote:
> Move the QOM type and macros into a new include/hw/pci-bridge/simba.h
> file, and add a new CONFIG_SIMBA Makefile.objs variable which is enabled
> for sparc64-softmmu builds only.
>
> Signed-off-by: Mark Cave-Ayland
Public bug reported:
Hello, I used to run OS/2 Warp 3 on QEMU with the following command line:
qemu-system-i386 -vga cirrus -soundhw sb16 -hda os2warp3v2.img -boot c. It runs
OK on QEMU 2.10, but immediately gives TRAP 0006 (invalid opcode?) on QEMU 2.11
(see screenshot).
If it is important I
On 14/01/18 11:15, no-re...@patchew.org wrote:
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180114104751.21965-1-mark.cave-ayl...@ilande.co.uk
Subject: [Qemu-devel] [PATCH 00/11] sun4u: APB tidy-up/rename and
This is broken again as of revision
7398166ddf7c6dbbc9cae6ac69bb2feda14b40ac.
Bisection shows it was broken by commit
df85a78bf83d85627de27f492e78e73bbbd3df4a,
"char: move mux to its own file". Somewhat confusingly, this commit predates
the fix
(fb5e19d2e1472e96d72d5e4d89c20033f8ab345c), but
Signed-off-by: Mark Cave-Ayland
CC: Michael S. Tsirkin
CC: Marcel Apfelbaum
---
Makefile.objs| 1 +
hw/pci-host/trace-events | 1 +
2 files changed, 2 insertions(+)
create mode 100644 hw/pci-host/trace-events
diff
Signed-off-by: Mark Cave-Ayland
---
hw/pci-host/sabre.c | 32 ++--
hw/pci-host/trace-events | 10 ++
2 files changed, 20 insertions(+), 22 deletions(-)
diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c
index
Signed-off-by: Mark Cave-Ayland
---
hw/sparc64/sparc64.c| 85 -
hw/sparc64/trace-events | 18 +++
2 files changed, 52 insertions(+), 51 deletions(-)
diff --git a/hw/sparc64/sparc64.c
Here we rename PBMPCIBridge to SimbaPCIBridge and the QOM type from
TYPE_PBM_PCI_BRIDGE to TYPE_SIMBA_PCI_BRIDGE in improve the clarity
of the device name.
Also touch up the relevant spots in apb.c and various other function
names as appropriate.
Signed-off-by: Mark Cave-Ayland
In order to reflect the previous change of TYPE_APB to TYPE_SABRE, update
the corresponding variable names to keep the terminology consistent.
Signed-off-by: Mark Cave-Ayland
---
hw/sparc64/sun4u.c | 41 +
1 file changed, 21
As hinted in the comment at the top of the file, the naming convention for the
APB types/QOM functions isn't correct. As a starting point we can at least
rename the APB type and related functions to improve the readability of apb.c.
Signed-off-by: Mark Cave-Ayland
Similarly rename the corresponding APBState typedef to SabreState.
Signed-off-by: Mark Cave-Ayland
---
hw/pci-host/apb.c | 30 +++---
hw/sparc64/sun4u.c| 6 +++---
include/hw/pci-host/apb.h | 10 +-
3 files changed,
1 - 100 of 115 matches
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